C++ TRACK::ReturnMaskLayer方法代码示例

static void calcule_connexite_1_net(TRACK* pt_start_conn,TRACK* pt_end_conn)
/***************************************************************************/
/* calcule la connexite d'un net constitue de segments de piste consecutifs.
	Entree:
		pt_start_conn = adresse du 1er segment ( debut du net )
		pt_end_conn = adr de fin (dernier segment)
	Les connexions relatives aux pads doivent etre deja calculees, car elles
	ne sont pas ici recalculees ( pour des raisons de temps de calcul, et
	du fait que lors des modif de pistes, les pads ne sont pas touches
*/
{
TRACK * Track;

	/*  Les pointeurs .start et .end sont mis a jour, si la
		 connexion est du type segment a segment.
		la connexion sur pads est supposee etre deja calculee */

	/* Raz des pointeurs sur pistes */
	for( Track = pt_start_conn; Track != NULL; Track = (TRACK*) Track->Pnext)
		{
		Track->m_Sous_Netcode = 0;

		if( Track->GetState(BEGIN_ONPAD) == 0 ) Track->start = NULL;
		if( Track->GetState(END_ONPAD) == 0 ) Track->end = NULL;

		if (Track == pt_end_conn) break;
		}

	/* calcul des connexions */
	for( Track = pt_start_conn; Track != NULL; Track = (TRACK*) Track->Pnext)
		{
		if(Track->m_StructType == TYPEVIA)
			{
			TRACK* pt_segm;
			int layermask = Track->ReturnMaskLayer();
			for( pt_segm = pt_start_conn; pt_segm != NULL; pt_segm = (TRACK*) pt_segm->Pnext)
				{
				int curlayermask = pt_segm->ReturnMaskLayer();
				if( (pt_segm->m_Start.x == Track->m_Start.x) &&
					(pt_segm->m_Start.y == Track->m_Start.y) && ( layermask & curlayermask ) )
					{
					pt_segm->start = Track;
					}
				if( (pt_segm->m_End.x == Track->m_Start.x) &&
					(pt_segm->m_End.y == Track->m_Start.y) && (layermask & curlayermask) )
					{
					pt_segm->end = Track;
					}
				if( pt_segm == pt_end_conn ) break;
				}
			}

		if( Track->start == NULL )
			{
			Track->start = Locate_Piste_Connectee(Track,
								Track,pt_end_conn,START);
			}

		if( Track->end == NULL )
			{
			Track->end = Locate_Piste_Connectee(Track,
								Track,pt_end_conn,END);
			}
		if (Track == pt_end_conn) break;
		}

	/* Generation des sous equipots du net */
	propage_equipot(pt_start_conn,pt_end_conn);

}

bool DRC::doTrackDrc( TRACK* aRefSeg, TRACK* aStart, bool testPads )
{
    TRACK*    track;
    wxPoint   delta;           // lenght on X and Y axis of segments
    int       layerMask;
    int       net_code_ref;
    wxPoint   shape_pos;

    NETCLASS* netclass = aRefSeg->GetNetClass();

    /* In order to make some calculations more easier or faster,
     * pads and tracks coordinates will be made relative to the reference segment origin
     */
    wxPoint origin = aRefSeg->GetStart();  // origin will be the origin of other coordinates

    m_segmEnd   = delta = aRefSeg->GetEnd() - origin;
    m_segmAngle = 0;

    layerMask    = aRefSeg->ReturnMaskLayer();
    net_code_ref = aRefSeg->GetNet();

    // Phase 0 : Test vias
    if( aRefSeg->Type() == PCB_VIA_T )
    {
        // test if the via size is smaller than minimum
        if( aRefSeg->GetShape() == VIA_MICROVIA )
        {
            if( aRefSeg->GetWidth() < netclass->GetuViaMinDiameter() )
            {
                m_currentMarker = fillMarker( aRefSeg, NULL,
                                              DRCE_TOO_SMALL_MICROVIA, m_currentMarker );
                return false;
            }
        }
        else
        {
            if( aRefSeg->GetWidth() < netclass->GetViaMinDiameter() )
            {
                m_currentMarker = fillMarker( aRefSeg, NULL,
                                              DRCE_TOO_SMALL_VIA, m_currentMarker );
                return false;
            }
        }

        // test if via's hole is bigger than its diameter
        // This test is necessary since the via hole size and width can be modified
        // and a default via hole can be bigger than some vias sizes
        if( aRefSeg->GetDrillValue() > aRefSeg->GetWidth() )
        {
            m_currentMarker = fillMarker( aRefSeg, NULL,
                                          DRCE_VIA_HOLE_BIGGER, m_currentMarker );
            return false;
        }

        // For microvias: test if they are blind vias and only between 2 layers
        // because they are used for very small drill size and are drill by laser
        // and **only one layer** can be drilled
        if( aRefSeg->GetShape() == VIA_MICROVIA )
        {
            int  layer1, layer2;
            bool err = true;

            ( (SEGVIA*) aRefSeg )->ReturnLayerPair( &layer1, &layer2 );

            if( layer1 > layer2 )
                EXCHG( layer1, layer2 );

            // test:
            if( layer1 == LAYER_N_BACK && layer2 == LAYER_N_2 )
                err = false;

            if( layer1 == (m_pcb->GetDesignSettings().GetCopperLayerCount() - 2 )
                && layer2 == LAYER_N_FRONT )
                err = false;

            if( err )
            {
                m_currentMarker = fillMarker( aRefSeg, NULL,
                                              DRCE_MICRO_VIA_INCORRECT_LAYER_PAIR, m_currentMarker );
                return false;
            }
        }
    }
    else    // This is a track segment
    {
        if( aRefSeg->GetWidth() < netclass->GetTrackMinWidth() )
        {
            m_currentMarker = fillMarker( aRefSeg, NULL,
                                          DRCE_TOO_SMALL_TRACK_WIDTH, m_currentMarker );
            return false;
        }
    }

    // for a non horizontal or vertical segment Compute the segment angle
    // in tenths of degrees and its length
    if( delta.x || delta.y )
    {
        // Compute the segment angle in 0,1 degrees
        m_segmAngle = ArcTangente( delta.y, delta.x );

//.........这里部分代码省略.........