本文整理汇总了C++中TRACK::IsOnLayer方法的典型用法代码示例。如果您正苦于以下问题:C++ TRACK::IsOnLayer方法的具体用法?C++ TRACK::IsOnLayer怎么用?C++ TRACK::IsOnLayer使用的例子?那么, 这里精选的方法代码示例或许可以为您提供帮助。您也可以进一步了解该方法所在类TRACK
的用法示例。
在下文中一共展示了TRACK::IsOnLayer方法的8个代码示例,这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞,您的评价将有助于系统推荐出更棒的C++代码示例。
示例1: ConvertBrdLayerToPolygonalContours
void BOARD::ConvertBrdLayerToPolygonalContours( PCB_LAYER_ID aLayer, SHAPE_POLY_SET& aOutlines )
{
// convert tracks and vias:
for( TRACK* track = m_Track; track != NULL; track = track->Next() )
{
if( !track->IsOnLayer( aLayer ) )
continue;
track->TransformShapeWithClearanceToPolygon( aOutlines, 0 );
}
// convert pads
for( MODULE* module = m_Modules; module != NULL; module = module->Next() )
{
module->TransformPadsShapesWithClearanceToPolygon( aLayer, aOutlines, 0 );
// Micro-wave modules may have items on copper layers
module->TransformGraphicShapesWithClearanceToPolygonSet( aLayer, aOutlines, 0 );
}
// convert copper zones
for( int ii = 0; ii < GetAreaCount(); ii++ )
{
ZONE_CONTAINER* zone = GetArea( ii );
PCB_LAYER_ID zonelayer = zone->GetLayer();
if( zonelayer == aLayer )
zone->TransformSolidAreasShapesToPolygonSet( aOutlines );
}
// convert graphic items on copper layers (texts)
for( BOARD_ITEM* item = m_Drawings; item; item = item->Next() )
{
if( !item->IsOnLayer( aLayer ) )
continue;
switch( item->Type() )
{
case PCB_LINE_T:
( (DRAWSEGMENT*) item )->TransformShapeWithClearanceToPolygon( aOutlines, 0 );
break;
case PCB_TEXT_T:
( (TEXTE_PCB*) item )->TransformShapeWithClearanceToPolygonSet( aOutlines, 0 );
break;
default:
break;
}
}
}
示例2: testTexts
void DRC::testTexts()
{
std::vector<wxPoint> textShape; // a buffer to store the text shape (set of segments)
std::vector<D_PAD*> padList = m_pcb->GetPads();
// Test text areas for vias, tracks and pads inside text areas
for( BOARD_ITEM* item = m_pcb->m_Drawings; item; item = item->Next() )
{
// Drc test only items on copper layers
if( ! IsCopperLayer( item->GetLayer() ) )
continue;
// only texts on copper layers are tested
if( item->Type() != PCB_TEXT_T )
continue;
textShape.clear();
// So far the bounding box makes up the text-area
TEXTE_PCB* text = (TEXTE_PCB*) item;
text->TransformTextShapeToSegmentList( textShape );
if( textShape.size() == 0 ) // Should not happen (empty text?)
continue;
for( TRACK* track = m_pcb->m_Track; track != NULL; track = track->Next() )
{
if( ! track->IsOnLayer( item->GetLayer() ) )
continue;
// Test the distance between each segment and the current track/via
int min_dist = ( track->GetWidth() + text->GetThickness() ) /2 +
track->GetClearance(NULL);
if( track->Type() == PCB_TRACE_T )
{
SEG segref( track->GetStart(), track->GetEnd() );
// Error condition: Distance between text segment and track segment is
// smaller than the clearance of the segment
for( unsigned jj = 0; jj < textShape.size(); jj += 2 )
{
SEG segtest( textShape[jj], textShape[jj+1] );
int dist = segref.Distance( segtest );
if( dist < min_dist )
{
addMarkerToPcb( fillMarker( track, text,
DRCE_TRACK_INSIDE_TEXT,
m_currentMarker ) );
m_currentMarker = nullptr;
break;
}
}
}
else if( track->Type() == PCB_VIA_T )
{
// Error condition: Distance between text segment and via is
// smaller than the clearance of the via
for( unsigned jj = 0; jj < textShape.size(); jj += 2 )
{
SEG segtest( textShape[jj], textShape[jj+1] );
if( segtest.PointCloserThan( track->GetPosition(), min_dist ) )
{
addMarkerToPcb( fillMarker( track, text,
DRCE_VIA_INSIDE_TEXT, m_currentMarker ) );
m_currentMarker = nullptr;
break;
}
}
}
}
// Test pads
for( unsigned ii = 0; ii < padList.size(); ii++ )
{
D_PAD* pad = padList[ii];
if( ! pad->IsOnLayer( item->GetLayer() ) )
continue;
wxPoint shape_pos = pad->ShapePos();
for( unsigned jj = 0; jj < textShape.size(); jj += 2 )
{
/* In order to make some calculations more easier or faster,
* pads and tracks coordinates will be made relative
* to the segment origin
*/
wxPoint origin = textShape[jj]; // origin will be the origin of other coordinates
m_segmEnd = textShape[jj+1] - origin;
wxPoint delta = m_segmEnd;
m_segmAngle = 0;
// for a non horizontal or vertical segment Compute the segment angle
// in tenths of degrees and its length
if( delta.x || delta.y ) // delta.x == delta.y == 0 for vias
{
// Compute the segment angle in 0,1 degrees
//.........这里部分代码省略.........
示例3: GetBoard
void EDA_3D_CANVAS::buildBoard3DView( GLuint aBoardList, GLuint aBodyOnlyList,
REPORTER* aErrorMessages, REPORTER* aActivity )
{
BOARD* pcb = GetBoard();
// If FL_RENDER_SHOW_HOLES_IN_ZONES is true, holes are correctly removed from copper zones areas.
// If FL_RENDER_SHOW_HOLES_IN_ZONES is false, holes are not removed from copper zones areas,
// but the calculation time is twice shorter.
bool remove_Holes = isEnabled( FL_RENDER_SHOW_HOLES_IN_ZONES );
bool realistic_mode = isRealisticMode();
bool useTextures = isRealisticMode() && isEnabled( FL_RENDER_TEXTURES );
// Number of segments to convert a circle to polygon
// We use 2 values: the first gives a good shape (for instanes rond pads)
// the second is used to speed up calculations, when a poor approximation is acceptable (holes)
const int segcountforcircle = 18;
double correctionFactor = 1.0 / cos( M_PI / (segcountforcircle * 2.0) );
const int segcountLowQuality = 12; // segments to draw a circle with low quality
// to reduce time calculations
// for holes and items which do not need
// a fine representation
double correctionFactorLQ = 1.0 / cos( M_PI / (segcountLowQuality * 2.0) );
SHAPE_POLY_SET bufferPolys; // copper areas: tracks, pads and filled zones areas
// when holes are removed from zones
SHAPE_POLY_SET bufferPcbOutlines; // stores the board main outlines
SHAPE_POLY_SET bufferZonesPolys; // copper filled zones areas
// when holes are not removed from zones
SHAPE_POLY_SET currLayerHoles; // Contains holes for the current layer
SHAPE_POLY_SET allLayerHoles; // Contains holes for all layers
// Build a polygon from edge cut items
wxString msg;
if( !pcb->GetBoardPolygonOutlines( bufferPcbOutlines, allLayerHoles, &msg ) )
{
if( aErrorMessages )
{
msg << wxT("\n") << _("Unable to calculate the board outlines.\n"
"Therefore use the board boundary box.") << wxT("\n\n");
aErrorMessages->Report( msg, REPORTER::RPT_WARNING );
}
}
// Build board holes, with optimization of large holes shape.
buildBoardThroughHolesPolygonList( allLayerHoles, segcountLowQuality, true );
LSET cu_set = LSET::AllCuMask( GetPrm3DVisu().m_CopperLayersCount );
glNewList( aBoardList, GL_COMPILE );
for( LSEQ cu = cu_set.CuStack(); cu; ++cu )
{
LAYER_ID layer = *cu;
// Skip non enabled layers in normal mode,
// and internal layers in realistic mode
if( !is3DLayerEnabled( layer ) )
continue;
if( aActivity )
aActivity->Report( wxString::Format( _( "Build layer %s" ), LSET::Name( layer ) ) );
bufferPolys.RemoveAllContours();
bufferZonesPolys.RemoveAllContours();
currLayerHoles.RemoveAllContours();
// Draw track shapes:
for( TRACK* track = pcb->m_Track; track; track = track->Next() )
{
if( !track->IsOnLayer( layer ) )
continue;
track->TransformShapeWithClearanceToPolygon( bufferPolys,
0, segcountforcircle,
correctionFactor );
// Add blind/buried via holes
if( track->Type() == PCB_VIA_T )
{
VIA *via = static_cast<VIA*>( track );
if( via->GetViaType() == VIA_THROUGH )
continue; // already done
int holediameter = via->GetDrillValue();
int thickness = GetPrm3DVisu().GetCopperThicknessBIU();
int hole_outer_radius = (holediameter + thickness) / 2;
TransformCircleToPolygon( currLayerHoles,
via->GetStart(), hole_outer_radius,
segcountLowQuality );
}
}
// draw pad shapes
for( MODULE* module = pcb->m_Modules; module; module = module->Next() )
{
//.........这里部分代码省略.........
示例4: buildFeatureHoleList
void ZONE_CONTAINER::buildFeatureHoleList( BOARD* aPcb, SHAPE_POLY_SET& aFeatures )
{
int segsPerCircle;
double correctionFactor;
// Set the number of segments in arc approximations
if( m_ArcToSegmentsCount == ARC_APPROX_SEGMENTS_COUNT_HIGHT_DEF )
segsPerCircle = ARC_APPROX_SEGMENTS_COUNT_HIGHT_DEF;
else
segsPerCircle = ARC_APPROX_SEGMENTS_COUNT_LOW_DEF;
/* calculates the coeff to compensate radius reduction of holes clearance
* due to the segment approx.
* For a circle the min radius is radius * cos( 2PI / s_CircleToSegmentsCount / 2)
* s_Correction is 1 /cos( PI/s_CircleToSegmentsCount )
*/
correctionFactor = 1.0 / cos( M_PI / (double) segsPerCircle );
aFeatures.RemoveAllContours();
int outline_half_thickness = m_ZoneMinThickness / 2;
int zone_clearance = std::max( m_ZoneClearance, GetClearance() );
zone_clearance += outline_half_thickness;
/* store holes (i.e. tracks and pads areas as polygons outlines)
* in a polygon list
*/
/* items ouside the zone bounding box are skipped
* the bounding box is the zone bounding box + the biggest clearance found in Netclass list
*/
EDA_RECT item_boundingbox;
EDA_RECT zone_boundingbox = GetBoundingBox();
int biggest_clearance = aPcb->GetDesignSettings().GetBiggestClearanceValue();
biggest_clearance = std::max( biggest_clearance, zone_clearance );
zone_boundingbox.Inflate( biggest_clearance );
/*
* First : Add pads. Note: pads having the same net as zone are left in zone.
* Thermal shapes will be created later if necessary
*/
int item_clearance;
/* Use a dummy pad to calculate hole clerance when a pad is not on all copper layers
* and this pad has a hole
* This dummy pad has the size and shape of the hole
* Therefore, this dummy pad is a circle or an oval.
* A pad must have a parent because some functions expect a non null parent
* to find the parent board, and some other data
*/
MODULE dummymodule( aPcb ); // Creates a dummy parent
D_PAD dummypad( &dummymodule );
for( MODULE* module = aPcb->m_Modules; module; module = module->Next() )
{
D_PAD* nextpad;
for( D_PAD* pad = module->Pads(); pad != NULL; pad = nextpad )
{
nextpad = pad->Next(); // pad pointer can be modified by next code, so
// calculate the next pad here
if( !pad->IsOnLayer( GetLayer() ) )
{
/* Test for pads that are on top or bottom only and have a hole.
* There are curious pads but they can be used for some components that are
* inside the board (in fact inside the hole. Some photo diodes and Leds are
* like this)
*/
if( pad->GetDrillSize().x == 0 && pad->GetDrillSize().y == 0 )
continue;
// Use a dummy pad to calculate a hole shape that have the same dimension as
// the pad hole
dummypad.SetSize( pad->GetDrillSize() );
dummypad.SetOrientation( pad->GetOrientation() );
dummypad.SetShape( pad->GetDrillShape() == PAD_DRILL_SHAPE_OBLONG ?
PAD_SHAPE_OVAL : PAD_SHAPE_CIRCLE );
dummypad.SetPosition( pad->GetPosition() );
pad = &dummypad;
}
// Note: netcode <=0 means not connected item
if( ( pad->GetNetCode() != GetNetCode() ) || ( pad->GetNetCode() <= 0 ) )
{
item_clearance = pad->GetClearance() + outline_half_thickness;
item_boundingbox = pad->GetBoundingBox();
item_boundingbox.Inflate( item_clearance );
if( item_boundingbox.Intersects( zone_boundingbox ) )
{
int clearance = std::max( zone_clearance, item_clearance );
pad->TransformShapeWithClearanceToPolygon( aFeatures,
clearance,
segsPerCircle,
correctionFactor );
}
//.........这里部分代码省略.........
示例5: Magnetize
//.........这里部分代码省略.........
{
*curpos = via->GetStart();
// D(printf("via hit\n");)
return true;
}
}
}
if( !currTrack )
{
LSET layers( layer );
TRACK* track = m_Pcb->GetVisibleTrack( m_Pcb->m_Track, pos, layers );
if( !track || track->Type() != PCB_TRACE_T )
{
// D(printf("!currTrack and track=%p not found, layer_mask=0x%X\n", track, layer_mask );)
return false;
}
// D( printf( "Project\n" ); )
return Project( curpos, on_grid, track );
}
/*
* In two segment mode, ignore the final segment if it's inside a grid square.
*/
if( !amMovingVia && currTrack && g_TwoSegmentTrackBuild && currTrack->Back()
&& currTrack->GetStart().x - aGridSize.x < currTrack->GetEnd().x
&& currTrack->GetStart().x + aGridSize.x > currTrack->GetEnd().x
&& currTrack->GetStart().y - aGridSize.y < currTrack->GetEnd().y
&& currTrack->GetStart().y + aGridSize.y > currTrack->GetEnd().y )
{
currTrack = currTrack->Back();
}
for( TRACK* track = m_Pcb->m_Track; track; track = track->Next() )
{
if( track->Type() != PCB_TRACE_T )
continue;
if( doCheckNet && currTrack && currTrack->GetNetCode() != track->GetNetCode() )
continue;
if( m_Pcb->IsLayerVisible( track->GetLayer() ) == false )
continue;
// omit the layer check if moving a via
if( !amMovingVia && !track->IsOnLayer( layer ) )
continue;
if( !track->HitTest( *curpos ) )
continue;
// D(printf( "have track prospect\n");)
if( Join( curpos, track->GetStart(), track->GetEnd(), currTrack->GetStart(), currTrack->GetEnd() ) )
{
// D(printf( "join currTrack->Type()=%d\n", currTrack->Type() );)
return true;
}
if( aCurrentTool == ID_TRACK_BUTT || amMovingVia )
{
// At this point we have a drawing mouse on a track, we are drawing
// a new track and that new track is parallel to the track the
// mouse is on. Find the nearest end point of the track under mouse
// to the mouse and return that.
double distStart = GetLineLength( *curpos, track->GetStart() );
double distEnd = GetLineLength( *curpos, track->GetEnd() );
// if track not via, or if its a via dragging but not with its adjacent track
if( currTrack->Type() != PCB_VIA_T ||
( currTrack->GetStart() != track->GetStart() && currTrack->GetStart() != track->GetEnd() ))
{
double max_dist = currTrack->GetWidth() / 2.0f;
if( distStart <= max_dist )
{
// D(printf("nearest end is start\n");)
*curpos = track->GetStart();
return true;
}
if( distEnd <= max_dist )
{
// D(printf("nearest end is end\n");)
*curpos = track->GetEnd();
return true;
}
// @todo otherwise confine curpos such that it stays centered within "track"
}
}
}
}
return false;
}
示例6: TestForCopperIslandAndRemoveInsulatedIslands
void ZONE_CONTAINER::TestForCopperIslandAndRemoveInsulatedIslands( BOARD* aPcb )
{
if( m_FilledPolysList.GetCornersCount() == 0 )
return;
// Build a list of points connected to the net:
// list of coordinates of pads and vias on this layer and on this net.
std::vector <wxPoint> listPointsCandidates;
for( MODULE* module = aPcb->m_Modules; module; module = module->Next() )
{
for( D_PAD* pad = module->Pads(); pad != NULL; pad = pad->Next() )
{
if( !pad->IsOnLayer( GetLayer() ) )
continue;
if( pad->GetNet() != GetNet() )
continue;
listPointsCandidates.push_back( pad->GetPosition() );
}
}
for( TRACK* track = aPcb->m_Track; track; track = track->Next() )
{
if( !track->IsOnLayer( GetLayer() ) )
continue;
if( track->GetNet() != GetNet() )
continue;
listPointsCandidates.push_back( track->GetStart() );
if( track->Type() != PCB_VIA_T )
listPointsCandidates.push_back( track->GetEnd() );
}
// test if a point is inside
unsigned indexstart = 0, indexend;
bool connected = false;
for( indexend = 0; indexend < m_FilledPolysList.GetCornersCount(); indexend++ )
{
if( m_FilledPolysList[indexend].end_contour ) // end of a filled sub-area found
{
EDA_RECT bbox = CalculateSubAreaBoundaryBox( indexstart, indexend );
for( unsigned ic = 0; ic < listPointsCandidates.size(); ic++ )
{
// test if this area is connected to a board item:
wxPoint pos = listPointsCandidates[ic];
if( !bbox.Contains( pos ) )
continue;
if( TestPointInsidePolygon( m_FilledPolysList, indexstart, indexend,
pos.x, pos.y ) )
{
connected = true;
break;
}
}
if( connected ) // this polygon is connected: analyse next polygon
{
indexstart = indexend + 1; // indexstart points the first point of the next polygon
connected = false;
}
else // Not connected: remove this polygon
{
m_FilledPolysList.DeleteCorners( indexstart, indexend );
indexend = indexstart; /* indexstart points the first point of the next polygon
* because the current poly is removed */
}
}
}
}
示例7: ConvertBrdLayerToPolygonalContours
/**
* Function ConvertBrdLayerToPolygonalContours
* Build a set of polygons which are the outlines of copper items
* (pads, tracks, texts, zones)
* the holes in vias or pads are ignored
* Usefull to export the shape of copper layers to dxf polygons
* or 3D viewer
* the polygons are not merged.
* @param aLayer = A layer, like LAYER_N_BACK, etc.
* @param aOutlines The CPOLYGONS_LIST to fill in with main outlines.
* @return true if success, false if a contour is not valid
*/
void BOARD::ConvertBrdLayerToPolygonalContours( LAYER_NUM aLayer, CPOLYGONS_LIST& aOutlines )
{
// Number of segments to convert a circle to a polygon
const int segcountforcircle = 18;
double correctionFactor = 1.0 / cos( M_PI / (segcountforcircle * 2) );
// convert tracks and vias:
for( TRACK* track = m_Track; track != NULL; track = track->Next() )
{
if( !track->IsOnLayer( aLayer ) )
continue;
track->TransformShapeWithClearanceToPolygon( aOutlines,
0, segcountforcircle, correctionFactor );
}
// convert pads
for( MODULE* module = m_Modules; module != NULL; module = module->Next() )
{
module->TransformPadsShapesWithClearanceToPolygon( aLayer,
aOutlines, 0, segcountforcircle, correctionFactor );
// Micro-wave modules may have items on copper layers
module->TransformGraphicShapesWithClearanceToPolygonSet( aLayer,
aOutlines, 0, segcountforcircle, correctionFactor );
}
// convert copper zones
for( int ii = 0; ii < GetAreaCount(); ii++ )
{
ZONE_CONTAINER* zone = GetArea( ii );
LAYER_NUM zonelayer = zone->GetLayer();
if( zonelayer == aLayer )
zone->TransformSolidAreasShapesToPolygonSet(
aOutlines, segcountforcircle, correctionFactor );
}
// convert graphic items on copper layers (texts)
for( BOARD_ITEM* item = m_Drawings; item; item = item->Next() )
{
if( !item->IsOnLayer( aLayer ) )
continue;
switch( item->Type() )
{
case PCB_LINE_T: // should not exist on copper layers
( (DRAWSEGMENT*) item )->TransformShapeWithClearanceToPolygon(
aOutlines, 0, segcountforcircle, correctionFactor );
break;
case PCB_TEXT_T:
( (TEXTE_PCB*) item )->TransformShapeWithClearanceToPolygonSet(
aOutlines, 0, segcountforcircle, correctionFactor );
break;
default:
break;
}
}
}
示例8: AddClearanceAreasPolygonsToPolysList
//.........这里部分代码省略.........
int biggest_clearance = aPcb->GetDesignSettings().GetBiggestClearanceValue();
biggest_clearance = std::max( biggest_clearance, zone_clearance );
zone_boundingbox.Inflate( biggest_clearance );
/*
* First : Add pads. Note: pads having the same net as zone are left in zone.
* Thermal shapes will be created later if necessary
*/
int item_clearance;
// static to avoid unnecessary memory allocation when filling many zones.
static CPOLYGONS_LIST cornerBufferPolysToSubstract;
cornerBufferPolysToSubstract.RemoveAllContours();
/* Use a dummy pad to calculate hole clerance when a pad is not on all copper layers
* and this pad has a hole
* This dummy pad has the size and shape of the hole
* Therefore, this dummy pad is a circle or an oval.
* A pad must have a parent because some functions expect a non null parent
* to find the parent board, and some other data
*/
MODULE dummymodule( aPcb ); // Creates a dummy parent
D_PAD dummypad( &dummymodule );
for( MODULE* module = aPcb->m_Modules; module; module = module->Next() )
{
D_PAD* nextpad;
for( D_PAD* pad = module->Pads(); pad != NULL; pad = nextpad )
{
nextpad = pad->Next(); // pad pointer can be modified by next code, so
// calculate the next pad here
if( !pad->IsOnLayer( GetLayer() ) )
{
/* Test for pads that are on top or bottom only and have a hole.
* There are curious pads but they can be used for some components that are
* inside the board (in fact inside the hole. Some photo diodes and Leds are
* like this)
*/
if( pad->GetDrillSize().x == 0 && pad->GetDrillSize().y == 0 )
continue;
// Use a dummy pad to calculate a hole shape that have the same dimension as
// the pad hole
dummypad.SetSize( pad->GetDrillSize() );
dummypad.SetOrientation( pad->GetOrientation() );
dummypad.SetShape( pad->GetDrillShape() == PAD_DRILL_OBLONG ?
PAD_OVAL : PAD_CIRCLE );
dummypad.SetPosition( pad->GetPosition() );
pad = &dummypad;
}
// Note: netcode <=0 means not connected item
if( ( pad->GetNetCode() != GetNetCode() ) || ( pad->GetNetCode() <= 0 ) )
{
item_clearance = pad->GetClearance() + margin;
item_boundingbox = pad->GetBoundingBox();
item_boundingbox.Inflate( item_clearance );
if( item_boundingbox.Intersects( zone_boundingbox ) )
{
int clearance = std::max( zone_clearance, item_clearance );
pad->TransformShapeWithClearanceToPolygon( cornerBufferPolysToSubstract,
clearance,
开发者ID:LDavis4559,项目名称:kicad-source-mirror,代码行数:67,代码来源:zones_convert_brd_items_to_polygons_with_Boost.cpp