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Python Bits.halfCarrySub方法代码示例

本文整理汇总了Python中utility.Bits.halfCarrySub方法的典型用法代码示例。如果您正苦于以下问题:Python Bits.halfCarrySub方法的具体用法?Python Bits.halfCarrySub怎么用?Python Bits.halfCarrySub使用的例子?那么恭喜您, 这里精选的方法代码示例或许可以为您提供帮助。您也可以进一步了解该方法所在utility.Bits的用法示例。


在下文中一共展示了Bits.halfCarrySub方法的15个代码示例,这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞,您的评价将有助于系统推荐出更棒的Python代码示例。

示例1: dec8b

# 需要导入模块: from utility import Bits [as 别名]
# 或者: from utility.Bits import halfCarrySub [as 别名]
    def dec8b(cpu, opcode, logger):
        reg_index = (opcode >> 3) & 7
        old_val = cpu.regs[reg_index]
        cpu.regs[reg_index] = cpu.regs[reg_index] - 1

        cpu.ZFlag = Bits.isZero(cpu.regs[reg_index])
        cpu.SFlag = Bits.isNegative(cpu.regs[reg_index])
        cpu.NFlag = Bits.set()
        cpu.PVFlag = Bits.halfCarrySub(old_val, cpu.regs[reg_index])
        cpu.HFlag = Bits.halfCarrySub(old_val, cpu.regs[reg_index])

        cpu.m_cycles, cpu.t_states = 1, 4
        logger.info("DEC {}".format(IndexToReg.translate8Bit(reg_index)))
开发者ID:pawlos,项目名称:Timex.Emu,代码行数:15,代码来源:opcodes.py

示例2: dec_at_hl

# 需要导入模块: from utility import Bits [as 别名]
# 或者: from utility.Bits import halfCarrySub [as 别名]
 def dec_at_hl(cpu, opcode, logger):
     old_val = cpu.ram[cpu.HL]
     new_val = old_val - 1
     cpu.ram[cpu.HL] = new_val
     cpu.ZFlag = Bits.isZero(new_val)
     cpu.SFlag = Bits.isNegative(new_val)
     cpu.NFlag = Bits.set()
     cpu.PVFlag = Bits.halfCarrySub(old_val, new_val)
     cpu.m_cycles, cpu.t_states = 3, 11
     logger.info("DEC (HL)")
开发者ID:pawlos,项目名称:Timex.Emu,代码行数:12,代码来源:opcodes.py

示例3: inc8

# 需要导入模块: from utility import Bits [as 别名]
# 或者: from utility.Bits import halfCarrySub [as 别名]
	def inc8(cpu, opcode, logger):
		logger.info("INC r")
		index = ( opcode >> 3 ) & 7
		oldValue =  cpu.regs[index]
		cpu.regs[index] = (cpu.regs[index] + 1 ) & 0xFF

		cpu.NFlag = False
		cpu.ZFlag = Bits.isZero(cpu.regs[index])
		cpu.HFlag = Bits.halfCarrySub(oldValue, cpu.regs[index])
		cpu.PVFlag = True if oldValue == 0x7f else False
		cpu.SFlag = Bits.twos_comp(cpu.regs[index]) < 0
开发者ID:,项目名称:,代码行数:13,代码来源:

示例4: neg

# 需要导入模块: from utility import Bits [as 别名]
# 或者: from utility.Bits import halfCarrySub [as 别名]
 def neg(cpu, opcode, logger):
     old = cpu.A
     cpu.A = 0 - cpu.A
     cpu.NFlag = Bits.reset()
     cpu.ZFlag = Bits.isZero(cpu.A)
     cpu.SFlag = Bits.isNegative(cpu.A)
     cpu.PVFlag = Bits.set() if old == 0x80 else Bits.reset()
     cpu.CFlag = Bits.isZero(old)
     cpu.HFlag = Bits.halfCarrySub(0x0, old)
     cpu.m_cycles, cpu.t_states = 2, 8
     logger.info("NEG")
开发者ID:pawlos,项目名称:Timex.Emu,代码行数:13,代码来源:opcodes.py

示例5: cp

# 需要导入模块: from utility import Bits [as 别名]
# 或者: from utility.Bits import halfCarrySub [as 别名]
 def cp(cpu, opcode, logger):
     regInd = opcode & 7
     value = cpu.A - cpu.regs[regInd]
     cpu.ZFlag = Bits.isZero(value)
     cpu.CFlag = Bits.carryFlag(value)
     cpu.NFlag = Bits.set()
     cpu.HFlag = Bits.halfCarrySub(cpu.A, value)
     cpu.SFlag = Bits.signFlag(value)
     cpu.PVFlag = Bits.overflow(value, cpu.A)
     cpu.m_cycles, cpu.t_states = 1, 4
     logger.info("CP {}".format(IndexToReg.translate8Bit(regInd)))
开发者ID:pawlos,项目名称:Timex.Emu,代码行数:13,代码来源:opcodes.py

示例6: cp_hl

# 需要导入模块: from utility import Bits [as 别名]
# 或者: from utility.Bits import halfCarrySub [as 别名]
    def cp_hl(cpu, opcode, logger):
        value = cpu.A - cpu.ram[cpu.HL]

        cpu.ZFlag = Bits.isZero(value)
        cpu.CFlag = Bits.carryFlag(value)
        cpu.NFlag = Bits.set()
        cpu.HFlag = Bits.halfCarrySub(cpu.A, value)
        cpu.SFlag = Bits.signFlag(value)
        cpu.PVFlag = Bits.overflow(value, cpu.A)
        cpu.m_cycles, cpu.t_states = 1, 7
        logger.info("CP (HL)")
开发者ID:pawlos,项目名称:Timex.Emu,代码行数:13,代码来源:opcodes.py

示例7: dec_at_ix_d

# 需要导入模块: from utility import Bits [as 别名]
# 或者: from utility.Bits import halfCarrySub [as 别名]
 def dec_at_ix_d(cpu, opcode, logger):
     d = cpu.ram[cpu.PC]
     old_val = cpu.ram[cpu.IX+d]
     new_val = old_val - 1
     cpu.ram[cpu.IX+d] = new_val
     cpu.ZFlag = Bits.isZero(new_val)
     cpu.SFlag = Bits.isNegative(new_val)
     cpu.NFlag = Bits.set()
     cpu.PVFlag = Bits.halfCarrySub(old_val, new_val)
     cpu.m_cycles, cpu.t_states = 6, 23
     logger.info("DEC (IX+{:02X})".format(d))
开发者ID:pawlos,项目名称:Timex.Emu,代码行数:13,代码来源:opcodes.py

示例8: cp

# 需要导入模块: from utility import Bits [as 别名]
# 或者: from utility.Bits import halfCarrySub [as 别名]
	def cp(cpu, opcode, logger):
		regInd = opcode & 7
		logger.info(regInd)
		value = cpu.A - cpu.regs[regInd]
		"""Flags"""
		cpu.flags[ZF] = Bits.isZero(value)
		cpu.flags[CF] = Bits.carryFlag(value)
		cpu.flags[NF] = True
		cpu.flags[HF] = Bits.halfCarrySub(cpu.A, value)
		cpu.flags[SF] = Bits.signFlag(value)
		cpu.flags[PVF] = Bits.overflow(cpu.A, value)
		logger.info("CP r")
开发者ID:,项目名称:,代码行数:14,代码来源:

示例9: sub_n

# 需要导入模块: from utility import Bits [as 别名]
# 或者: from utility.Bits import halfCarrySub [as 别名]
    def sub_n(cpu, opcode, logger):
        n = cpu.ram[cpu.PC]
        value = cpu.A - n

        cpu.NFlag = Bits.set()
        cpu.ZFlag = Bits.isZero(value)
        cpu.HFlag = Bits.halfCarrySub(cpu.A, value)
        cpu.PVFlag = Bits.overflow(cpu.A, value)
        cpu.CFlag = Bits.carryFlag(value)
        cpu.A = value

        logger.info("SUB {:02X}".format(n))
开发者ID:pawlos,项目名称:Timex.Emu,代码行数:14,代码来源:opcodes.py

示例10: inc8

# 需要导入模块: from utility import Bits [as 别名]
# 或者: from utility.Bits import halfCarrySub [as 别名]
    def inc8(cpu, opcode, logger):
        index = (opcode >> 3) & 7
        oldValue = cpu.regs[index]
        cpu.regs[index] = Bits.limitTo8Bits(cpu.regs[index] + 1)

        cpu.NFlag = Bits.reset()
        cpu.ZFlag = Bits.isZero(cpu.regs[index])
        cpu.HFlag = Bits.halfCarrySub(oldValue, cpu.regs[index])
        cpu.PVFlag = True if oldValue == 0x7f else False
        cpu.SFlag = Bits.isNegative(cpu.regs[index])

        cpu.m_cycles, cpu.t_states = 1, 4
        logger.info("INC {}".format(IndexToReg.translate8Bit(index)))
开发者ID:pawlos,项目名称:Timex.Emu,代码行数:15,代码来源:opcodes.py

示例11: cp_n

# 需要导入模块: from utility import Bits [as 别名]
# 或者: from utility.Bits import halfCarrySub [as 别名]
    def cp_n(cpu, opcode, logger):
        n = cpu.ram[cpu.PC]
        old = cpu.A
        new = old - n
        cpu.SFlag = Bits.isNegative(new)
        cpu.ZFlag = Bits.isZero(new)
        cpu.HFlag = Bits.halfCarrySub(old, new)
        cpu.PVFlag = Bits.overflow(old, new)
        cpu.NFlag = Bits.set()
        cpu.CFlag = Bits.carryFlag(new)

        cpu.m_cycles, cpu.t_states = 2, 7
        logger.info("CP {:02X}".format(n))
开发者ID:pawlos,项目名称:Timex.Emu,代码行数:15,代码来源:opcodes.py

示例12: dec_mem_at_iy

# 需要导入模块: from utility import Bits [as 别名]
# 或者: from utility.Bits import halfCarrySub [as 别名]
    def dec_mem_at_iy(cpu, opcode, logger):
        displacement = cpu.ram[cpu.PC]
        addr = cpu.IY + displacement
        value = cpu.ram[addr]
        new_value = value - 1
        cpu.ram[addr] = new_value

        cpu.NFlag = Bits.set()
        cpu.SFlag = Bits.isNegative(new_value)
        cpu.ZFlag = Bits.isZero(new_value)
        cpu.PVFlag = True if value == 0x80 else False
        cpu.HFlag = Bits.halfCarrySub(value, new_value)
        logger.info("DEC (IY+{:2X})".format(displacement))
开发者ID:pawlos,项目名称:Timex.Emu,代码行数:15,代码来源:opcodes.py

示例13: sbc_hl

# 需要导入模块: from utility import Bits [as 别名]
# 或者: from utility.Bits import halfCarrySub [as 别名]
    def sbc_hl(cpu, opcode, logger):
        old_val = cpu.A
        cpu.A = old_val - cpu.ram[cpu.HL] - (1 if cpu.CFlag else 0)

        cpu.SFlag = Bits.isNegative(cpu.A)
        cpu.ZFlag = Bits.isZero(cpu.A)
        cpu.NFlag = Bits.set()
        cpu.HFlag = Bits.halfCarrySub(old_val, cpu.A)
        cpu.PVFlag = Bits.overflow(old_val, cpu.A)
        cpu.CFlag = Bits.carryFlag(cpu.A)

        cpu.m_cycles, cpu.t_states = 2, 7
        logger.info("SDC A, (HL)")
开发者ID:pawlos,项目名称:Timex.Emu,代码行数:15,代码来源:opcodes.py

示例14: add_a_hl

# 需要导入模块: from utility import Bits [as 别名]
# 或者: from utility.Bits import halfCarrySub [as 别名]
    def add_a_hl(cpu, opcode, logger):
        oldA = cpu.A
        value = cpu.A + cpu.ram[cpu.HL]
        cpu.A = value

        cpu.SFlag = Bits.isNegative(cpu.A)
        cpu.ZFlag = Bits.isZero(cpu.A)
        cpu.NFlag = Bits.reset()
        cpu.CFlag = Bits.carryFlag(value)
        cpu.PVFlag = Bits.overflow(oldA, cpu.A)
        cpu.HFlag = Bits.halfCarrySub(cpu.A, oldA)

        cpu.m_cycles, cpu.t_states = 2, 7
        logger.info("ADD A, (HL)")
开发者ID:pawlos,项目名称:Timex.Emu,代码行数:16,代码来源:opcodes.py

示例15: adc_a_hl

# 需要导入模块: from utility import Bits [as 别名]
# 或者: from utility.Bits import halfCarrySub [as 别名]
    def adc_a_hl(cpu, opcode, logger):
        v = cpu.ram[cpu.HL]
        old = cpu.A
        cpu.A += v

        cpu.SFlag = Bits.isNegative(cpu.A)
        cpu.ZFlag = Bits.isZero(cpu.A)
        cpu.NFlag = Bits.reset()
        cpu.PVFlag = Bits.overflow(old, cpu.A)
        cpu.HFlag = Bits.halfCarrySub(cpu.A, old)
        cpu.CFlag = Bits.carryFlag(old + v)

        cpu.m_cycles, cpu.t_states = 2, 7
        logger.info("ADC A, (HL)")
开发者ID:pawlos,项目名称:Timex.Emu,代码行数:16,代码来源:opcodes.py


注:本文中的utility.Bits.halfCarrySub方法示例由纯净天空整理自Github/MSDocs等开源代码及文档管理平台,相关代码片段筛选自各路编程大神贡献的开源项目,源码版权归原作者所有,传播和使用请参考对应项目的License;未经允许,请勿转载。