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Python Project.get_simulator_library_dependencies方法代码示例

本文整理汇总了Python中chiptools.core.project.Project.get_simulator_library_dependencies方法的典型用法代码示例。如果您正苦于以下问题:Python Project.get_simulator_library_dependencies方法的具体用法?Python Project.get_simulator_library_dependencies怎么用?Python Project.get_simulator_library_dependencies使用的例子?那么恭喜您, 这里精选的方法代码示例或许可以为您提供帮助。您也可以进一步了解该方法所在chiptools.core.project.Project的用法示例。


在下文中一共展示了Project.get_simulator_library_dependencies方法的1个代码示例,这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞,您的评价将有助于系统推荐出更棒的Python代码示例。

示例1: CommandLine

# 需要导入模块: from chiptools.core.project import Project [as 别名]
# 或者: from chiptools.core.project.Project import get_simulator_library_dependencies [as 别名]

#.........这里部分代码省略.........
                    '(not found) ' + term.red('{:<35}'),
                    term.green('{:<35}')
                ][inst.installed] +
                '\n'
            ).format(name, inst.path)

        available_synthesiser_string = ''
        for name, inst in self.project.get_available_synthesisers().items():
            available_synthesiser_string += (
                SEP * 2 + '{:<15}: ' +
                [
                    '(not found) ' + term.red('{:<35}'),
                    term.green('{:<35}')
                ][inst.installed] +
                '\n'
            ).format(name, inst.path)

        msg = (
            '\n' +
            term.yellow(term.bold('System Configuration: ')) +
            term.green('%(options)s') + '\n' +
            term.darkgray(SEP + 'Working directory:\n') +
            SEP * 2 + term.green('%(working_directory)s') + '\n' +
            term.darkgray(SEP + 'Available simulators:\n') +
            available_simulator_string +
            term.darkgray(SEP + 'Available synthesisers:\n') +
            available_synthesiser_string +
            term.darkgray(SEP + 'Simulation libraries:\n') +
            ''.join(
                (SEP * 2 + '{:<15}: ' + term.green('{:<35}') + '\n').format(
                    k,
                    v
                ) for k, v in (
                    self.project.get_simulator_library_dependencies().items()
                )
            ) +
            '\n' +
            term.yellow(term.bold('Project Configuration: ')) +
            term.green('%(project)s') + '\n' +
            term.darkgray(SEP + 'Simulation directory set to:\n') +
            SEP * 2 + term.green('%(simulation_directory)s') + '\n' +
            term.darkgray(SEP + 'Using the simulation tool:\n') +
            SEP * 2 + term.green('%(simulation_tool_name)s') + '\n' +
            term.darkgray(SEP + 'Synthesis directory set to:\n') +
            SEP * 2 + term.green('%(synthesis_directory)s') + '\n' +
            term.darkgray(SEP + 'Using the synthesis tool:\n') +
            SEP * 2 + term.green('%(synthesis_tool_name)s') + '\n' +
            term.darkgray(SEP + 'Targeting FPGA part:\n') +
            SEP * 2 + term.green('%(fpga_part)s') + '\n' +
            term.darkgray(SEP + 'Using synthesis generic binding:\n') +
            SEP * 2 + term.green('%(synthesis_generics)s') + '\n' +
            term.darkgray(SEP + 'Modelsim Specific Arguments:\n') +
            SEP * 2 + 'vsim: ' + term.green('%(modelsim_vsim_args)s') + '\n'
        )

        print(msg % dict(
            working_directory=os.getcwd(),
            options=self.project.get_system_config_path(),
            simulation_directory=self.project.get_simulation_directory(),
            simulation_tool_name=self.project.get_simulation_tool_name(),
            synthesis_directory=self.project.get_synthesis_directory(),
            synthesis_tool_name=self.project.get_synthesis_tool_name(),
            fpga_part=self.project.get_fpga_part(),
            modelsim_vsim_args=self.project.get_tool_arguments(
                'modelsim',
                'simulate'
开发者ID:hoangt,项目名称:chiptools,代码行数:70,代码来源:cli.py


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