C++ running_machine::device方法代码示例

static void b2m_set_bank(running_machine &machine,int bank)
{
	UINT8 *rom;
	b2m_state *state =  machine.driver_data<b2m_state>();
	address_space &space = machine.device("maincpu")->memory().space(AS_PROGRAM);
	UINT8 *ram = machine.device<ram_device>(RAM_TAG)->pointer();

	space.install_write_bank(0x0000, 0x27ff, "bank1");
	space.install_write_bank(0x2800, 0x2fff, "bank2");
	space.install_write_bank(0x3000, 0x6fff, "bank3");
	space.install_write_bank(0x7000, 0xdfff, "bank4");
	space.install_write_bank(0xe000, 0xffff, "bank5");

	rom = state->memregion("maincpu")->base();
	switch(bank) {
		case 0 :
		case 1 :
						space.unmap_write(0xe000, 0xffff);

						state->membank("bank1")->set_base(ram);
						state->membank("bank2")->set_base(ram + 0x2800);
						state->membank("bank3")->set_base(ram + 0x3000);
						state->membank("bank4")->set_base(ram + 0x7000);
						state->membank("bank5")->set_base(rom + 0x10000);
						break;
#if 0
		case 1 :
						space.unmap_write(0x3000, 0x6fff);
						space.unmap_write(0xe000, 0xffff);

						state->membank("bank1")->set_base(ram);
						state->membank("bank2")->set_base(ram + 0x2800);
						state->membank("bank3")->set_base(rom + 0x12000);
						state->membank("bank4")->set_base(rom + 0x16000);
						state->membank("bank5")->set_base(rom + 0x10000);
						break;
#endif
		case 2 :
						space.unmap_write(0x2800, 0x2fff);
						space.unmap_write(0xe000, 0xffff);

						state->membank("bank1")->set_base(ram);
						space.install_read_handler(0x2800, 0x2fff, read8_delegate(FUNC(b2m_state::b2m_keyboard_r),state));
						state->membank("bank3")->set_base(ram + 0x10000);
						state->membank("bank4")->set_base(ram + 0x7000);
						state->membank("bank5")->set_base(rom + 0x10000);
						break;
		case 3 :
						space.unmap_write(0x2800, 0x2fff);
						space.unmap_write(0xe000, 0xffff);

						state->membank("bank1")->set_base(ram);
						space.install_read_handler(0x2800, 0x2fff, read8_delegate(FUNC(b2m_state::b2m_keyboard_r),state));
						state->membank("bank3")->set_base(ram + 0x14000);
						state->membank("bank4")->set_base(ram + 0x7000);
						state->membank("bank5")->set_base(rom + 0x10000);
						break;
		case 4 :
						space.unmap_write(0x2800, 0x2fff);
						space.unmap_write(0xe000, 0xffff);

						state->membank("bank1")->set_base(ram);
						space.install_read_handler(0x2800, 0x2fff, read8_delegate(FUNC(b2m_state::b2m_keyboard_r),state));
						state->membank("bank3")->set_base(ram + 0x18000);
						state->membank("bank4")->set_base(ram + 0x7000);
						state->membank("bank5")->set_base(rom + 0x10000);

						break;
		case 5 :
						space.unmap_write(0x2800, 0x2fff);
						space.unmap_write(0xe000, 0xffff);

						state->membank("bank1")->set_base(ram);
						space.install_read_handler(0x2800, 0x2fff, read8_delegate(FUNC(b2m_state::b2m_keyboard_r),state));
						state->membank("bank3")->set_base(ram + 0x1c000);
						state->membank("bank4")->set_base(ram + 0x7000);
						state->membank("bank5")->set_base(rom + 0x10000);

						break;
		case 6 :
						state->membank("bank1")->set_base(ram);
						state->membank("bank2")->set_base(ram + 0x2800);
						state->membank("bank3")->set_base(ram + 0x3000);
						state->membank("bank4")->set_base(ram + 0x7000);
						state->membank("bank5")->set_base(ram + 0xe000);
						break;
		case 7 :
						space.unmap_write(0x0000, 0x27ff);
						space.unmap_write(0x2800, 0x2fff);
						space.unmap_write(0x3000, 0x6fff);
						space.unmap_write(0x7000, 0xdfff);
						space.unmap_write(0xe000, 0xffff);

						state->membank("bank1")->set_base(rom + 0x10000);
						state->membank("bank2")->set_base(rom + 0x10000);
						state->membank("bank3")->set_base(rom + 0x10000);
						state->membank("bank4")->set_base(rom + 0x10000);
						state->membank("bank5")->set_base(rom + 0x10000);
						break;
	}
//.........这里部分代码省略.........

static void internal_timer_update(running_machine &machine,
                                  int which,
                                  int new_count,
                                  int new_maxA,
                                  int new_maxB,
                                  int new_control)
{
	compis_state *state = machine.driver_data<compis_state>();
	struct timer_state *t = &state->m_i186.timer[which];
	int update_int_timer = 0;

	/* if we have a new count and we're on, update things */
	if (new_count != -1)
	{
		if (t->control & 0x8000)
		{
			internal_timer_sync(machine, which);
			update_int_timer = 1;
		}
		t->count = new_count;
	}

	/* if we have a new max and we're on, update things */
	if (new_maxA != -1 && new_maxA != t->maxA)
	{
		if (t->control & 0x8000)
		{
			internal_timer_sync(machine, which);
			update_int_timer = 1;
		}
		t->maxA = new_maxA;
		if (new_maxA == 0)
		{
        		new_maxA = 0x10000;
		}
	}

	/* if we have a new max and we're on, update things */
	if (new_maxB != -1 && new_maxB != t->maxB)
	{
		if (t->control & 0x8000)
		{
			internal_timer_sync(machine, which);
			update_int_timer = 1;
		}

		t->maxB = new_maxB;

		if (new_maxB == 0)
		{
        		new_maxB = 0x10000;
		}
	}


	/* handle control changes */
	if (new_control != -1)
	{
		int diff;

		/* merge back in the bits we don't modify */
		new_control = (new_control & ~0x1fc0) | (t->control & 0x1fc0);

		/* handle the /INH bit */
		if (!(new_control & 0x4000))
			new_control = (new_control & ~0x8000) | (t->control & 0x8000);
		new_control &= ~0x4000;

		/* check for control bits we don't handle */
		diff = new_control ^ t->control;
		if (diff & 0x001c)
		  logerror("%05X:ERROR! -unsupported timer mode %04X\n",
			   cpu_get_pc(machine.device("maincpu")), new_control);

		/* if we have real changes, update things */
		if (diff != 0)
		{
			/* if we're going off, make sure our timers are gone */
			if ((diff & 0x8000) && !(new_control & 0x8000))
			{
				/* compute the final count */
				internal_timer_sync(machine, which);

				/* nuke the timer and force the interrupt timer to be recomputed */
				t->time_timer->adjust(attotime::never, which);
				t->time_timer_active = 0;
				update_int_timer = 1;
			}

			/* if we're going on, start the timers running */
			else if ((diff & 0x8000) && (new_control & 0x8000))
			{
				/* start the timing */
				t->time_timer->adjust(attotime::never, which);
				t->time_timer_active = 1;
				update_int_timer = 1;
			}

			/* if something about the interrupt timer changed, force an update */
			if (!(diff & 0x8000) && (diff & 0x2000))
//.........这里部分代码省略.........

static void roldfrog_update_irq( running_machine &machine )
{
	splash_state * state = machine.driver_data<splash_state>();
	int irq = (state->m_sound_irq ? 0x08 : 0) | ((state->m_vblank_irq) ? 0x18 : 0);
	machine.device("audiocpu")->execute().set_input_line_and_vector(0, irq ? ASSERT_LINE : CLEAR_LINE, 0xc7 | irq);
}

static void cybiko_pcf8593_save(running_machine &machine, emu_file *file)
{
	device_t *device = machine.device("rtc");
	pcf8593_save(device, file);
}

static void update_irq_state(running_machine &machine)
{
	artmagic_state *state = machine.driver_data<artmagic_state>();
	machine.device("maincpu")->execute().set_input_line(4, state->m_tms_irq  ? ASSERT_LINE : CLEAR_LINE);
	machine.device("maincpu")->execute().set_input_line(5, state->m_hack_irq ? ASSERT_LINE : CLEAR_LINE);
}

static void tms_interrupt(running_machine &machine, int state)
{
	machine.device("maincpu")->execute().set_input_line(INT_TMS34061, state);
}

void address_map::uplift_submaps(running_machine &machine, device_t &device, device_t &owner, endianness_t endian)
{
	address_map_entry *prev = 0;
	address_map_entry *entry = m_entrylist.first();
	while (entry)
	{
		if (entry->m_read.m_type == AMH_DEVICE_SUBMAP)
		{
			astring tag;
			owner.subtag(tag, entry->m_read.m_tag);
			device_t *mapdevice = machine.device(tag);
			if (mapdevice == NULL) {
				throw emu_fatalerror("Attempted to submap a non-existent device '%s' in space %d of device '%s'\n", tag.cstr(), m_spacenum, device.basetag());
			}
			// Grab the submap
			address_map submap(*mapdevice, entry);

			// Recursively uplift it if needed
			submap.uplift_submaps(machine, device, *mapdevice, endian);

			// Compute the unit repartition characteristics
			int entry_bits = entry->m_submap_bits;
			if (!entry_bits)
				entry_bits = m_databits;

			if (submap.m_databits != entry_bits)
				throw emu_fatalerror("AM_DEVICE wants a %d bits large address map and got a %d bits large one instead.\n", entry_bits, submap.m_databits);

			int entry_bytes = entry_bits / 8;
			int databytes = m_databits / 8;

			offs_t mirror_address_mask = (databytes - 1) & ~(entry_bytes - 1);

			UINT64 entry_mask = (2ULL << (entry_bits-1)) - 1;

			int slot_offset[8];
			int slot_count = 0;
			int max_slot_count = m_databits / entry_bits;
			int slot_xor_mask = endian == ENDIANNESS_LITTLE ? 0 : max_slot_count - 1;

			UINT64 global_mask = entry->m_read.m_mask;
			// zero means all
			if (!global_mask)
				global_mask = ~global_mask;

			// mask consistency has already been checked in
			// unitmask_is_appropriate, so one bit is enough
			for (int slot=0; slot < max_slot_count; slot++)
				if (global_mask & (1ULL << ((slot ^ slot_xor_mask) * entry_bits)))
					slot_offset[slot_count++] = (slot ^ slot_xor_mask) * entry_bits;

			// Merge in all the map contents in order
			while (submap.m_entrylist.count())
			{
				address_map_entry *subentry = submap.m_entrylist.detach_head();

				// Remap start and end

				int start_offset = subentry->m_addrstart / entry_bytes;
				int start_slot = start_offset % slot_count;
				subentry->m_addrstart = entry->m_addrstart + (start_offset / slot_count) * databytes;

				// Drop the entry if it ends up outside the range
				if (subentry->m_addrstart > entry->m_addrend)
				{
					global_free(subentry);
					continue;
				}

				int end_offset = subentry->m_addrend / entry_bytes;
				int end_slot = end_offset % slot_count;
				subentry->m_addrend = entry->m_addrstart + (end_offset / slot_count) * databytes + databytes - 1;

				// Clip the entry to the end of the range
				if (subentry->m_addrend > entry->m_addrend)
					subentry->m_addrend = entry->m_addrend;

				// Detect special unhandled case (range straddling
				// slots, requiring splitting in multiple entries and
				// unimplemented offset-add subunit handler)
				if (subentry->m_addrstart + databytes - 1 != subentry->m_addrend &&
					(start_slot != 0 || end_slot != slot_count - 1))
					throw emu_fatalerror("uplift_submaps unhandled case: range straddling slots.\n");

				if (entry->m_addrmask || subentry->m_addrmask)
					throw emu_fatalerror("uplift_submaps unhandled case: address masks.\n");

				if (subentry->m_addrmirror & mirror_address_mask)
					throw emu_fatalerror("uplift_submaps unhandled case: address mirror bit within subentry.\n");

				subentry->m_addrmirror |= entry->m_addrmirror;

				// Twiddle the unitmask on the data accessors that need it
				for (int data_entry = 0; data_entry < 2; data_entry++)
				{
					map_handler_data &mdata = data_entry ? subentry->m_write : subentry->m_read;

					if (mdata.m_type == AMH_NONE)
						continue;

//.........这里部分代码省略.........

void ti990_hold_load(running_machine &machine)
{
	machine.device("maincpu")->execute().set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
	machine.scheduler().timer_set(attotime::from_msec(100), FUNC(clear_load));
}

static void	dmac_install(running_machine &machine, offs_t base)
{
	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
	space->install_legacy_read_handler(base, base + 0xFFFF, FUNC(amiga_dmac_r));
	space->install_legacy_write_handler(base, base + 0xFFFF, FUNC(amiga_dmac_w));
}

static void update_ti83p_memory (running_machine &machine)
{
	ti85_state *state = machine.driver_data<ti85_state>();
	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);

	if (state->m_ti8x_memory_page_1 & 0x40)
	{
		if (state->m_ti83p_port4 & 1)
		{

			memory_set_bankptr(machine, "bank3", state->m_ti8x_ram + 0x004000*(state->m_ti8x_memory_page_1&0x01));
			space->install_write_bank(0x8000, 0xbfff, "bank3");
		}
		else
		{
			memory_set_bankptr(machine, "bank2", state->m_ti8x_ram + 0x004000*(state->m_ti8x_memory_page_1&0x01));
			space->install_write_bank(0x4000, 0x7fff, "bank2");
		}
	}
	else
	{
		if (state->m_ti83p_port4 & 1)
		{
			memory_set_bankptr(machine, "bank3", machine.region("maincpu")->base() + 0x010000 + 0x004000*(state->m_ti8x_memory_page_1&0x1f));
			space->unmap_write(0x8000, 0xbfff);
		}
		else
		{
			memory_set_bankptr(machine, "bank2", machine.region("maincpu")->base() + 0x010000 + 0x004000*(state->m_ti8x_memory_page_1&0x1f));
			space->unmap_write(0x4000, 0x7fff);
		}
	}

	if (state->m_ti8x_memory_page_2 & 0x40)
	{
		if (state->m_ti83p_port4 & 1)
		{
			memory_set_bankptr(machine, "bank4", state->m_ti8x_ram + 0x004000*(state->m_ti8x_memory_page_2&0x01));
			space->install_write_bank(0xc000, 0xffff, "bank4");
		}
		else
		{
			memory_set_bankptr(machine, "bank3", state->m_ti8x_ram + 0x004000*(state->m_ti8x_memory_page_2&0x01));
			space->install_write_bank(0x8000, 0xbfff, "bank3");
		}

	}
	else
	{
		if (state->m_ti83p_port4 & 1)
		{
			memory_set_bankptr(machine, "bank4", machine.region("maincpu")->base() + 0x010000 + 0x004000*(state->m_ti8x_memory_page_2&0x1f));
			space->unmap_write(0xc000, 0xffff);
		}
		else
		{
			memory_set_bankptr(machine, "bank3", machine.region("maincpu")->base() + 0x010000 + 0x004000*(state->m_ti8x_memory_page_2&0x1f));
			space->unmap_write(0x8000, 0xbfff);
		}
	}
}

static void init_ram_handler(running_machine &machine, offs_t start, offs_t size, offs_t mirror)
{
	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(start, start + size - 1, 0, mirror - size, "bank1");
	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_bank(start, start + size - 1, 0, mirror - size, "bank1");
	memory_set_bankptr( machine, "bank1", ram_get_ptr(machine.device(RAM_TAG)));
}

static void famicombox_reset(running_machine &machine)
{
	famicombox_bankswitch(machine, 0);
	machine.device("maincpu")->reset();
}

static void	dmac_uninstall(running_machine &machine, offs_t base)
{
	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
	space->unmap_readwrite(base, base + 0xFFFF);
}

static void command_verify_memory(running_machine &machine)
{
	int i = 0;
	offs_t offset, offset_start, offset_end;
	const UINT8 *verify_data;
	size_t verify_data_size;
	const UINT8 *target_data = NULL;
	size_t target_data_size = 0;
	const char *region;
	const char *cpu_name;

	offset_start = current_command->u.verify_args.start;
	offset_end = current_command->u.verify_args.end;
	verify_data = (const UINT8 *) current_command->u.verify_args.verify_data;
	verify_data_size = current_command->u.verify_args.verify_data_size;

	if (offset_end == 0)
		offset_end = offset_start + verify_data_size - 1;

	cpu_name = current_command->u.verify_args.cpu_name;

	/* what type of memory are we validating? */
	region = current_command->u.verify_args.mem_region;
	if (region)
	{
		/* we're validating a conventional memory region */
		target_data = machine.region(region)->base();
		target_data_size = machine.region(region)->bytes();
	}

	/* sanity check the ranges */
	if (!verify_data || (verify_data_size <= 0))
	{
		state = STATE_ABORTED;
		report_message(MSG_FAILURE, "Invalid memory region during verify");
		return;
	}
	if (offset_start > offset_end)
	{
		state = STATE_ABORTED;
		report_message(MSG_FAILURE, "Invalid verify offset range (0x%x-0x%x)", offset_start, offset_end);
		return;
	}

	if (region) {
		if (offset_end >= target_data_size)
		{
			state = STATE_ABORTED;
			report_message(MSG_FAILURE, "Verify memory range out of bounds");
			return;
		}
	} else {
		if (cpu_name==NULL) {
			state = STATE_ABORTED;
			report_message(MSG_FAILURE, "If region is not defined then cpu must be");
			return;
		}
	}

	/* loop through the memory, verifying it byte by byte */
	for (offset = offset_start; offset <= offset_end; offset++)
	{
		if (region) {
			if (verify_data[i] != target_data[offset])
			{
				state = STATE_ABORTED;
				report_message(MSG_FAILURE, "Failed verification step (region %s; 0x%x-0x%x)",
					region, offset_start, offset_end);
				break;
			}
		} else {
			address_space *space = machine.device(cpu_name)->memory().space(AS_PROGRAM);

			if (verify_data[i] != space->read_byte(offset))
			{
				state = STATE_ABORTED;
				report_message(MSG_FAILURE, "Failed verification step (0x%x-0x%x)",
					offset_start, offset_end);
				break;
			}
		}
		i = (i + 1) % verify_data_size;
	}
}

INPUT_PORTS_END

static void magtouch_set_keyb_int(running_machine &machine, int state)
{
	pic8259_ir1_w(machine.device("pic8259_1"), state);
}