Python Tree.format_list方法代码示例

# 需要导入模块: import Tree [as 别名]
# 或者: from Tree import format_list [as 别名]

#.........这里部分代码省略.........
				searchCol2 = stringsSheet.col_values(26, item+1)
			else:
				searchCol1 = stringsSheet.col_values(11, item+1, interlockNumArray[index+1])
				searchCol2 = stringsSheet.col_values(26, item+1, interlockNumArray[index+1])

			found = match(searchCol1, searchCol2, soName)
			if not found:
				continue
			break
		
		# TODO: can raise exception if soName not found in the sheet.
		
		# Appends the main ILK at the front of the array.
		dependencyMap[soName].append(stringsSheet.cell(interlockNumArray[index], 11).value)
		# Beginning row number for I/O members of the given ILK.
		start = ioMemNumArray[index] + 1
		# End row number for I/O members of the given ILK.
		stop = whereUsedNumArray[index] - 1
		# Column 'L' of the I/O members.
		c1 = stringsSheet.col_values(11, start, stop)
		# Column 'AA' of the I/O members.
		c2 = stringsSheet.col_values(26, start, stop)
		# Appends DO/DI signals from the first column.
		for doName in c1:
			if doName == '':
				continue
			dependencyMap[soName].append(doName)
		# Appends DO/DI signals from the second column.
		for doName in c2:
			if doName == '':
				continue
			dependencyMap[soName].append(doName)

	# For each SO signal, we flatten the equation, starting from the top,
	# i.e., the main ILK name, and its corresponding I/O members.	
	for soName in soArray:
		array = dependencyMap[soName]
		# main ILK
		ilk = array[0]
		mainIlk = ilk
		# Array of DO/DI signals.
		array = array[1:]

		# Separate check for ILK_01, since it only contains one I/O member.
		# Might need update <--
		if mainIlk == 'ILK_01':
			dependencyMap[soName] = [mainIlk, 'DI_000']
			continue

		tree = Tree()
		# Main ILK inserted at root, and p is the pointer to the root.
		p = tree.insert_root(ilk)
		
		# Checks if any ILKs are present in the tree which we haven't
		# accounted for (not "visited" even once), and flattens the
		# equation by finding that ILK's I/O members, and so on...
		while tree.has_ilk():
			pointer, ilk = tree.get_ilk()
			loop(tree, pointer, ilk)

		# Ensures proper traversal order.
		# New ILK branches are always on the left, and the continuing I/O
		# members are on the right.
		tree.reverse_children()

		# New array with all signals for a given soName, with these
		# signals formatted properly (i.e., NOT changed to ~, ILKs skipped,
		# and parenthesis in place for logic reduction).
		arrayCopy = tree.format_list()
		
		string = ''
		for index, item in enumerate(arrayCopy):
			string = string + ' ' + item
			if index <= len(arrayCopy) - 2:
				if item.find('D') != -1:
					if arrayCopy[index+1].find('D') != -1 or arrayCopy[index+1].find('(') != -1:
						string = string + ' &'
				elif item.find(')') != -1:
					if arrayCopy[index+1].find('(') != -1 or arrayCopy[index+1].find('D') != -1:
						string = string + ' &'

		f = expr(string)
		f = f.simplify()
		f = f.factor()

		dependencyMap[soName] = [mainIlk, str(f)]

	# Write data to excel file.
	book = Workbook('ILKEqns.xlsx')
	sheet = book.add_worksheet('Flattened Interlock Equations')

	sheet.write(0, 0, 'SO')
	sheet.write(0, 1, 'ILK')
	sheet.write(0, 2, 'Dependency')
	# Set column width.
	sheet.set_column(2, 2, 300)
	
	write_data(sheet, soArray, dependencyMap)

	book.close()