本文整理汇总了Python中basil.dut.Dut.close方法的典型用法代码示例。如果您正苦于以下问题：Python Dut.close方法的具体用法？Python Dut.close怎么用？Python Dut.close使用的例子？那么恭喜您, 这里精选的方法代码示例或许可以为您提供帮助。您也可以进一步了解该方法所在类basil.dut.Dut的用法示例。
在下文中一共展示了Dut.close方法的12个代码示例，这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞，您的评价将有助于系统推荐出更棒的Python代码示例。
示例1: TestSimGpio
# 需要导入模块: from basil.dut import Dut [as 别名]
# 或者: from basil.dut.Dut import close [as 别名]
class TestSimGpio(unittest.TestCase):
def setUp(self):
cocotb_compile_and_run([os.getcwd() + '/test_SimGpio.v'])
self.chip = Dut(cnfg_yaml)
self.chip.init()
def test_io(self):
ret = self.chip['gpio'].get_data()
self.assertEqual([0, 0, 0], ret)
self.chip['gpio'].set_data([0xe3, 0xfa, 0x5a])
ret = self.chip['gpio'].get_data()
self.assertEqual([0, 0x5a, 0x5a], ret)
self.chip['gpio'].set_output_en([0x0f, 0, 0])
ret = self.chip['gpio'].get_data()
self.assertEqual([0x33, 0x5a, 0x5a], ret)
def test_io_register(self):
self.chip['GPIO']['OUT'] = 0xa5
self.chip['GPIO'].write()
ret = self.chip['gpio'].get_data()
self.assertEqual([0, 0xa5, 0xa5], ret)
# TODO: Add register readback and comparison
def tearDown(self):
self.chip.close() # let it close connection and stop simulator
cocotb_compile_clean()示例2: TestSimS2C
# 需要导入模块: from basil.dut import Dut [as 别名]
# 或者: from basil.dut.Dut import close [as 别名]
class TestSimS2C(unittest.TestCase):
def setUp(self):
cocotb_compile_and_run([os.path.dirname(__file__) + '/test_SimI2c.v'])
self.chip = Dut(cnfg_yaml)
self.chip.init()
def test_i2c(self):
data = [0x85, 0x81, 0xa5, 0x91]
self.chip['i2c'].write(0x92, data)
ret = self.chip['i2c'].get_data(4)
self.assertEqual(ret.tolist(), data)
self.chip['i2c'].write(0x92, data[0:1])
self.chip['i2c'].set_data([0, 1, 2, 3])
ret = self.chip['i2c'].read(0x92, 3)
self.assertEqual(ret.tolist(), data[1:])
# no ack/no such device
exept = False
try:
self.chip['i2c'].write(0x55, data)
except IOError:
exept = True
self.assertEqual(exept, True)
def tearDown(self):
self.chip.close() # let it close connection and stop simulator
cocotb_compile_clean()示例3: TestExampleMIO
# 需要导入模块: from basil.dut import Dut [as 别名]
# 或者: from basil.dut.Dut import close [as 别名]
class TestExampleMIO(unittest.TestCase):
def setUp(self):
fw_path = get_basil_dir() + "/firmware/modules"
cocotb_compile_and_run(
[
fw_path + "/gpio/gpio.v",
fw_path + "/utils/reset_gen.v",
fw_path + "/utils/bus_to_ip.v",
fw_path + "/utils/fx2_to_bus.v",
os.path.dirname(__file__) + "/../src/example.v",
],
top_level="example",
sim_bus="basil.utils.sim.SiLibUsbBusDriver",
)
with open(os.path.dirname(__file__) + "/example.yaml", "r") as f:
cnfg = yaml.load(f)
# change to simulation interface
cnfg["transfer_layer"][0]["type"] = "SiSim"
self.chip = Dut(cnfg)
self.chip.init()
def test(self):
ret = self.chip["GPIO_LED"].get_data()
self.assertEqual([0], ret)
self.chip["GPIO_LED"]["LED"] = 0x01
self.chip["GPIO_LED"].write()
ret = self.chip["GPIO_LED"].get_data()
self.assertEqual([0x21], ret)
self.chip["GPIO_LED"]["LED"] = 0x02
self.chip["GPIO_LED"].write()
ret = self.chip["GPIO_LED"].get_data()
self.assertEqual([0x42], ret)
self.chip["GPIO_LED"]["LED"] = 0x03
self.chip["GPIO_LED"].write()
ret = self.chip["GPIO_LED"].get_data()
self.assertEqual([0x63], ret)
def tearDown(self):
self.chip.close() # let it close connection and stop simulator
cocotb_compile_clean()示例4: TestExampleMIO
# 需要导入模块: from basil.dut import Dut [as 别名]
# 或者: from basil.dut.Dut import close [as 别名]
class TestExampleMIO(unittest.TestCase):
def setUp(self):
fw_path = os.path.join(get_basil_dir(), 'firmware/modules')
cocotb_compile_and_run([
os.path.join(fw_path, 'gpio/gpio.v'),
os.path.join(fw_path, 'utils/reset_gen.v'),
os.path.join(fw_path, 'utils/bus_to_ip.v'),
os.path.join(fw_path, 'utils/fx2_to_bus.v'),
os.path.join(os.path.dirname(__file__), '../src/example.v')],
top_level='example',
sim_bus='basil.utils.sim.SiLibUsbBusDriver'
)
with open(os.path.join(os.path.dirname(__file__), 'example.yaml'), 'r') as f:
cnfg = yaml.load(f)
# change to simulation interface
cnfg['transfer_layer'][0]['type'] = 'SiSim'
self.chip = Dut(cnfg)
self.chip.init()
def test_gpio(self):
ret = self.chip['GPIO_LED'].get_data()
self.assertEqual([0], ret)
self.chip['GPIO_LED']['LED'] = 0x01
self.chip['GPIO_LED'].write()
ret = self.chip['GPIO_LED'].get_data()
self.assertEqual([0x21], ret)
self.chip['GPIO_LED']['LED'] = 0x02
self.chip['GPIO_LED'].write()
ret = self.chip['GPIO_LED'].get_data()
self.assertEqual([0x42], ret)
self.chip['GPIO_LED']['LED'] = 0x03
self.chip['GPIO_LED'].write()
ret = self.chip['GPIO_LED'].get_data()
self.assertEqual([0x63], ret)
def tearDown(self):
self.chip.close() # let it close connection and stop simulator
cocotb_compile_clean()示例5: TestSimGpio
# 需要导入模块: from basil.dut import Dut [as 别名]
# 或者: from basil.dut.Dut import close [as 别名]
class TestSimGpio(unittest.TestCase):
def setUp(self):
cocotb_compile_and_run([os.getcwd() + '/test_SimAdcRx.v'])
self.chip = Dut(cnfg_yaml)
self.chip.init()
def test_io(self):
pattern = [1, 0, 1, 1, 1, 2, 1, 3, 1, 4, 1, 5, 1, 6, 1, 7]
self.chip['SEQ_GEN'].set_data(pattern)
self.chip['PULSE_GEN'].set_delay(1)
self.chip['PULSE_GEN'].set_width(1)
self.chip['SEQ_GEN'].set_en_ext_start(True)
self.chip['SEQ_GEN'].set_size(8)
self.chip['SEQ_GEN'].set_repeat(1)
# this is to have something in memory and not X
self.chip['PULSE_GEN'].start()
self.chip['SEQ_GEN'].is_done()
self.chip['SEQ_GEN'].is_done()
while(not self.chip['SEQ_GEN'].is_done()):
pass
# take some data
self.chip['FADC'].set_align_to_sync(True)
self.chip['FADC'].set_data_count(16)
self.chip['FADC'].set_single_data(True)
self.chip['FADC'].start()
self.chip['PULSE_GEN'].start()
self.chip['SEQ_GEN'].is_done()
self.chip['SEQ_GEN'].is_done()
while(not self.chip['FADC'].is_done()):
pass
ret = self.chip['fifo'].get_data()
self.assertEqual(ret[2:2 + 8].tolist(), [0x0100, 0x0101, 0x0102, 0x0103, 0x0104, 0x0105, 0x0106, 0x0107])
def tearDown(self):
self.chip.close() # let it close connection and stop simulator
cocotb_compile_clean()示例6: TestSimScpi
# 需要导入模块: from basil.dut import Dut [as 别名]
# 或者: from basil.dut.Dut import close [as 别名]
class TestSimScpi(unittest.TestCase):
def setUp(self):
cfg = yaml.load(cnfg_yaml)
self.device = Dut(cfg)
self.device.init()
def test_read(self):
self.assertEqual(self.device['Pulser'].get_frequency(), u'100.00')
def test_write(self):
self.device['Pulser'].set_on()
self.assertEqual(self.device['Pulser'].get_on(), u'0')
def test_exception(self):
with self.assertRaises(ValueError):
self.device['Pulser'].unknown_function()
def tearDown(self):
self.device.close()示例7: TestSimTlu
# 需要导入模块: from basil.dut import Dut [as 别名]
# 或者: from basil.dut.Dut import close [as 别名]
#.........这里部分代码省略.........
self.chip['tlu'].TRIGGER_MODE = 0
self.chip['tlu'].TRIGGER_SELECT = 2
self.chip['tlu'].TRIGGER_VETO_SELECT = 252
# self.chip['CONTROL']['ENABLE'] = 1
self.chip['gpio'].set_data([0x01]) # ext enable trigger/TLU
self.chip['gpio'].set_data([0x03]) # trigger
self.chip['gpio'].set_data([0x01]) # ext enable trigger/TLU
self.chip['gpio'].set_data([0x03]) # trigger
self.chip['gpio'].set_data([0x01]) # ext enable trigger/TLU
self.chip['gpio'].set_data([0x03]) # trigger
self.chip['gpio'].set_data([0x01]) # ext enable trigger/TLU
self.chip['gpio'].set_data([0x03]) # trigger
self.chip['gpio'].set_data([0x01]) # ext enable trigger/TLU
# self.chip['CONTROL']['ENABLE'] = 0
self.chip['gpio'].set_data([0x00])
self.assertEqual(self.chip['sram'].get_fifo_int_size(), 2)
self.assertEqual(self.chip['tlu'].TRIGGER_COUNTER, 2)
data = self.chip['sram'].get_data()
self.assertEqual(data[0], 0x80000000 + 0)
self.assertEqual(data[1], 0x80000000 + 1)
def test_simple_trigger(self):
self.chip['tlu'].TRIGGER_COUNTER = 10
self.chip['tlu'].TRIGGER_MODE = 0
self.chip['tlu'].TRIGGER_SELECT = 1
self.chip['tlu'].TRIGGER_VETO_SELECT = 0
# self.chip['CONTROL']['ENABLE'] = 1
self.chip['gpio'].set_data([0x01]) # ext enable trigger/TLU
readings = 0
while(self.chip['sram'].get_fifo_int_size() < 4 and readings < 1000):
readings += 1
# self.chip['CONTROL']['ENABLE'] = 0
self.chip['gpio'].set_data([0x00])
self.assertGreaterEqual(self.chip['sram'].get_fifo_int_size(), 4)
self.assertGreaterEqual(self.chip['tlu'].TRIGGER_COUNTER, 14)
data = self.chip['sram'].get_data()
self.assertEqual(data[0], 0x80000000 + 10)
self.assertEqual(data[1], 0x80000000 + 11)
self.assertEqual(data[2], 0x80000000 + 12)
self.assertEqual(data[3], 0x80000000 + 13)
def test_tlu_trigger_handshake(self):
self.chip['tlu'].TRIGGER_COUNTER = 0
self.chip['tlu'].TRIGGER_MODE = 3
self.chip['tlu'].TRIGGER_VETO_SELECT = 255
self.chip['tlu'].EN_TLU_VETO = 0
# self.chip['tlu'].DATA_FORMAT = 2
# self.chip['tlu'].TRIGGER_LOW_TIMEOUT = 5
# self.chip['tlu'].TRIGGER_HANDSHAKE_ACCEPT_WAIT_CYCLES = 0
# self.chip['tlu'].HANDSHAKE_BUSY_VETO_WAIT_CYCLES = 0
# self.chip['CONTROL']['ENABLE'] = 1
self.chip['gpio'].set_data([0x01])
readings = 0
while(self.chip['sram'].get_fifo_int_size() < 4 and readings < 1000):
readings += 1
# self.chip['CONTROL']['ENABLE'] = 0
self.chip['gpio'].set_data([0x00])
self.assertGreaterEqual(self.chip['sram'].get_fifo_int_size(), 4)
self.assertGreaterEqual(self.chip['tlu'].TRIGGER_COUNTER, 4)
self.assertGreaterEqual(self.chip['tlu'].CURRENT_TLU_TRIGGER_NUMBER, 3)
data = self.chip['sram'].get_data()
self.assertEqual(data[0], 0x80000000)
self.assertEqual(data[1], 0x80000001)
self.assertEqual(data[2], 0x80000002)
self.assertEqual(data[3], 0x80000003)
def test_tlu_trigger_handshake_veto(self):
self.chip['tlu'].TRIGGER_COUNTER = 0
self.chip['tlu'].TRIGGER_MODE = 3
self.chip['tlu'].TRIGGER_VETO_SELECT = 1
self.chip['tlu'].EN_TLU_VETO = 1
# self.chip['CONTROL']['ENABLE'] = 1
self.chip['gpio'].set_data([0x01]) # ext enable trigger/TLU
readings = 0
while(self.chip['sram'].get_fifo_int_size() == 0 and readings < 1000):
readings += 1
self.assertEqual(self.chip['sram'].get_fifo_int_size(), 0)
self.assertEqual(self.chip['tlu'].TRIGGER_COUNTER, 0)
self.assertEqual(self.chip['tlu'].CURRENT_TLU_TRIGGER_NUMBER, 0)
def tearDown(self):
self.chip.close() # let it close connection and stop simulator
cocotb_compile_clean()示例8: TestSimSpi
# 需要导入模块: from basil.dut import Dut [as 别名]
# 或者: from basil.dut.Dut import close [as 别名]
class TestSimSpi(unittest.TestCase):
def setUp(self):
cocotb_compile_and_run([os.getcwd() + '/test_SimSpi.v'])
self.chip = Dut(cnfg_yaml)
self.chip.init()
def test_io(self):
size = self.chip['spi'].get_size()
self.chip['gpio'].reset()
self.assertEqual(size, 16 * 8)
self.chip['spi'].set_data(range(16))
ret = self.chip['spi'].get_data(size=16, addr=0) # to read back what was written
self.assertEqual(ret.tolist(), range(16))
self.chip['spi'].set_data(range(16))
ret = self.chip['spi'].get_data(addr=0) # to read back what was written
self.assertEqual(ret.tolist(), range(16))
self.chip['spi'].start()
while(not self.chip['spi'].is_done()):
pass
ret = self.chip['spi'].get_data() # read back what was received (looped)
self.assertEqual(ret.tolist(), range(16))
# ext_start
self.chip['spi'].set_en(1)
self.assertEqual(self.chip['spi'].get_en(), 1)
self.chip['PULSE_GEN'].set_delay(1)
self.chip['PULSE_GEN'].set_width(1+size)
self.chip['PULSE_GEN'].set_repeat(1)
self.assertEqual(self.chip['PULSE_GEN'].get_delay(), 1)
self.assertEqual(self.chip['PULSE_GEN'].get_width(), 1+size)
self.assertEqual(self.chip['PULSE_GEN'].get_repeat(), 1)
self.chip['PULSE_GEN'].start()
while(not self.chip['PULSE_GEN'].is_done()):
pass
ret = self.chip['spi'].get_data() # read back what was received (looped)
self.assertEqual(ret.tolist(), range(16))
# spi_rx
ret = self.chip['spi_rx'].get_en()
self.assertEqual(ret, False)
self.chip['spi_rx'].set_en(True)
ret = self.chip['spi_rx'].get_en()
self.assertEqual(ret, True)
self.chip['spi'].start()
while(not self.chip['spi'].is_done()):
pass
ret = self.chip['fifo'].get_fifo_size()
self.assertEqual(ret, 32)
ret = self.chip['fifo'].get_data()
data0 = ret.astype(np.uint8)
data1 = np.right_shift(ret, 8).astype(np.uint8)
data = np.reshape(np.vstack((data1, data0)), -1, order='F')
self.assertEqual(data.tolist(), range(16))
def test_dut_iter(self):
conf = yaml.safe_load(cnfg_yaml)
def iter_conf():
for item in conf['registers']:
yield item
for item in conf['hw_drivers']:
yield item
for item in conf['transfer_layer']:
yield item
for mod, mcnf in zip(self.chip, iter_conf()):
self.assertEqual(mod.name, mcnf['name'])
self.assertEqual(mod.__class__.__name__, mcnf['type'])
def tearDown(self):
self.chip.close() # let it close connection and stop simulator
cocotb_compile_clean()示例9: TestSram
# 需要导入模块: from basil.dut import Dut [as 别名]
# 或者: from basil.dut.Dut import close [as 别名]
#.........这里部分代码省略.........
self.assertTrue(np.alltrue(ret == x))
def test_overflow(self):
self.chip["CONTROL"]["COUNTER_EN"] = 1
self.chip["CONTROL"].write()
for _ in range(20):
self.chip["fifo"].get_fifo_size()
self.chip["CONTROL"]["COUNTER_EN"] = 0
self.chip["CONTROL"].write()
for _ in range(10):
self.chip["CONTROL"].write()
ret = self.chip["fifo"].get_data()
while self.chip["fifo"].get_fifo_size():
ret = np.hstack((ret, self.chip["fifo"].get_data()))
x = np.arange((128 + 1023) * 4, dtype=np.uint8)
x.dtype = np.uint32
self.assertTrue(np.alltrue(ret == x))
self.chip["pulse"].set_delay(1)
self.chip["pulse"].set_width(1)
self.chip["pulse"].start()
ret = self.chip["fifo"].get_data()
x = np.arange((128 + 1023) * 4, (128 + 1023 + 1) * 4, dtype=np.uint8)
x.dtype = np.uint32
self.assertEqual(ret, x)
def test_single(self):
self.chip["pulse"].set_delay(1)
self.chip["pulse"].set_width(1)
self.chip["pulse"].start()
self.assertEqual(self.chip["fifo"].get_data().tolist(), [0x03020100])
self.chip["pulse"].start()
self.assertEqual(self.chip["fifo"].get_data().tolist(), [0x07060504])
def test_pattern(self):
self.chip["PATTERN"] = 0xAA5555AA
self.chip["PATTERN"].write()
self.chip["CONTROL"]["PATTERN_EN"] = 1
self.chip["CONTROL"].write()
self.chip["CONTROL"]["PATTERN_EN"] = 0
self.chip["CONTROL"].write()
for _ in range(5):
self.chip["CONTROL"].write()
self.assertEqual(self.chip["fifo"].get_data().tolist(), [0xAA5555AA] * 35)
def test_direct(self):
self.chip["CONTROL"]["COUNTER_DIRECT"] = 1
self.chip["CONTROL"].write()
size = 648
base_data_addr = self.chip["fifo"]._conf["base_data_addr"]
ret = self.chip["intf"].read(base_data_addr, size=size)
ret = np.hstack((ret, self.chip["intf"].read(base_data_addr, size=size)))
x = np.arange(size * 2, dtype=np.uint8)
self.assertEqual(ret.tolist(), x.tolist())
def test_continouse(self):
self.chip["pulse"].set_delay(35)
self.chip["pulse"].set_width(3)
self.chip["pulse"].set_repeat(0)
self.chip["pulse"].start()
i = 0
error = False
for _ in range(100):
ret = self.chip["fifo"].get_data()
x = np.arange(i * 4, (i + ret.shape[0]) * 4, dtype=np.uint8)
x.dtype = np.uint32
i += ret.shape[0]
ok = np.alltrue(ret == x)
# print 'OK?', ok, ret.shape[0], i, k
if not ok:
error = True
break
self.assertFalse(error)
def tearDown(self):
self.chip.close() # let it close connection and stop simulator
cocotb_compile_clean()示例10: TestSimSeq
# 需要导入模块: from basil.dut import Dut [as 别名]
# 或者: from basil.dut.Dut import close [as 别名]
#.........这里部分代码省略.........
self.chip['PULSE_GEN'].set_delay(1)
self.chip['PULSE_GEN'].set_width(1)
self.assertEqual(self.chip['PULSE_GEN'].get_delay(), 1)
self.assertEqual(self.chip['PULSE_GEN'].get_width(), 1)
self.chip['SEQ'].set_repeat(4)
self.chip['SEQ'].set_en_ext_start(True)
self.chip['SEQ'].set_size(16)
# self.chip['SEQ'].start()
self.chip['PULSE_GEN'].start()
while(not self.chip['SEQ'].is_done()):
pass
ret = self.chip['SEQ_REC'].get_data(size=rec_size)
self.assertEqual(ret.tolist(), [0x0] * 2 + pattern * 4 + [0x80] * 6) # 2 clk delay + pattern x4 + 6 x last pattern
#
self.chip['SEQ'].set_repeat_start(12)
self.chip['PULSE_GEN'].start()
while(not self.chip['SEQ'].is_done()):
pass
ret = self.chip['SEQ_REC'].get_data(size=rec_size)
self.assertEqual(ret.tolist(), [0x80] * 2 + pattern + pattern[12:] * 3 + [0x80] * 3 * 12 + [0x80] * 6) # 2 clk delay 0x80 > from last pattern + ...
self.chip['SEQ'].set_wait(4)
self.chip['PULSE_GEN'].start()
while(not self.chip['SEQ'].is_done()):
pass
ret = self.chip['SEQ_REC'].get_data(size=rec_size)
lpat = pattern[12:] + [0x80] * 4
self.assertEqual(ret.tolist(), [0x80] * 2 + pattern + [0x80] * 4 + lpat * 3 + [0x80] * (3 * 12 - 4 * 4) + [0x80] * 6)
#
rec_size = rec_size * 3
self.chip['SEQ_REC'].set_size(rec_size)
self.chip['SEQ'].set_clk_divide(3)
self.chip['SEQ'].set_wait(3)
self.chip['PULSE_GEN'].start()
while(not self.chip['SEQ'].is_done()):
pass
ret = self.chip['SEQ_REC'].get_data(size=rec_size)
lpat = pattern[12:] + [0x80] * 3
mu_pat = pattern + [0x80] * 3 + lpat * 3
fm = []
for i in mu_pat:
fm += [i, i, i]
self.assertEqual(ret.tolist(), [0x80] * 2 + fm + [0x80] * 94)
#
self.chip['SEQ'].set_wait(0)
self.chip['PULSE_GEN'].start()
while(not self.chip['SEQ'].is_done()):
pass
ret = self.chip['SEQ_REC'].get_data(size=rec_size)
lpat = pattern[12:]
mu_pat = pattern + lpat * 3
fm = []
for i in mu_pat:
fm += [i, i, i]
self.assertEqual(ret.tolist(), [0x80] * 2 + fm + [0x80] * (94 + 4 * 3 * 3))
# nested loop test
pattern = [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16]
self.chip['SEQ'].set_data(pattern)
self.chip['SEQ'].set_repeat(4)
self.chip['SEQ'].set_repeat_start(2)
self.chip['SEQ'].set_nested_start(8)
self.chip['SEQ'].set_nested_stop(12)
self.chip['SEQ'].set_nested_repeat(3)
self.chip['SEQ'].set_clk_divide(1)
self.chip['PULSE_GEN'].start()
while(not self.chip['SEQ'].is_done()):
pass
exp_pattern = [0x10, 0x10]
exp_pattern += pattern[0:2]
rep = pattern[2:8]
rep += pattern[8:12] * 3
rep += pattern[12:16]
exp_pattern += rep * 4
exp_pattern += [16] * 124
ret = self.chip['SEQ_REC'].get_data(size=rec_size)
self.assertEqual(ret.tolist(), exp_pattern)
def tearDown(self):
self.chip.close() # let it close connection and stop simulator
cocotb_compile_clean()示例11: TestSimTlu
# 需要导入模块: from basil.dut import Dut [as 别名]
# 或者: from basil.dut.Dut import close [as 别名]
#.........这里部分代码省略.........
def test_simple_trigger_max_triggers(self):
self.chip['tlu'].TRIGGER_COUNTER = 0
self.chip['tlu'].MAX_TRIGGERS = 2
self.chip['tlu'].TRIGGER_MODE = 0
self.chip['tlu'].TRIGGER_SELECT = 2
self.chip['tlu'].TRIGGER_VETO_SELECT = 252
# self.chip['CONTROL']['ENABLE'] = 1
self.chip['gpio'].set_data([0x01])
self.chip['gpio'].set_data([0x03]) # trigger
self.chip['gpio'].set_data([0x01])
self.chip['gpio'].set_data([0x03]) # trigger
self.chip['gpio'].set_data([0x01])
self.chip['gpio'].set_data([0x03]) # trigger
self.chip['gpio'].set_data([0x01])
self.chip['gpio'].set_data([0x03]) # trigger
self.chip['gpio'].set_data([0x01])
# self.chip['CONTROL']['ENABLE'] = 0
self.chip['gpio'].set_data([0x00])
self.assertEqual(self.chip['sram'].get_fifo_int_size(), 2)
self.assertEqual(self.chip['tlu'].TRIGGER_COUNTER, 2)
data = self.chip['sram'].get_data()
self.assertEqual(data[0], 0x80000000 + 0)
self.assertEqual(data[1], 0x80000000 + 1)
def test_simple_trigger(self):
self.chip['tlu'].TRIGGER_COUNTER = 10
self.chip['tlu'].TRIGGER_MODE = 0
self.chip['tlu'].TRIGGER_SELECT = 1
self.chip['tlu'].TRIGGER_VETO_SELECT = 0
# self.chip['CONTROL']['ENABLE'] = 1
self.chip['gpio'].set_data([0x01])
readings = 0
while(self.chip['sram'].get_fifo_int_size() < 4 and readings < 1000):
readings += 1
# self.chip['CONTROL']['ENABLE'] = 0
self.chip['gpio'].set_data([0x00])
self.assertGreaterEqual(self.chip['sram'].get_fifo_int_size(), 4)
self.assertGreaterEqual(self.chip['tlu'].TRIGGER_COUNTER, 14)
data = self.chip['sram'].get_data()
self.assertEqual(data[0], 0x80000000 + 10)
self.assertEqual(data[1], 0x80000000 + 11)
self.assertEqual(data[2], 0x80000000 + 12)
self.assertEqual(data[3], 0x80000000 + 13)
def test_tlu_trigger_handshake(self):
self.chip['tlu'].TRIGGER_COUNTER = 0
self.chip['tlu'].TRIGGER_MODE = 3
self.chip['tlu'].TRIGGER_VETO_SELECT = 255
self.chip['tlu'].EN_TLU_VETO = 0
# self.chip['CONTROL']['ENABLE'] = 1
self.chip['gpio'].set_data([0x01])
readings = 0
while(self.chip['sram'].get_fifo_int_size() < 4 and readings < 1000):
readings += 1
# self.chip['CONTROL']['ENABLE'] = 0
self.chip['gpio'].set_data([0x00])
self.assertGreaterEqual(self.chip['sram'].get_fifo_int_size(), 4)
self.assertGreaterEqual(self.chip['tlu'].TRIGGER_COUNTER, 4)
self.assertGreaterEqual(self.chip['tlu'].CURRENT_TLU_TRIGGER_NUMBER, 3)
data = self.chip['sram'].get_data()
self.assertEqual(data[0], 0x80000000)
self.assertEqual(data[1], 0x80000001)
self.assertEqual(data[2], 0x80000002)
self.assertEqual(data[3], 0x80000003)
def test_tlu_trigger_handshake_veto(self):
self.chip['tlu'].TRIGGER_COUNTER = 0
self.chip['tlu'].TRIGGER_MODE = 3
self.chip['tlu'].TRIGGER_VETO_SELECT = 1
self.chip['tlu'].EN_TLU_VETO = 1
# self.chip['CONTROL']['ENABLE'] = 1
self.chip['gpio'].set_data([0x01])
readings = 0
while(self.chip['sram'].get_fifo_int_size() == 0 and readings < 1000):
readings += 1
self.assertEqual(self.chip['sram'].get_fifo_int_size(), 0)
self.assertEqual(self.chip['tlu'].TRIGGER_COUNTER, 0)
self.assertEqual(self.chip['tlu'].CURRENT_TLU_TRIGGER_NUMBER, 0)
def tearDown(self):
self.chip.close() # let it close connection and stop simulator
cocotb_compile_clean()示例12: TestSimJtagGpio
# 需要导入模块: from basil.dut import Dut [as 别名]
# 或者: from basil.dut.Dut import close [as 别名]
#.........这里部分代码省略.........
def test_gpio(self):
ID_CODE = BitLogic('0010')
BYPASS = BitLogic('1111')
DEBUG = BitLogic('1000')
ret_ir = BitLogic('0101')
# TEST REG INIT
dev1ret = StdRegister(driver=None, conf=yaml.load(gpio_yaml))
dev1ret.init()
dev1ret['F1'] = 0x1
dev1ret['F2'] = 0x2f
dev1ret['F3'] = 0x2
dev1ret['F4'] = 0x17cf4
self.assertEqual(dev1ret[:], self.chip['DEV1'][:])
self.chip['DEV1']['F2'] = 0
self.assertFalse(dev1ret[:] == self.chip['DEV1'][:])
self.chip.set_configuration(init_yaml)
self.assertEqual(dev1ret[:], self.chip['DEV1'][:])
self.chip['jtag'].reset()
# IR CODE
ret = self.chip['jtag'].scan_ir([ID_CODE] * 2)
self.assertEqual(ret, [ret_ir] * 2)
# ID CODE
id_code = BitLogic.from_value(0x149B51C3, fmt='I')
ret = self.chip['jtag'].scan_dr(['0' * 32] * 2)
self.assertEqual(ret, [id_code] * 2)
# BYPASS + ID CODE
bypass_code = BitLogic('0')
ret = self.chip['jtag'].scan_ir([ID_CODE, BYPASS])
self.assertEqual(ret, [ret_ir] * 2)
ret = self.chip['jtag'].scan_dr(['0' * 32, '1'])
self.assertEqual(ret, [id_code, bypass_code])
ret = self.chip['jtag'].scan_ir([BYPASS, ID_CODE])
self.assertEqual(ret, [ret_ir] * 2)
ret = self.chip['jtag'].scan_dr(['1', '0' * 32])
self.assertEqual(ret, [bypass_code, id_code])
# DEBUG
ret = self.chip['jtag'].scan_ir([DEBUG, DEBUG])
self.assertEqual(ret, [ret_ir] * 2)
self.chip['jtag'].scan_dr(['1' * 32, '0' * 1 + '1' * 30 + '0' * 1])
ret = self.chip['jtag'].scan_dr(['0' * 32, '1' * 32])
self.assertEqual(ret, [BitLogic('1' * 32), BitLogic('0' * 1 + '1' * 30 + '0' * 1)])
ret = self.chip['jtag'].scan_dr(['0' * 32, '0' * 32])
self.assertEqual(ret, [BitLogic('0' * 32), BitLogic('1' * 32)])
# SHIT IN DEV REG/DEBUG
self.chip['jtag'].scan_dr([self.chip['DEV1'][:], self.chip['DEV2'][:]])
# GPIO RETURN
dev1ret.frombytes(self.chip['gpio_dev1'].get_data())
self.assertEqual(dev1ret[:], self.chip['DEV1'][:])
self.assertFalse(dev1ret[:] == self.chip['DEV2'][:])
dev1ret.frombytes(self.chip['gpio_dev2'].get_data())
self.assertEqual(dev1ret[:], self.chip['DEV2'][:])
# JTAG RETURN
ret = self.chip['jtag'].scan_dr(['0' * 32, '0' * 32])
dev1ret.set(ret[0])
self.assertEqual(dev1ret[:], self.chip['DEV1'][:])
dev1ret.set(ret[1])
self.assertEqual(dev1ret[:], self.chip['DEV2'][:])
# REPEATING REGISTER
self.chip['jtag'].scan_dr([self.chip['DEV'][:]])
ret1 = self.chip['jtag'].scan_dr([self.chip['DEV'][:]])
self.chip['jtag'].scan_dr([self.chip['DEV1'][:], self.chip['DEV2'][:]])
ret2 = self.chip['jtag'].scan_dr([self.chip['DEV1'][:] + self.chip['DEV2'][:]])
ret3 = self.chip['jtag'].scan_dr([self.chip['DEV1'][:] + self.chip['DEV2'][:]])
self.assertEqual(ret1[:], ret2[:])
self.assertEqual(ret2[:], ret3[:])
# REPEATING SETTING
self.chip['jtag'].scan_dr(['1' * 32 + '0' * 32])
ret = self.chip['jtag'].scan_dr(['0' * 32 + '0' * 32])
self.chip['DEV'].set(ret[0])
self.assertEqual(self.chip['DEV'][:], BitLogic('0' * 32 + '1' * 32))
self.chip['jtag'].scan_dr([self.chip['DEV1'][:] + self.chip['DEV2'][:]])
ret = self.chip['jtag'].scan_dr([self.chip['DEV1'][:] + self.chip['DEV2'][:]])
self.chip['DEV'].set(ret[0])
self.assertEqual(self.chip['DEV'][:], self.chip['DEV1'][:] + self.chip['DEV2'][:])
def tearDown(self):
self.chip.close() # let it close connection and stop simulator
cocotb_compile_clean()