Python TritonContext.setArchitecture方法代码示例

# 需要导入模块: from triton import TritonContext [as 别名]
# 或者: from triton.TritonContext import setArchitecture [as 别名]
    def test_taint_union_register_memory(self):
        """Check tainting union register U memory."""
        Triton = TritonContext()
        Triton.setArchitecture(ARCH.X86_64)

        self.assertFalse(Triton.isRegisterTainted(Triton.registers.rax))
        Triton.taintRegister(Triton.registers.rax)
        self.assertTrue(Triton.isRegisterTainted(Triton.registers.rax))

        Triton.taintUnionRegisterMemory(Triton.registers.rax, MemoryAccess(0x2000, 4))
        self.assertTrue(Triton.isRegisterTainted(Triton.registers.rax))
        self.assertFalse(Triton.isMemoryTainted(MemoryAccess(0x2000, 4)))

        Triton.untaintRegister(Triton.registers.rax)
        self.assertFalse(Triton.isRegisterTainted(Triton.registers.rax))

        Triton.taintUnionRegisterMemory(Triton.registers.rax, MemoryAccess(0x2000, 4))
        self.assertFalse(Triton.isRegisterTainted(Triton.registers.rax))
        self.assertFalse(Triton.isMemoryTainted(MemoryAccess(0x2000, 4)))

        # !T U T
        Triton.untaintRegister(Triton.registers.rax)
        Triton.taintMemory(MemoryAccess(0x2000, 4))
        Triton.taintUnionRegisterMemory(Triton.registers.rax, MemoryAccess(0x2000, 4))
        self.assertTrue(Triton.isRegisterTainted(Triton.registers.rax))
        self.assertTrue(Triton.isMemoryTainted(MemoryAccess(0x2000, 4)))

        # T U T
        Triton.taintRegister(Triton.registers.rax)
        Triton.taintMemory(MemoryAccess(0x2000, 4))
        Triton.taintUnionRegisterMemory(Triton.registers.rax, MemoryAccess(0x2000, 4))
        self.assertTrue(Triton.isRegisterTainted(Triton.registers.rax))
        self.assertTrue(Triton.isMemoryTainted(MemoryAccess(0x2000, 4)))

# 需要导入模块: from triton import TritonContext [as 别名]
# 或者: from triton.TritonContext import setArchitecture [as 别名]
class TestNegativeImmediate(unittest.TestCase):

    """Testing the Immediate class."""

    def setUp(self):
        self.Triton = TritonContext()
        self.Triton.setArchitecture(ARCH.X86_64)

    def test_value(self):
        """Check immediate value with different size."""
        self.imm = Immediate(-4, CPUSIZE.BYTE)
        self.assertEqual(self.imm.getValue(), 0xfc)

        self.imm = Immediate(-4, CPUSIZE.WORD)
        self.assertEqual(self.imm.getValue(), 0xfffc)

        self.imm = Immediate(-4, CPUSIZE.DWORD)
        self.assertEqual(self.imm.getValue(), 0xfffffffc)

        self.imm = Immediate(-4, CPUSIZE.QWORD)
        self.assertEqual(self.imm.getValue(), 0xfffffffffffffffc)

        self.imm = Immediate(0x7123456789abcdef, CPUSIZE.QWORD)
        self.assertEqual(self.imm.getValue(), 0x7123456789abcdef)

        self.imm = Immediate(0x8123456789abcdef, CPUSIZE.QWORD)
        self.assertEqual(self.imm.getValue(), 0x8123456789abcdef)

# 需要导入模块: from triton import TritonContext [as 别名]
# 或者: from triton.TritonContext import setArchitecture [as 别名]
class TestAHRegister(unittest.TestCase):

    """Testing the Register class with AH."""

    def setUp(self):
        """Define arch and register to check."""
        self.Triton = TritonContext()
        self.Triton.setArchitecture(ARCH.X86_64)
        self.reg = self.Triton.registers.ah

    def test_size(self):
        """Check register size."""
        self.assertEqual(self.reg.getSize(), 1)

    def test_bitvector(self):
        """Check bitvector information."""
        self.assertEqual(self.reg.getBitvector().getHigh(), 15)
        self.assertEqual(self.reg.getBitvector().getLow(), 8)
        self.assertEqual(self.reg.getBitvector().getVectorSize(), 8)

    def test_parent(self):
        """Check parent register on multiple arch."""
        self.assertEqual(self.Triton.getParentRegister(self.reg).getName(), "rax")

        self.Triton.setArchitecture(ARCH.X86)
        self.reg = self.Triton.registers.ah
        self.assertEqual(self.Triton.getParentRegister(self.reg).getName(), "eax")
        self.assertEqual(self.Triton.getParentRegister(self.reg).getBitSize(), 32)

# 需要导入模块: from triton import TritonContext [as 别名]
# 或者: from triton.TritonContext import setArchitecture [as 别名]
class TestImmediate64(unittest.TestCase):

    """Testing the Immediate class."""

    def setUp(self):
        """Define the arch and Immediate to test."""
        self.Triton = TritonContext()
        self.Triton.setArchitecture(ARCH.X86_64)
        self.imm = Immediate(0x0123456789abcdef, CPUSIZE.QWORD)

    def test_bit_size(self):
        """Check the bitsize."""
        self.assertEqual(self.imm.getBitSize(), 64)

    def test_size(self):
        """Check the size."""
        self.assertEqual(self.imm.getSize(), 8)

    def test_value(self):
        """Check immediate value with different size."""
        self.assertEqual(self.imm.getValue(), 0x0123456789abcdef)

    def test_type(self):
        """Check immadiate type."""
        self.assertEqual(self.imm.getType(), OPERAND.IMM)

# 需要导入模块: from triton import TritonContext [as 别名]
# 或者: from triton.TritonContext import setArchitecture [as 别名]
    def test_taint_assignement_memory_register(self):
        """Check tainting assignment memory <- register."""
        Triton = TritonContext()
        Triton.setArchitecture(ARCH.X86_64)

        Triton.taintMemory(MemoryAccess(0x2000, 8))
        self.assertTrue(Triton.isMemoryTainted(MemoryAccess(0x2000, 8)))

        Triton.taintAssignmentMemoryRegister(MemoryAccess(0x2002, 2), Triton.registers.ax)
        self.assertTrue(Triton.isMemoryTainted(MemoryAccess(0x2000, 1)))
        self.assertTrue(Triton.isMemoryTainted(MemoryAccess(0x2001, 1)))
        self.assertFalse(Triton.isMemoryTainted(MemoryAccess(0x2002, 1)))
        self.assertFalse(Triton.isMemoryTainted(MemoryAccess(0x2003, 1)))
        self.assertTrue(Triton.isMemoryTainted(MemoryAccess(0x2004, 1)))
        self.assertTrue(Triton.isMemoryTainted(MemoryAccess(0x2005, 1)))
        self.assertTrue(Triton.isMemoryTainted(MemoryAccess(0x2006, 1)))
        self.assertTrue(Triton.isMemoryTainted(MemoryAccess(0x2007, 1)))

        Triton.taintMemory(MemoryAccess(0x2000, 8))
        self.assertTrue(Triton.isMemoryTainted(MemoryAccess(0x2000, 8)))

        Triton.taintAssignmentMemoryRegister(MemoryAccess(0x1fff, 8), Triton.registers.rax)
        self.assertFalse(Triton.isMemoryTainted(MemoryAccess(0x1fff, 1)))
        self.assertFalse(Triton.isMemoryTainted(MemoryAccess(0x2000, 1)))
        self.assertFalse(Triton.isMemoryTainted(MemoryAccess(0x2001, 1)))
        self.assertFalse(Triton.isMemoryTainted(MemoryAccess(0x2002, 1)))
        self.assertFalse(Triton.isMemoryTainted(MemoryAccess(0x2003, 1)))
        self.assertFalse(Triton.isMemoryTainted(MemoryAccess(0x2004, 1)))
        self.assertFalse(Triton.isMemoryTainted(MemoryAccess(0x2005, 1)))
        self.assertFalse(Triton.isMemoryTainted(MemoryAccess(0x2006, 1)))
        self.assertTrue(Triton.isMemoryTainted(MemoryAccess(0x2007, 1)))

# 需要导入模块: from triton import TritonContext [as 别名]
# 或者: from triton.TritonContext import setArchitecture [as 别名]
    def test_1(self):
        ctx = TritonContext()
        ctx.setArchitecture(ARCH.X86_64)
        ctx.enableMode(MODE.ONLY_ON_TAINTED, False)
        self.assertEqual(ctx.isModeEnabled(MODE.ONLY_ON_TAINTED), False)

        inst = Instruction("\x48\x89\xc3") # mov rbx, rax
        self.assertTrue(ctx.processing(inst))
        self.assertTrue(checkAstIntegrity(inst))

        self.assertEqual(len(inst.getReadRegisters()), 1)
        self.assertEqual(len(inst.getWrittenRegisters()), 2)

        ctx.enableMode(MODE.ONLY_ON_TAINTED, True)
        self.assertEqual(ctx.isModeEnabled(MODE.ONLY_ON_TAINTED), True)

        self.assertTrue(ctx.processing(inst))
        self.assertTrue(checkAstIntegrity(inst))

        self.assertEqual(len(inst.getSymbolicExpressions()), 0)
        self.assertEqual(len(inst.getReadRegisters()), 0)
        self.assertEqual(len(inst.getReadImmediates()), 0)
        self.assertEqual(len(inst.getWrittenRegisters()), 0)
        self.assertEqual(len(inst.getLoadAccess()), 0)
        self.assertEqual(len(inst.getStoreAccess()), 0)

# 需要导入模块: from triton import TritonContext [as 别名]
# 或者: from triton.TritonContext import setArchitecture [as 别名]
    def test_taint_assignement_memory_memory(self):
        """Check tainting assignment memory <- memory."""
        Triton = TritonContext()
        Triton.setArchitecture(ARCH.X86_64)

        Triton.taintMemory(MemoryAccess(0x2000, 1))
        self.assertTrue(Triton.isMemoryTainted(MemoryAccess(0x2000, 1)))

        Triton.taintAssignmentMemoryMemory(MemoryAccess(0x1000, 1), MemoryAccess(0x2000, 1))
        self.assertTrue(Triton.isMemoryTainted(MemoryAccess(0x1000, 1)))
        self.assertTrue(Triton.isMemoryTainted(MemoryAccess(0x2000, 1)))

        Triton.taintAssignmentMemoryMemory(MemoryAccess(0x1000, 1), MemoryAccess(0x3000, 1))
        Triton.taintAssignmentMemoryMemory(MemoryAccess(0x2000, 1), MemoryAccess(0x3000, 1))
        self.assertFalse(Triton.isMemoryTainted(MemoryAccess(0x1000, 1)))
        self.assertFalse(Triton.isMemoryTainted(MemoryAccess(0x2000, 1)))

        Triton.taintMemory(MemoryAccess(0x2000, 4))
        self.assertTrue(Triton.isMemoryTainted(MemoryAccess(0x2000, 4)))

        Triton.taintAssignmentMemoryMemory(MemoryAccess(0x2001, 2), MemoryAccess(0x3000, 1))
        self.assertTrue(Triton.isMemoryTainted(MemoryAccess(0x2000, 1)))
        self.assertFalse(Triton.isMemoryTainted(MemoryAccess(0x2001, 1)))
        self.assertFalse(Triton.isMemoryTainted(MemoryAccess(0x2001, 1)))
        self.assertTrue(Triton.isMemoryTainted(MemoryAccess(0x2000, 1)))

# 需要导入模块: from triton import TritonContext [as 别名]
# 或者: from triton.TritonContext import setArchitecture [as 别名]
class TestRAXBitvector(unittest.TestCase):

    """Testing the Bitvector class."""

    def setUp(self):
        """Define the arch."""
        self.Triton = TritonContext()
        self.Triton.setArchitecture(ARCH.X86_64)
        self.bv = self.Triton.registers.rax.getBitvector()

    def test_high(self):
        """Check the highest bit."""
        self.assertEqual(self.bv.getHigh(), 63)

    def test_low(self):
        """Check the lower bit."""
        self.assertEqual(self.bv.getLow(), 0)

    def test_size(self):
        """Check the vector size."""
        self.assertEqual(self.bv.getVectorSize(), 64)

    def test_maxValue(self):
        """Check the max value of the vector."""
        self.assertEqual(self.bv.getMaxValue(), 0xffffffffffffffff)

# 需要导入模块: from triton import TritonContext [as 别名]
# 或者: from triton.TritonContext import setArchitecture [as 别名]
class TestX8664ConcreteMemoryValue(unittest.TestCase):

    """Testing the X86 concrete value api."""

    def setUp(self):
        """Define the arch."""
        self.Triton = TritonContext()
        self.Triton.setArchitecture(ARCH.X86_64)

    def test_set_get_concrete_value(self):
        base = 0x2000
        size = 512
        count = 1

        self.assertFalse(self.Triton.isMemoryMapped(base, size))

        for x in range(size):
            self.Triton.setConcreteMemoryValue(base + x, count & 0xff)
            self.assertEqual(self.Triton.getConcreteMemoryValue(base + x), count & 0xff)
            count += 1

        self.assertTrue(self.Triton.isMemoryMapped(base, size))
        self.Triton.unmapMemory(base, size)
        self.assertFalse(self.Triton.isMemoryMapped(base, size))

        self.Triton.setConcreteMemoryAreaValue(0x1000, "\x11\x22\x33\x44\x55\x66")
        self.Triton.setConcreteMemoryAreaValue(0x1006, [0x77, 0x88, 0x99, 0xaa, 0xbb, 0xcc])
        self.assertEqual(self.Triton.getConcreteMemoryAreaValue(0x1000, 12), "\x11\x22\x33\x44\x55\x66\x77\x88\x99\xaa\xbb\xcc")

# 需要导入模块: from triton import TritonContext [as 别名]
# 或者: from triton.TritonContext import setArchitecture [as 别名]
class TestX86Arch(unittest.TestCase):

    """Testing the X86 Architecture."""

    def setUp(self):
        """Define the arch."""
        self.Triton = TritonContext()
        self.assertFalse(self.Triton.isArchitectureValid())
        self.Triton.setArchitecture(ARCH.X86)
        self.assertTrue(self.Triton.isArchitectureValid())

    def test_registers(self):
        """Check some register can't be accessed on X86 arch."""
        with self.assertRaises(Exception):
            self.Triton.registers.rax.getName()

        with self.assertRaises(Exception):
            self.Triton.registers.zmm1.getName()

        with self.assertRaises(Exception):
            self.Triton.registers.xmm8.getName()

        with self.assertRaises(Exception):
            self.Triton.registers.xmm15.getName()

        self.assertEqual(self.Triton.registers.xmm7.getName(), "xmm7")

    def test_register_bit_size(self):
        """Check GPR register bit size."""
        self.assertEqual(self.Triton.getRegisterBitSize(), 32)

    def test_register_size(self):
        """Check GPR register size."""
        self.assertEqual(self.Triton.getRegisterSize(), 4)

# 需要导入模块: from triton import TritonContext [as 别名]
# 或者: from triton.TritonContext import setArchitecture [as 别名]
    def test_taint_union_register_register(self):
        """Check tainting union register U register."""
        Triton = TritonContext()
        Triton.setArchitecture(ARCH.X86_64)

        self.assertFalse(Triton.isRegisterTainted(Triton.registers.rax))
        Triton.taintRegister(Triton.registers.rax)
        self.assertTrue(Triton.isRegisterTainted(Triton.registers.rax))

        Triton.taintUnionRegisterRegister(Triton.registers.rax, Triton.registers.rbx)
        self.assertTrue(Triton.isRegisterTainted(Triton.registers.rax))
        self.assertFalse(Triton.isRegisterTainted(Triton.registers.rbx))

        Triton.taintRegister(Triton.registers.rbx)
        Triton.taintUnionRegisterRegister(Triton.registers.rax, Triton.registers.rbx)
        self.assertTrue(Triton.isRegisterTainted(Triton.registers.rax))
        self.assertTrue(Triton.isRegisterTainted(Triton.registers.rbx))

        Triton.untaintRegister(Triton.registers.rax)
        Triton.taintRegister(Triton.registers.rbx)
        Triton.taintUnionRegisterRegister(Triton.registers.rax, Triton.registers.rbx)
        self.assertTrue(Triton.isRegisterTainted(Triton.registers.rax))
        self.assertTrue(Triton.isRegisterTainted(Triton.registers.rbx))

        Triton.untaintRegister(Triton.registers.rax)
        Triton.untaintRegister(Triton.registers.rbx)
        Triton.taintUnionRegisterRegister(Triton.registers.rax, Triton.registers.rbx)
        self.assertFalse(Triton.isRegisterTainted(Triton.registers.rax))
        self.assertFalse(Triton.isRegisterTainted(Triton.registers.rbx))

# 需要导入模块: from triton import TritonContext [as 别名]
# 或者: from triton.TritonContext import setArchitecture [as 别名]
class TestAstDictionaries(unittest.TestCase):

    """Testing the AST_DICTIONARIES."""

    def setUp(self):
        """Define the arch."""
        self.Triton = TritonContext()
        self.Triton.setArchitecture(ARCH.X86_64)
        self.Triton.enableMode(MODE.AST_DICTIONARIES, True)
        self.astCtxt = self.Triton.getAstContext()

    def test_dictionaries(self):
        # d is empty
        d = self.Triton.getAstDictionariesStats()
        for k, v in d.items():
            self.assertEqual(v, 0)

        bv1 = self.astCtxt.bv(1, 8)
        bv2 = self.astCtxt.bv(2, 8)

        d = self.Triton.getAstDictionariesStats()
        self.assertEqual(d['bv'], 2)
        self.assertEqual(d['decimal'], 3)
        self.assertEqual(d['allocatedDictionaries'], 5)
        self.assertEqual(d['allocatedNodes'], 6)

        # Same allocation
        bv1 = self.astCtxt.bv(1, 8)
        bv2 = self.astCtxt.bv(2, 8)

        d = self.Triton.getAstDictionariesStats()
        self.assertEqual(d['bv'], 2)
        self.assertEqual(d['decimal'], 3)
        self.assertEqual(d['allocatedDictionaries'], 5)
        self.assertEqual(d['allocatedNodes'], 12)

# 需要导入模块: from triton import TritonContext [as 别名]
# 或者: from triton.TritonContext import setArchitecture [as 别名]
class TestPathConstraint(unittest.TestCase):

    """Testing path constraint."""

    def setUp(self):
        """Define the arch."""
        self.ctx = TritonContext()
        self.ctx.setArchitecture(ARCH.X86)

        trace = [
            "\x25\xff\xff\xff\x3f",      # and eax, 0x3fffffff
            "\x81\xe3\xff\xff\xff\x3f",  # and ebx, 0x3fffffff
            "\x31\xd1",                  # xor ecx, edx
            "\x31\xfa",                  # xor edx, edi
            "\x31\xD8",                  # xor eax, ebx
            "\x0F\x84\x55\x00\x00\x00",  # je 0x55
        ]

        self.ctx.convertRegisterToSymbolicVariable(self.ctx.registers.eax)
        self.ctx.convertRegisterToSymbolicVariable(self.ctx.registers.ebx)

        for opcodes in trace:
            self.ctx.processing(Instruction(opcodes))

    def test_getPathConstraintsAst(self):
        """Test getPathConstraintsAst"""
        astCtx = self.ctx.getAstContext()
        crst = self.ctx.getPathConstraintsAst()
        self.assertNotEqual(len(self.ctx.getModel(crst)), 0)
        self.assertNotEqual(len(self.ctx.getModel(astCtx.lnot(crst))), 0)

    def test_getPathConstraints(self):
        """Test getPathConstraints"""
        pco = self.ctx.getPathConstraints()
        self.assertEqual(len(pco), 1)

    def test_isMultipleBranches(self):
        pc = self.ctx.getPathConstraints()[0]
        self.assertTrue(pc.isMultipleBranches())

    def test_getTakenPathConstraintAst(self):
        pc = self.ctx.getPathConstraints()[0]
        self.assertEqual(pc.getTakenPathConstraintAst().evaluate(), 1)

    def test_getTakenAddress(self):
        pc = self.ctx.getPathConstraints()[0]
        self.assertEqual(pc.getTakenAddress(), 91)

    def test_getBranchConstraints(self):
        pc = self.ctx.getPathConstraints()[0].getBranchConstraints()

        self.assertTrue(pc[0]['isTaken'])
        self.assertFalse(pc[1]['isTaken'])

        self.assertEqual(pc[0]['srcAddr'], pc[1]['srcAddr'])

        self.assertEqual(pc[0]['dstAddr'], 91)
        self.assertEqual(pc[1]['dstAddr'], 23)

# 需要导入模块: from triton import TritonContext [as 别名]
# 或者: from triton.TritonContext import setArchitecture [as 别名]
class TestX8664ConcreteRegisterValue(unittest.TestCase):

    """Testing the X86_64 concrete value api."""

    def setUp(self):
        """Define the arch."""
        self.Triton = TritonContext()
        self.Triton.setArchitecture(ARCH.X86_64)
        self.ar = self.Triton.getAllRegisters()
        self.pr = self.Triton.getParentRegisters()

    def test_all_registers(self):
        """Check all registers"""
        self.assertEqual(len(self.ar), 199)

    def test_parent_registers(self):
        """Check parent registers"""
        self.assertEqual(len(self.pr), 145)

    def test_set_get_concrete_value(self):
        """Check setting concrete values"""
        for r in self.pr:
            if r.getBitSize() == 32:
                self.Triton.setConcreteRegisterValue(r, 0xdeadbeaf)
            elif r.getBitSize() == 64:
                self.Triton.setConcreteRegisterValue(r, 0xabcdef0123456789)
            elif r.getBitSize() == 128:
                self.Triton.setConcreteRegisterValue(r, 0xabcdef01234567899876543210fedcba)
            elif r.getBitSize() == 256:
                self.Triton.setConcreteRegisterValue(r, 0xabcdef01234567899876543210fedcbaabcdef01234567899876543210fedcba)
            elif r.getBitSize() == 512:
                self.Triton.setConcreteRegisterValue(r, 0xabcdef01234567899876543210fedcbaabcdef01234567899876543210fedcbaabcdef01234567899876543210fedcbaabcdef01234567899876543210fedcba)
            else:
                pass

        """Check getting concrete values"""
        for r in self.pr:
            if r.getBitSize() == 32:
                self.assertEqual(self.Triton.getConcreteRegisterValue(r), 0xdeadbeaf)
            elif r.getBitSize() == 64:
                self.assertEqual(self.Triton.getConcreteRegisterValue(r), 0xabcdef0123456789)
            elif r.getBitSize() == 128:
                self.assertEqual(self.Triton.getConcreteRegisterValue(r), 0xabcdef01234567899876543210fedcba)
            elif r.getBitSize() == 256:
                self.assertEqual(self.Triton.getConcreteRegisterValue(r), 0xabcdef01234567899876543210fedcbaabcdef01234567899876543210fedcba)
            elif r.getBitSize() == 512:
                self.assertEqual(self.Triton.getConcreteRegisterValue(r), 0xabcdef01234567899876543210fedcbaabcdef01234567899876543210fedcbaabcdef01234567899876543210fedcbaabcdef01234567899876543210fedcba)
            else:
                pass

        """Set everything to zero"""
        for r in self.ar:
            self.Triton.setConcreteRegisterValue(r, 0)

        """Check if everything is equal to zero"""
        for r in self.ar:
            self.assertEqual(self.Triton.getConcreteRegisterValue(r), 0)

# 需要导入模块: from triton import TritonContext [as 别名]
# 或者: from triton.TritonContext import setArchitecture [as 别名]
class TestArchitecture(unittest.TestCase):

    """Testing the architectures."""

    def test_modify_arch(self):
        """Check we can change arch at anytime."""
        self.Triton = TritonContext()
        for _ in xrange(10):
            self.Triton.setArchitecture(random.choice((ARCH.X86_64, ARCH.X86)))