本文整理汇总了Python中migen.sim.generic.Simulator.rd方法的典型用法代码示例。如果您正苦于以下问题：Python Simulator.rd方法的具体用法？Python Simulator.rd怎么用？Python Simulator.rd使用的例子？那么恭喜您, 这里精选的方法代码示例或许可以为您提供帮助。您也可以进一步了解该方法所在类migen.sim.generic.Simulator的用法示例。
在下文中一共展示了Simulator.rd方法的3个代码示例，这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞，您的评价将有助于系统推荐出更棒的Python代码示例。
示例1: TestPassCPU
# 需要导入模块: from migen.sim.generic import Simulator [as 别名]
# 或者: from migen.sim.generic.Simulator import rd [as 别名]
class TestPassCPU(unittest.TestCase):
def setUp(self):
self.cpu = PassCPU()
self.sim = Simulator(self.cpu, TopLevel())
def tearDown(self):
self.sim.close()
def testBasic(self):
self.sim.wr(self.cpu.a, 1)
self.sim.run(1)
self.assertEqual(self.sim.rd(self.cpu.x), 1)
self.sim.wr(self.cpu.a, 0)
self.sim.run(1)
self.assertEqual(self.sim.rd(self.cpu.x), 0)示例2: TestFourBitAdderCPU
# 需要导入模块: from migen.sim.generic import Simulator [as 别名]
# 或者: from migen.sim.generic.Simulator import rd [as 别名]
class TestFourBitAdderCPU(unittest.TestCase):
def setUp(self):
self.cpu = FourBitAdderCPU()
self.sim = Simulator(self.cpu, TopLevel())
def tearDown(self):
self.sim.close()
def testBasic(self):
self.sim.wr(self.cpu.op_a, 0)
self.sim.wr(self.cpu.op_b, 0)
self.sim.run(1)
self.assertEqual(self.sim.rd(self.cpu.sum_out), 0)
self.sim.wr(self.cpu.op_a, 1)
self.sim.run(1)
self.assertEqual(self.sim.rd(self.cpu.sum_out), 1)
self.sim.wr(self.cpu.op_b, 1)
self.sim.run(1)
self.assertEqual(self.sim.rd(self.cpu.sum_out), 2)
self.sim.wr(self.cpu.op_b, 2)
self.sim.run(1)
self.assertEqual(self.sim.rd(self.cpu.sum_out), 3)
self.sim.wr(self.cpu.op_a, 12)
self.sim.run(1)
self.assertEqual(self.sim.rd(self.cpu.sum_out), 14)
self.sim.wr(self.cpu.op_b, 5)
self.sim.run(1)
self.assertEqual(self.sim.rd(self.cpu.sum_out), 1)示例3: TestHalfAdderCPU
# 需要导入模块: from migen.sim.generic import Simulator [as 别名]
# 或者: from migen.sim.generic.Simulator import rd [as 别名]
class TestHalfAdderCPU(unittest.TestCase):
def setUp(self):
self.cpu = HalfAdderCPU()
self.sim = Simulator(self.cpu, TopLevel())
def tearDown(self):
self.sim.close()
def testBasic(self):
self.sim.wr(self.cpu.op_a, 0)
self.sim.wr(self.cpu.op_b, 0)
self.sim.run(1)
self.assertEqual(self.sim.rd(self.cpu.sum_out), 0)
self.assertEqual(self.sim.rd(self.cpu.carry_out), 0)
self.sim.wr(self.cpu.op_a, 1)
self.sim.run(1)
self.assertEqual(self.sim.rd(self.cpu.sum_out), 1)
self.assertEqual(self.sim.rd(self.cpu.carry_out), 0)
self.sim.wr(self.cpu.op_b, 1)
self.sim.run(1)
self.assertEqual(self.sim.rd(self.cpu.sum_out), 0)
self.assertEqual(self.sim.rd(self.cpu.carry_out), 1)