Python Simulation.run方法代码示例

# 需要导入模块: import Simulation [as 别名]
# 或者: from Simulation import run [as 别名]
def main():
	battlesimulator = Master()
	battlesimulator.introMessage()
	setupPlayers = SetupPlayers()
	setupPlayers.askPlayer()
	battlesimulator.displayStats(Warrior(1, 2, 3), Warrior(4, 5, 6))
	warriorSet = WarriorSet(Warrior(1, 2, 3), Warrior(4, 5, 6))
	warriorSet.printWarriors()
	simulation = Simulation()
	simulation.setWarriors(Warrior(1, 2, 3), Warrior(4, 5, 6))
	simulation.run()

# 需要导入模块: import Simulation [as 别名]
# 或者: from Simulation import run [as 别名]
else:
	system.obj = options.obj
#Done addition by Tianyun

#Added by Tianyun for identifying debbie run from gem5 run
#if options.debbie is None:
#	print "Please sepcify debbie option"
#	sys.exit(1)
#else:
system.debbie = 0 #options.debbie
#Done addtion by Tianyun
system.cpu = [CPUClass(cpu_id=i) for i in xrange(options.num_cpus)]
Ruby.create_system(options, system, system.piobus, system._dma_ports)

for (i, cpu) in enumerate(system.cpu):
    #
    # Tie the cpu ports to the correct ruby system ports
    #
    cpu.createInterruptController()
    cpu.icache_port = system.ruby._cpu_ruby_ports[i].slave
    cpu.dcache_port = system.ruby._cpu_ruby_ports[i].slave
    if buildEnv['TARGET_ISA'] == "x86":
        cpu.itb.walker.port = system.ruby._cpu_ruby_ports[i].slave
        cpu.dtb.walker.port = system.ruby._cpu_ruby_ports[i].slave
        cpu.interrupts.pio = system.piobus.master
        cpu.interrupts.int_master = system.piobus.slave
        cpu.interrupts.int_slave = system.piobus.master

root = Root(full_system = True, system = system)
Simulation.run(options, root, system, FutureClass)

# 需要导入模块: import Simulation [as 别名]
# 或者: from Simulation import run [as 别名]
time_val2 = 4831843416


test_sys.f_a = RegisterInjectedFault( RegType = "int", Register = reg_num1, where = "all", when = ''.join([time_type, ":", str(time_val1)]), what = ''.join(["Flip", ":", str(1)]),threadId ="all", relative = True, occurrence = 0 , cores = np)
#test_sys.f_b = RegisterInjectedFault( RegType = "int", Register = reg_num2, where = "system.cpu1", when = ''.join([time_type, ":", str(time_val1)]), what = ''.join(["Flip", ":", str(2)]),threadId ="0", relative = True, occurrence = 0)
#test_sys.f_c = RegisterInjectedFault( RegType = "int", Register = reg_num3, where = "system.cpu1", when = ''.join([time_type, ":", str(time_val1)]), what = ''.join(["Flip", ":", str(3)]),threadId ="0", relative = True, occurrence = 0)
#test_sys.f_d = RegisterInjectedFault( RegType = "int", Register = reg_num4, where = "system.cpu1", when = ''.join([time_type, ":", str(time_val1)]), what = ''.join(["Flip", ":", str(4)]),threadId ="0", relative = True, occurrence = 0)
#test_sys.f_e = RegisterInjectedFault( RegType = "int", Register = reg_num5, where = "system.cpu1", when = ''.join([time_type, ":", str(time_val1)]), what = ''.join(["Flip", ":", str(5)]),threadId ="0", relative = True, occurrence = 0)
#test_sys.f_f = RegisterInjectedFault( RegType = "int", Register = reg_num6, where = "system.cpu1", when = ''.join([time_type, ":", str(time_val1)]), what = ''.join(["Flip", ":", str(6)]),threadId ="0", relative = True, occurrence = 0)
#test_sys.f_g = RegisterInjectedFault( RegType = "int", Register = reg_num7, where = "system.cpu1", when = ''.join([time_type, ":", str(time_val1)]), what = ''.join(["Flip", ":", str(7)]),threadId ="0", relative = True, occurrence = 0)
#test_sys.f_h = RegisterInjectedFault( RegType = "int", Register = reg_num8, where = "system.cpu1", when = ''.join([time_type, ":", str(time_val1)]), what = ''.join(["Flip", ":", str(8)]),threadId ="0", relative = True, occurrence = 0)

test_sys.f_i = RegisterInjectedFault( RegType = "int", Register = reg_num9, where = "system.cpu2", when = ''.join([time_type, ":", str(time_val2)]), what = ''.join(["Flip", ":", str(1)]),threadId ="all", relative = True, occurrence = 0 , cores = np)
#test_sys.f_k = RegisterInjectedFault( RegType = "int", Register = reg_num10, where = "system.cpu2", when = ''.join([time_type, ":", str(time_val2)]), what = ''.join(["Flip", ":", str(2)]),threadId ="1", relative = True, occurrence = 0)
#test_sys.f_l = RegisterInjectedFault( RegType = "int", Register = reg_num11, where = "system.cpu2", when = ''.join([time_type, ":", str(time_val2)]), what = ''.join(["Flip", ":", str(3)]),threadId ="1", relative = True, occurrence = 0)
#test_sys.f_m = RegisterInjectedFault( RegType = "int", Register = reg_num12, where = "system.cpu2", when = ''.join([time_type, ":", str(time_val2)]), what = ''.join(["Flip", ":", str(4)]),threadId ="1", relative = True, occurrence = 0)
#test_sys.f_o = RegisterInjectedFault( RegType = "int", Register = reg_num14, where = "system.cpu2", when = ''.join([time_type, ":", str(time_val2)]), what = ''.join(["Flip", ":", str(6)]),threadId ="1", relative = True, occurrence = 0)
#test_sys.f_n = RegisterInjectedFault( RegType = "int", Register = reg_num13, where = "system.cpu2", when = ''.join([time_type, ":", str(time_val2)]), what = ''.join(["Flip", ":", str(5)]),threadId ="1", relative = True, occurrence = 0)
#test_sys.f_p = RegisterInjectedFault( RegType = "int", Register = reg_num15, where = "system.cpu2", when = ''.join([time_type, ":", str(time_val2)]), what = ''.join(["Flip", ":", str(7)]),threadId ="1", relative = True, occurrence = 0)
#test_sys.f_q = RegisterInjectedFault( RegType = "int", Register = reg_num16, where = "system.cpu2", when = ''.join([time_type, ":", str(time_val2)]), what = ''.join(["Flip", ":", str(8)]),threadId ="1", relative = True, occurrence = 0)





#if options.firun == 1 :
#    test_sys.f1  = f
    

Simulation.run(options, root, test_sys, FutureClass)

# 需要导入模块: import Simulation [as 别名]
# 或者: from Simulation import run [as 别名]
                                               production_rate,
                                               production_rate/2.)
        #keep track fo the ID dict for the connection mapping
        id_map[node.ID] = sim_obj
        #add it to the sim
        sim.add(sim_obj)

    #also import the connections to use as well
    cons = net.edges()
    for i in range(0, len(cons)):
        con = cons[i]
        n1, n2 = con
        s1 = id_map[n1.ID]
        s2 = id_map[n2.ID]
        sim.network.add_edge(s1, s2)
    #Run the simulation

    sim.run()
    #set the seperator
    if(platform.system() == "Windows"):
        #windows
        sep = "\\"
    else:
        #linux/unix
        sep = "/"   
    
    #analyze the data
    print(sim_base_path)
    sa.get_simulation_metric_data(sim_base_path + sep + repr(sim_id) + sep)

# 需要导入模块: import Simulation [as 别名]
# 或者: from Simulation import run [as 别名]
    # instantiate an EtherSwitch
    switch = EtherSwitch()
    # instantiate distEtherLinks to connect switch ports
    # to other gem5 instances
    switch.portlink = [DistEtherLink(speed = options.ethernet_linkspeed,
                                      delay = options.ethernet_linkdelay,
                                      dist_rank = options.dist_rank,
                                      dist_size = options.dist_size,
                                      server_name = options.dist_server_name,
                                      server_port = options.dist_server_port,
                                      sync_start = options.dist_sync_start,
                                      sync_repeat = options.dist_sync_repeat,
                                      is_switch = True,
                                      num_nodes = options.dist_size)
                       for i in xrange(options.dist_size)]

    for (i, link) in enumerate(switch.portlink):
        link.int0 = switch.interface[i]

    return switch
# Add options
parser = optparse.OptionParser()
Options.addCommonOptions(parser)
Options.addFSOptions(parser)
(options, args) = parser.parse_args()

system = build_switch(options)
root = Root(full_system = True, system = system)
Simulation.run(options, root, None, None)

# 需要导入模块: import Simulation [as 别名]
# 或者: from Simulation import run [as 别名]
system.cpu[3].workload = multiprocesses[1]

if options.ruby:
    if not (options.cpu_type == "detailed" or options.cpu_type == "timing"):
        print >> sys.stderr, "Ruby requires TimingSimpleCPU or O3CPU!!"
        sys.exit(1)

    options.use_map = True
    Ruby.create_system(options, system)
    assert(options.num_cpus == len(system.ruby._cpu_ruby_ports))

    for i in xrange(np):
        ruby_port = system.ruby._cpu_ruby_ports[i]

        # Create the interrupt controller and connect its ports to Ruby
        system.cpu[i].createInterruptController()
        system.cpu[i].interrupts.pio = ruby_port.master
        system.cpu[i].interrupts.int_master = ruby_port.slave
        system.cpu[i].interrupts.int_slave = ruby_port.master

        # Connect the cpu's cache ports to Ruby
        system.cpu[i].icache_port = ruby_port.slave
        system.cpu[i].dcache_port = ruby_port.slave
else:
    system.system_port = system.membus.slave
    system.physmem.port = system.membus.master
    CacheConfig.config_cache(options, system)

root = Root(full_system = False, system = system)
Simulation.run(options, root, system, FutureClass,options.numpids)

# 需要导入模块: import Simulation [as 别名]
# 或者: from Simulation import run [as 别名]
    #
    cpu.clk_domain = clusters[1].cpu_clk_domain
    cpu.createThreads()
    cpu.createInterruptController()
    cpu.icache_port =  clusters[1].ruby._cpu_ruby_ports[i].slave
    cpu.dcache_port =  clusters[1].ruby._cpu_ruby_ports[i].slave
    if buildEnv['TARGET_ISA'] == "x86":
        cpu.itb.walker.port = clusters[1].ruby._cpu_ruby_ports[i].slave
        cpu.dtb.walker.port = clusters[1].ruby._cpu_ruby_ports[i].slave
        cpu.interrupts.pio = clusters[1].piobus.master
        cpu.interrupts.int_master = clusters[1].piobus.slave
        cpu.interrupts.int_slave = clusters[1].piobus.master

    clusters[1].ruby._cpu_ruby_ports[i].access_phys_mem = True '''

# Create the appropriate memory controllers and connect them to the
# PIO bus
clusters[0].mem_ctrls = [TestMemClass(range = r) for r in clusters[0].mem_ranges]
clusters[1].mem_ctrls = [TestMemClass(range = r) for r in clusters[1].mem_ranges]
for i in xrange(len(clusters[0].mem_ctrls)):
    clusters[0].mem_ctrls[i].port = clusters[0].piobus.master
for i in xrange(len(clusters[1].mem_ctrls)):
    clusters[1].mem_ctrls[i].port = clusters[1].piobus.master
#clusters[1].membus.master = clusters[1].membus.master[0]


root = Root(full_system = True, system = clusters[0])
Simulation.run(options, root, clusters, FutureClass)

# 需要导入模块: import Simulation [as 别名]
# 或者: from Simulation import run [as 别名]
# systems[1]._parent = root

# ruby.system1 = systems[1]

# root.system1 = systems[1]
# root.ruby = ruby

# systems[0].memories = systems[0].physmem

# root.system1 = systems[1]

# print "we are after making root!"
# root.ruby = ruby
for (i, vm) in enumerate(systems):
    if i != 0:
        exec ("root.system%d = systems[i]" % i)

# print root._children

# for sys in systems:
#    print "..."
#    print sys._children
# m5.instantiate()

# added to deal with
# panic: Can’t create socket:Too many open files !

# m5.disableAllListeners()

Simulation.run(options, root, ruby, FutureClass)

# 需要导入模块: import Simulation [as 别名]
# 或者: from Simulation import run [as 别名]
parser = optparse.OptionParser()
Options.addCommonOptions(parser)
Options.addFSOptions(parser)
(options, args) = parser.parse_args()
if args:
    print "Error: script doesn't take any positional arguments"
    sys.exit(1)

#### Build PRM system
prm = build_gm_system()
prm.cpn = CPNetwork()
prm.cpa = CPAdaptor(pci_bus=0, pci_dev=0x10, pci_func=0, InterruptLine=10,
                    InterruptPin=1);
# Connect CPA to PRM iobus
prm.cpa.pio    = prm.iobus.master
prm.cpa.config = prm.iobus.master
prm.cpa.dma    = prm.iobus.slave
# Connect CPA to CPN
prm.cpa.master = prm.cpn.slave

#### Add test CPs
prm.cp0 = PARDg5VSystemCP()
prm.cp0.connectToNetwork(prm.cpn)

prm.cp1 = PARDg5VSystemCP(IDENT="HelloCP", cp_dev=10)
prm.cp1.connectToNetwork(prm.cpn)


root = Root(full_system=True, system=prm)
Simulation.run(options, root, prm, FutureClass)

# 需要导入模块: import Simulation [as 别名]
# 或者: from Simulation import run [as 别名]
)
parser.add_option(
    "--max-stats", action="store", type="int", default=10000, help="the maximum number of stats to drop (NOT IMPL)"
)

(options, args) = parser.parse_args()

if args:
    print "Error: script doesn't take any positional arguments"
    sys.exit(1)

# Build System

(main_sys, FutureClass) = PARDg5Main.build_system(options)
root = Root(full_system=True, system=main_sys)

if options.dumpreset_stats:
    when, period = options.dumpreset_stats.split(",", 1)
    main_sys.dumpstats_delay = int(when)
    main_sys.dumpstats_period = int(period)
    print "PARDg5-V: dumpreset-stats @ <", when, ",", period, ">"

if options.timesync:
    root.time_sync_enable = True

if options.frame_capture:
    VncServer.frame_capture = True

Simulation.setWorkCountOptions(main_sys, options)
Simulation.run(options, root, main_sys, FutureClass)

# 需要导入模块: import Simulation [as 别名]
# 或者: from Simulation import run [as 别名]
def miniSimulation():
	simulation = Simulation()
	simulation.setWarriors(Warrior(1, 2, 3), Warrior(4, 5, 6))
	simulation.run()