Python Ruby类代码示例

# Get paths we might need
config_path = os.path.dirname(os.path.abspath(__file__))
config_root = os.path.dirname(config_path)
m5_root = os.path.dirname(config_root)
addToPath(config_root+'/configs/common')
addToPath(config_root+'/configs/ruby')
addToPath(config_root+'/configs/topologies')

import Ruby
import Options

parser = optparse.OptionParser()
Options.addCommonOptions(parser)

# Add the ruby specific and protocol specific options
Ruby.define_options(parser)

(options, args) = parser.parse_args()

#
# Set the default cache size and associativity to be very small to encourage
# races between requests and writebacks.
#
options.l1d_size="256B"
options.l1i_size="256B"
options.l2_size="512B"
options.l3_size="1kB"
options.l1d_assoc=2
options.l1i_assoc=2
options.l2_assoc=2
options.l3_assoc=2

     cur_sys.cf1 = CowIdeDisk(driveID='master')
     cur_sys.cf1.childImage(disk("benchmarks.img"))
     # default to an IDE controller rather than a CF one
     # assuming we've got one
     try:
         cur_sys.realview.ide.disks = [cur_sys.cf0, cur_sys.cf1]
     except:
         cur_sys.realview.cf_ctrl.disks = [cur_sys.cf0, cur_sys.cf1]

     return cur_sys
parser = optparse.OptionParser()
Options.addCommonOptions(parser)
Options.addFSOptions(parser)

# Add the ruby specific and protocol specific options
Ruby.define_options(parser)

(options, args) = parser.parse_args()
options.ruby = True

if args:
    print "Error: script doesn't take any positional arguments"
    sys.exit(1)

if options.benchmark:
    try:
        bm = Benchmarks[options.benchmark]
    except KeyError:
        print "Error benchmark %s has not been defined." % options.benchmark
        print "Valid benchmarks are: %s" % DefinedBenchmarks
        sys.exit(1)

                           for r in drive_sys.mem_ranges]
    for i in xrange(len(drive_sys.mem_ctrls)):
        drive_sys.mem_ctrls[i].port = drive_sys.membus.master

    drive_sys.init_param = options.init_param

    return drive_sys

# Add options
parser = optparse.OptionParser()
Options.addCommonOptions(parser)
Options.addFSOptions(parser)

# Add the ruby specific and protocol specific options
if '--ruby' in sys.argv:
    Ruby.define_options(parser)

(options, args) = parser.parse_args()

if args:
    print "Error: script doesn't take any positional arguments"
    sys.exit(1)

# system under test can be any CPU
(TestCPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options)

# Match the memories with the CPUs, based on the options for the test system
TestMemClass = Simulation.setMemClass(options)

if options.benchmark:
    try:

def build_test_system(np):
    cmdline = cmd_line_template()
    if buildEnv['TARGET_ISA'] == "alpha":
        test_sys = makeLinuxAlphaSystem(test_mem_mode, bm[0], options.ruby,
                                        cmdline=cmdline)
    elif buildEnv['TARGET_ISA'] == "mips":
        test_sys = makeLinuxMipsSystem(test_mem_mode, bm[0], cmdline=cmdline)
    elif buildEnv['TARGET_ISA'] == "sparc":
        test_sys = makeSparcSystem(test_mem_mode, bm[0], cmdline=cmdline)
    elif buildEnv['TARGET_ISA'] == "x86":
        test_sys = makeLinuxX86System(test_mem_mode, options.num_cpus, bm[0],
                options.ruby, cmdline=cmdline)
    elif buildEnv['TARGET_ISA'] == "arm":
        test_sys = makeArmSystem(test_mem_mode, options.machine_type,
                                 options.num_cpus, bm[0], options.dtb_filename,
                                 bare_metal=options.bare_metal,
                                 cmdline=cmdline,
                                 external_memory=options.external_memory_system)
        if options.enable_context_switch_stats_dump:
            test_sys.enable_context_switch_stats_dump = True
    else:
        fatal("Incapable of building %s full system!", buildEnv['TARGET_ISA'])

    # Set the cache line size for the entire system
    test_sys.cache_line_size = options.cacheline_size

    # Create a top-level voltage domain
    test_sys.voltage_domain = VoltageDomain(voltage = options.sys_voltage)

    # Create a source clock for the system and set the clock period
    test_sys.clk_domain = SrcClockDomain(clock =  options.sys_clock,
            voltage_domain = test_sys.voltage_domain)

    # Create a CPU voltage domain
    test_sys.cpu_voltage_domain = VoltageDomain()

    # Create a source clock for the CPUs and set the clock period
    test_sys.cpu_clk_domain = SrcClockDomain(clock = options.cpu_clock,
                                             voltage_domain =
                                             test_sys.cpu_voltage_domain)

    if options.kernel is not None:
        test_sys.kernel = binary(options.kernel)

    if options.script is not None:
        test_sys.readfile = options.script

    if options.lpae:
        test_sys.have_lpae = True

    if options.virtualisation:
        test_sys.have_virtualization = True

    test_sys.init_param = options.init_param

    # For now, assign all the CPUs to the same clock domain
    test_sys.cpu = [TestCPUClass(clk_domain=test_sys.cpu_clk_domain, cpu_id=i,
                                 function_trace=options.enable_trace)
                    for i in xrange(np)]

    if is_kvm_cpu(TestCPUClass) or is_kvm_cpu(FutureClass):
        test_sys.vm = KvmVM()

    if options.ruby:
        # Check for timing mode because ruby does not support atomic accesses
        if not (options.cpu_type == "detailed" or options.cpu_type == "timing"):
            print >> sys.stderr, "Ruby requires TimingSimpleCPU or O3CPU!!"
            sys.exit(1)

        Ruby.create_system(options, True, test_sys, test_sys.iobus,
                           test_sys._dma_ports)

        # Create a seperate clock domain for Ruby
        test_sys.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock,
                                        voltage_domain = test_sys.voltage_domain)

        # Connect the ruby io port to the PIO bus,
        # assuming that there is just one such port.
        test_sys.iobus.master = test_sys.ruby._io_port.slave

        for (i, cpu) in enumerate(test_sys.cpu):
            #
            # Tie the cpu ports to the correct ruby system ports
            #
            cpu.clk_domain = test_sys.cpu_clk_domain
            cpu.createThreads()
            cpu.createInterruptController()

            cpu.icache_port = test_sys.ruby._cpu_ports[i].slave
            cpu.dcache_port = test_sys.ruby._cpu_ports[i].slave

            if buildEnv['TARGET_ISA'] == "x86":
                cpu.itb.walker.port = test_sys.ruby._cpu_ports[i].slave
                cpu.dtb.walker.port = test_sys.ruby._cpu_ports[i].slave

                cpu.interrupts[0].pio = test_sys.ruby._cpu_ports[i].master
                cpu.interrupts[0].int_master = test_sys.ruby._cpu_ports[i].slave
                cpu.interrupts[0].int_slave = test_sys.ruby._cpu_ports[i].master

    else:
#.........这里部分代码省略.........

def build_test_system(np):
    if buildEnv['TARGET_ISA'] == "alpha":
        test_sys = makeLinuxAlphaSystem(test_mem_mode, bm[0], options.ruby)
    elif buildEnv['TARGET_ISA'] == "mips":
        test_sys = makeLinuxMipsSystem(test_mem_mode, bm[0])
    elif buildEnv['TARGET_ISA'] == "sparc":
        test_sys = makeSparcSystem(test_mem_mode, bm[0])
    elif buildEnv['TARGET_ISA'] == "x86":
        test_sys = makeLinuxX86System(test_mem_mode, options.num_cpus, bm[0],
                options.ruby)
    elif buildEnv['TARGET_ISA'] == "arm":
        test_sys = makeArmSystem(test_mem_mode, options.machine_type,
                                 options.num_cpus, bm[0], options.dtb_filename,
                                 bare_metal=options.bare_metal)
        if options.enable_context_switch_stats_dump:
            test_sys.enable_context_switch_stats_dump = True
    else:
        fatal("Incapable of building %s full system!", buildEnv['TARGET_ISA'])

    # Set the cache line size for the entire system
    test_sys.cache_line_size = options.cacheline_size

    # Create a top-level voltage domain
    test_sys.voltage_domain = VoltageDomain(voltage = options.sys_voltage)

    # Create a source clock for the system and set the clock period
    test_sys.clk_domain = SrcClockDomain(clock =  options.sys_clock,
            voltage_domain = test_sys.voltage_domain)

    # Create a CPU voltage domain
    test_sys.cpu_voltage_domain = VoltageDomain()

    # Create a source clock for the CPUs and set the clock period
    test_sys.cpu_clk_domain = SrcClockDomain(clock = options.cpu_clock,
                                             voltage_domain =
                                             test_sys.cpu_voltage_domain)

    if options.kernel is not None:
        test_sys.kernel = binary(options.kernel)

    if options.script is not None:
        test_sys.readfile = options.script

    if options.lpae:
        test_sys.have_lpae = True

    if options.virtualisation:
        test_sys.have_virtualization = True

    test_sys.init_param = options.init_param

    # For now, assign all the CPUs to the same clock domain
    test_sys.cpu = [TestCPUClass(clk_domain=test_sys.cpu_clk_domain, cpu_id=i)
                    for i in xrange(np)]

    if is_kvm_cpu(TestCPUClass) or is_kvm_cpu(FutureClass):
        test_sys.vm = KvmVM()

    if options.ruby:
        # Check for timing mode because ruby does not support atomic accesses
        if not (options.cpu_type == "detailed" or options.cpu_type == "timing"):
            print >> sys.stderr, "Ruby requires TimingSimpleCPU or O3CPU!!"
            sys.exit(1)

        Ruby.create_system(options, test_sys, test_sys.iobus, test_sys._dma_ports)

        # Create a seperate clock domain for Ruby
        test_sys.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock,
                                        voltage_domain = test_sys.voltage_domain)

        for (i, cpu) in enumerate(test_sys.cpu):
            #
            # Tie the cpu ports to the correct ruby system ports
            #
            cpu.clk_domain = test_sys.cpu_clk_domain
            cpu.createThreads()
            cpu.createInterruptController()

            cpu.icache_port = test_sys.ruby._cpu_ports[i].slave
            cpu.dcache_port = test_sys.ruby._cpu_ports[i].slave

            if buildEnv['TARGET_ISA'] == "x86":
                cpu.itb.walker.port = test_sys.ruby._cpu_ports[i].slave
                cpu.dtb.walker.port = test_sys.ruby._cpu_ports[i].slave

                cpu.interrupts.pio = test_sys.ruby._cpu_ports[i].master
                cpu.interrupts.int_master = test_sys.ruby._cpu_ports[i].slave
                cpu.interrupts.int_slave = test_sys.ruby._cpu_ports[i].master

            test_sys.ruby._cpu_ports[i].access_phys_mem = True

        # Create the appropriate memory controllers
        # and connect them to the IO bus
        test_sys.mem_ctrls = [TestMemClass(range = r) for r in test_sys.mem_ranges]
        for i in xrange(len(test_sys.mem_ctrls)):
            test_sys.mem_ctrls[i].port = test_sys.iobus.master

    else:
        if options.caches or options.l2cache:
            # By default the IOCache runs at the system clock
#.........这里部分代码省略.........

parser.add_option("-l", "--maxloads", metavar="N", default=0,
                  help="Stop after N loads")
parser.add_option("--progress", type="int", default=1000,
                  metavar="NLOADS",
                  help="Progress message interval "
                  "[default: %default]")
parser.add_option("--num-dmas", type="int", default=0, help="# of dma testers")
parser.add_option("--functional", type="int", default=0,
                  help="percentage of accesses that should be functional")
parser.add_option("--suppress-func-warnings", action="store_true",
                  help="suppress warnings when functional accesses fail")

#
# Add the ruby specific and protocol specific options
#
Ruby.define_options(parser)

execfile(os.path.join(config_root, "common", "Options.py"))

(options, args) = parser.parse_args()

#
# Set the default cache size and associativity to be very small to encourage
# races between requests and writebacks.
#
options.l1d_size="256B"
options.l1i_size="256B"
options.l2_size="512B"
options.l3_size="1kB"
options.l1d_assoc=2
options.l1i_assoc=2

# Benchmark options
parser.add_option("-b", "--benchmark", action="store", type="string",
                  dest="benchmark",
                  help="Specify the benchmark to run. Available benchmarks: %s"\
                  % DefinedBenchmarks)
parser.add_option("-o", "--options", default="",
    help='The options to pass to the binary, use " " around the entire string')
parser.add_option("-i", "--input", default="", help="Read stdin from a file.")
parser.add_option("--output", default="", help="Redirect stdout to a file.")
parser.add_option("--errout", default="", help="Redirect stderr to a file.")

#
# Add the ruby specific and protocol specific options
#
Ruby.define_options(parser)

execfile(os.path.join(config_root, "common", "Options.py"))

(options, args) = parser.parse_args()

if args:
    print "Error: script doesn't take any positional arguments"
    sys.exit(1)

if options.benchmark:
    try:
        bm = Benchmarks[options.benchmark]
    except KeyError:
        print "Error benchmark %s has not been defined." % options.benchmark
        print "Valid benchmarks are: %s" % DefinedBenchmarks

parser.add_option("--maxloads", metavar="N", default=0,
                  help="Stop after N loads")
parser.add_option("--progress", type="int", default=1000,
                  metavar="NLOADS",
                  help="Progress message interval "
                  "[default: %default]")
parser.add_option("--num-dmas", type="int", default=0, help="# of dma testers")
parser.add_option("--functional", type="int", default=0,
                  help="percentage of accesses that should be functional")
parser.add_option("--suppress-func-warnings", action="store_true",
                  help="suppress warnings when functional accesses fail")

#
# Add the ruby specific and protocol specific options
#
Ruby.define_options(parser)

execfile(os.path.join(config_root, "common", "Options.py"))

(options, args) = parser.parse_args()

#
# Set the default cache size and associativity to be very small to encourage
# races between requests and writebacks.
#
options.l1d_size="256B"
options.l1i_size="256B"
options.l2_size="512B"
options.l3_size="1kB"
options.l1d_assoc=2
options.l1i_assoc=2

addToPath('../topologies')

import Ruby

from FSConfig import *
from SysPaths import *
from Benchmarks import *
import Options
import Simulation

parser = optparse.OptionParser()
Options.addCommonOptions(parser)
Options.addFSOptions(parser)

# Add the ruby specific and protocol specific options
Ruby.define_options(parser)

(options, args) = parser.parse_args()
options.ruby = True
clusters=[]
if args:
    print "Error: script doesn't take any positional arguments"
    sys.exit(1)

if options.benchmark:
    try:
        bm = Benchmarks[options.benchmark]
    except KeyError:
        print "Error benchmark %s has not been defined." % options.benchmark
        print "Valid benchmarks are: %s" % DefinedBenchmarks
        sys.exit(1)

#.........这里部分代码省略.........
        parser.add_option("--dramoffset", type="int", default=0, help="dram offset")
        # bus turn length and offset
        parser.add_option("--l2l3req_tl", type="int", default=1, help="l2l3 bus request layer turn length")
        parser.add_option("--l2l3req_offset", type="int", default=0, help="l2l3 bus request layer offset")
        parser.add_option("--l2l3resp_tl", type="int", default=1, help="l2l3 bus response layer turn length")
        parser.add_option("--l2l3resp_offset", type="int", default=0, help="l2l3 bus response layer offset")
        parser.add_option("--membusreq_tl", type="int", default=1, help="membus request layer turn length")
        parser.add_option("--membusreq_offset", type="int", default=0, help="membus request layer offset")
        parser.add_option("--membusresp_tl", type="int", default=1, help="membus response layer turn length")
        parser.add_option("--membusresp_offset", type="int", default=0, help="membus response layer offset")

        parser.add_option("--p0", type="string", help="workload for processor 0."),
        parser.add_option("--p0threadID", type="int", default=0, help="timing compartment id for p0")
        parser.add_option("--p1", type="string", help="workload for processor 1.")
        parser.add_option("--p1threadID", type="int", default=1, help="timing compartment id for p1")
        parser.add_option(
            "--p2", type="string", default='echo "no p2!"', help="workload for processor 2, default is an echo"
        )
        parser.add_option("--p2threadID", type="int", default=2, help="timing compartment id for p2")
        parser.add_option(
            "--p3", type="string", default='echo "no p3!"', help="workload for processor 3, default is an echo"
        )
        parser.add_option("--p3threadID", type="int", default=3, help="timing compartment id for p3")
        parser.add_option("--gentrace", action="store_true", default=False, help="generate the trace for benchmarks.")
        parser.add_option("--numpids", type="int", default=2, help="determine the number of PIDs")
        parser.add_option("--numcpus", type="int", default=None, help="set the number of cpus if different from PIDs")
        parser.add_option("--l3tracefile", type="string", default="l3trace.txt", help="Output file for l3 cache traces")
        parser.add_option("--l2tracefile", type="string", default="l2trace.txt", help="Output file for l2 cache traces")
        parser.add_option(
            "--use_set_part",
            action="store_true",
            default=False,
            help="Determines if the L3 cache should be set partitioned",
        )
        parser.add_option(
            "--use_way_part",
            action="store_true",
            default=False,
            help="Determines if the L3 cache should be way partitioned",
        )
        parser.add_option(
            "--rr_nc", action="store_true", default=False, help="Should a round robin noncoherent bus be used?"
        )
        parser.add_option(
            "--rr_l2l3",
            action="store_true",
            default=False,
            help="Should a round robin noncoherent bus be used for l2l3?",
        )
        parser.add_option(
            "--rr_mem",
            action="store_true",
            default=False,
            help="Should a round robin noncoherent bus be used for membus?",
        )
        parser.add_option(
            "--split_mshr", action="store_true", default=False, help="Determines if L3 has separate MSHR Queues per TC"
        )
        parser.add_option(
            "--split_rport",
            action="store_true",
            default=False,
            help="Determines if L3 has separate Response Port Queues per TC",
        )
        parser.add_option(
            "--do_cache_trace",
            action="store_true",
            default=False,
            help="Determines if cache traces should be saved and reported",
        )
        parser.add_option("--do_bus_trace", action="store_true", default=False, help="Save bus traces or not")
        parser.add_option("--membustracefile", type="string", default="bustrace.txt", help="Output file for bus traces")
        parser.add_option(
            "--l2l3bustracefile", type="string", default="bustrace.txt", help="Output file for bus traces"
        )
        parser.add_option("--do_mem_trace", action="store_true", default=False, help="do memory trace")
        parser.add_option("--mem_trace_file", type="string", default="memtrace.txt", help="memory trace file")
        parser.add_option("--addr_trace", action="store_true", default=False, help="do detailed trace for address")
        parser.add_option("--trace_addr", type="int", default=0, help="address for detailed trace")
        parser.add_option(
            "--nocwf", action="store_true", default=False, help="Enable to turn off critical word first timing"
        )

        (options, args) = parser.parse_args()

        if "--ruby" in sys.argv:
            Ruby.define_options(parser)

        # Number of CPUs
        options.num_cpus = options.numpids if (options.numcpus == None) else options.numcpus

        # Allow rr_nc to apply rr to both buses
        if options.rr_nc:
            options.rr_l2l3 = True
            options.rr_mem = True

        if args:
            print "Error: script doesn't take any positional arguments"
            sys.exit(1)
        return options

import Ruby

from FSConfig import *
from SysPaths import *
from Benchmarks import *
import Options
import Simulation

parser = optparse.OptionParser()
Options.addCommonOptions(parser)
Options.addFSOptions(parser)
Options.addVOptions(parser)

# Add the ruby specific and protocol specific options
Ruby.define_options(parser)

(options, args) = parser.parse_args()
options.ruby = True

if args:
    print "Error: script doesn't take any positional arguments"
    sys.exit(1)

# if options.benchmark:
#    try:
#        bm = Benchmarks[options.benchmark]
#    except KeyError:
#        print "Error benchmark %s has not been defined." % options.benchmark
#        print "Valid benchmarks are: %s" % DefinedBenchmarks
#        sys.exit(1)

execfile(os.path.join(config_root, "configs/common", "Options.py"))

(options, args) = parser.parse_args()

nb_cores = 4
cpus = [ TimingSimpleCPU(cpu_id=i) for i in xrange(nb_cores) ]

# overwrite the num_cpus to equal nb_cores
options.num_cpus = nb_cores

# system simulated
system = System(cpu = cpus,
                physmem = PhysicalMemory())

system.ruby = Ruby.create_system(options, system.physmem)

assert(options.num_cpus == len(system.ruby.cpu_ruby_ports))

for (i, cpu) in enumerate(system.cpu):
    #
    # Tie the cpu ports to the ruby cpu ports
    #
    cpu.icache_port = system.ruby.cpu_ruby_ports[i].port
    cpu.dcache_port = system.ruby.cpu_ruby_ports[i].port

# -----------------------
# run simulation
# -----------------------

root = Root( system = system )

m5_root = os.path.dirname(config_root)

parser = optparse.OptionParser()

parser.add_option("-l", "--maxloads", metavar="N", default=0,
                  help="Stop after N loads")
parser.add_option("--progress", type="int", default=1000,
                  metavar="NLOADS",
                  help="Progress message interval "
                  "[default: %default]")
parser.add_option("--num-dmas", type="int", default=0, help="# of dma testers")

#
# Add the ruby specific and protocol specific options
#
Ruby.define_options(parser)

execfile(os.path.join(config_root, "common", "Options.py"))

(options, args) = parser.parse_args()

#
# Set the default cache size and associativity to be very small to encourage
# races between requests and writebacks.
#
options.l1d_size="256B"
options.l1i_size="256B"
options.l2_size="512B"
options.l3_size="1kB"
options.l1d_assoc=2
options.l1i_assoc=2

# that is running a checkpoints that were created by ALPHA_FS under atomic
# mode.  Since switch cpus are not defined in these checkpoints, we don't
# fast forward with the atomic cpu and instead set the FutureClass to None.
# Therefore the cpus resolve to the correct names and unserialize correctly.
#
assert(options.timing)
class CPUClass(TimingSimpleCPU): pass
test_mem_mode = 'timing'
FutureClass = None

CPUClass.clock = options.clock

system = makeLinuxAlphaRubySystem(test_mem_mode, bm[0])

system.ruby = Ruby.create_system(options,
                                 system.physmem,
                                 system.piobus,
                                 system.dma_devices)

system.cpu = [CPUClass(cpu_id=i) for i in xrange(options.num_cpus)]

for (i, cpu) in enumerate(system.cpu):
    #
    # Tie the cpu ports to the correct ruby system ports
    #
    cpu.icache_port = system.ruby.cpu_ruby_ports[i].port
    cpu.dcache_port = system.ruby.cpu_ruby_ports[i].port

root = Root(system = system)

Simulation.run(options, root, system, FutureClass)

#.........这里部分代码省略.........
        parser.add_option("--p1period", type="int", default=64,
        		help="period for security domain 1")
        parser.add_option("--dramoffset", type="int", default=0,
        		help="dram offset")
        # bus turn length and offset
        parser.add_option("--l2l3req_tl", type="int", default=1,
                help="l2l3 bus request layer turn length")
        parser.add_option("--l2l3req_offset", type="int", default=0,
                help="l2l3 bus request layer offset")
        parser.add_option("--l2l3resp_tl", type="int", default=1,
                help="l2l3 bus response layer turn length")
        parser.add_option("--l2l3resp_offset", type="int", default=0,
                help="l2l3 bus response layer offset")
        parser.add_option("--membusreq_tl", type="int", default=1,
                help="membus request layer turn length")
        parser.add_option("--membusreq_offset", type="int", default=0,
                help="membus request layer offset")
        parser.add_option("--membusresp_tl", type="int", default=1,
                help="membus response layer turn length")
        parser.add_option("--membusresp_offset", type="int", default=0,
                help="membus response layer offset")

        for i in range(8):
            parser.add_option("--p{0}".format(i), type="string",
                    help="workload number n")
            parser.add_option("--p{0}threadID".format(i), type="int", default=i,
                    help="timing compartment id for p{0}".format(i))
                
        parser.add_option("--gentrace", action="store_true", default=False,
                help="generate the trace for benchmarks.")
        parser.add_option("--numpids", type="int", default=2,
                help="determine the number of PIDs")
        parser.add_option("--numcpus", type="int", default=None,
                help="set the number of cpus")
        parser.add_option("--l3tracefile", type="string", default="l3trace.txt",
                help="Output file for l3 cache traces")
        parser.add_option("--l2tracefile", type="string", default="l2trace.txt",
                help="Output file for l2 cache traces")
        parser.add_option("--use_set_part", action="store_true", default=False,
                help="Determines if the L3 cache should be set partitioned")
        parser.add_option("--use_way_part", action="store_true", default=False,
                help="Determines if the L3 cache should be way partitioned")
        parser.add_option("--rr_nc", action="store_true", default=False,
                help="Should a round robin noncoherent bus be used?" )
        parser.add_option("--rr_l2l3", action="store_true", default=False,
                help="Should a round robin noncoherent bus be used for l2l3?" )
        parser.add_option("--rr_mem", action="store_true", default=False,
                help="Should a round robin noncoherent bus be used for membus?" )
        parser.add_option("--split_mshr", action="store_true", default=False,
                help="Determines if L3 has separate MSHR Queues per TC")
        parser.add_option("--split_rport", action="store_true", default=False,
                help="Determines if L3 has separate Response Port Queues per TC")
        parser.add_option("--do_cache_trace", action="store_true", default=False,
                help="Determines if cache traces should be saved and reported")
        parser.add_option("--do_bus_trace", action="store_true", default=False,
                help="Save bus traces or not" )
        parser.add_option("--membustracefile", type="string", default="bustrace.txt",
                help="Output file for bus traces")
        parser.add_option("--l2l3bustracefile", type="string", default="bustrace.txt",
                help="Output file for bus traces")
        parser.add_option("--do_mem_trace", action="store_true", default=False,
                help= "do memory trace" )
        parser.add_option("--mem_trace_file", type="string", default="memtrace.txt",
                help="memory trace file")
        parser.add_option("--addr_trace", action="store_true", default=False,
                help="do detailed trace for address")
        parser.add_option("--trace_addr", type="int", default=0,
                help="address for detailed trace")
        parser.add_option("--nocwf", action="store_true", default=False,
                help="Enable to turn off critical word first timing")

        parser.add_option("--do_flush", action="store_true", default=False,
                help="Flush the cache occasionally to model context switching.")
        parser.add_option("--flushRatio", type="float", default=1,
                help="flusing ratio of the insecure cache.")
        parser.add_option("--reserve_flush", action="store_true", default=False,
                help="reserve bandwidth when flushing.")
        parser.add_option("--context_sw_freq", type="int", default=1000,
                help="Frequency of context switches in us.")

        parser.add_option("--bank_part", action="store_true", default=False,
                help = "use bank partitioning")

        (options, args) = parser.parse_args()

        if '--ruby' in sys.argv:
            Ruby.define_options(parser)

        #Allow rr_nc to apply rr to both buses
        if options.rr_nc :
            options.rr_l2l3 = True 
            options.rr_mem  = True

        options.num_cpus = ( options.numpids if (options.numcpus == None)
            else options.numcpus )

        if args:
            print "Error: script doesn't take any positional arguments"
            sys.exit(1)
        return options