Python Hardware类代码示例

def start():
    
    logging.info("Starting...")

    global screens
    global curScreen
    global prevScreen
    
    screens["mainMenu"].setOptions(mainMenuOptions)
    screens["power"].setOptions(powerOptions)
    screens["print"].setOptions(printerFuntions)
    screens["printer"].setOptions(printerOptions)
    screens["outlet"].setOptions(outletOptions)

    logging.debug("Clearing LCD")
    Lcd.clear()

    logging.debug("Initing Hardware")
    Hardware.init()
    
    logging.debug("Starting checkPrinter thread")
    thread.start_new_thread(checkPrinter, ())
    
    logging.info("Started")

    while(True):
        Hardware.update()
        if not curScreen == prevScreen:
            screens[curScreen].init()
            logging.info("Changing Screen to {}".format(curScreen))
            prevScreen = curScreen
        
        screens[curScreen].update()
        screens[curScreen].draw()
        curScreen = screens[curScreen].nextScreen()

 def getID(self):
     Hardware.openChannel(self.slot, self.bus)
     # Reset entire board by writing 0x6 to 0x0.
     self.bus.write(0x00,[0x06])
     # Note that the i2c_select has register address 0x11
     # Value : 4 = 0x04 selects 0x50
     # Note that the SSN expects 32 bits (4 bytes) for writing (send 0x4, 0, 0, 0)
     self.bus.write(Hardware.getCardAddress(self.slot),[0x11,0x04,0,0,0])
     # Send 0x0 to 0x50 in order to set pointer for reading ID
     # This removes the permutation problem!
     self.bus.write(0x50,[0x00])
     self.bus.read(0x50,8)
     raw = self.bus.sendBatch()[-1]
     # Checksum
     check = Check(raw,0)
     if check.result != 0:
         print 'checksum error'
     return raw

def processData(eInfo, mInfo, sInfo, testMode, verbose, opt = None):
    if mInfo:
       try:
         resIdx = ResourceIndex()
         Hardware.getHardwareInfo(resIdx, mInfo.machineFile)

         writeList = resIdx.PTdF()
         f = open(mInfo.machinePTdF,'w')
         for w in writeList:
            f.write(w)
         f.close()
         print "PTDF machine data generation complete."
       except PTexception, a:
           raise
           if testMode:
              print a
              raise PTexception(a)
           else:
              print a.value
              return -1

def readBridgeIglooReg(bus):
    h.openChannel(slot,bus)
    bus.write(0x00,[0x06])
    bus.write(h.getCardAddress(slot),[0x22])
    bus.read(h.getCardAddress(slot),4)
    read1 = bus.sendBatch()[-1]
    print 'BRIDGE IGLOO REG Read: '+str(read1)

def runSelect(bus):
    h.openChannel(slot,bus)
    bus.write(h.getCardAddress(slot),[0x11,0x03,0,0,0])

    m = fpgaMajVer(bus,i.igloo["fpgaMajVer"]["register"],'iglooClass.txt', 1)
    print m.run()
    m = fpgaMinVer(bus,i.igloo["fpgaMinVer"]["register"],'iglooClass.txt', 1)
    print m.run()

def readOutInputSpy(bus):
    h.openChannel(slot,bus)
    bus.write(h.getCardAddress(slot),[0x11,0x03,0,0,0])
    m = cntrRegDisplay(bus,i.igloo["cntrReg"]["register"], 1)
    print m.run()
    m = cntrRegChange(bus,i.igloo["cntrReg"]["register"], 1)
    print m.run('WrEn_InputSpy', '1')

    m = inputSpy(bus,i.igloo["inputSpy"]["register"], 512)
    print m.run()

def runAll(bus):
    h.openChannel(slot,bus)
    bus.write(h.getCardAddress(slot),[0x11,0x03,0,0,0])

    m = fpgaMajVer(bus,i.igloo["fpgaMajVer"]["register"], 1)
    print m.run()
    m = fpgaMinVer(bus,i.igloo["fpgaMinVer"]["register"], 1)
    print m.run()
    m = ones(bus,i.igloo["ones"]["register"], 1)
    print m.run()
    m = zeroes(bus,i.igloo["zeroes"]["register"], 1)
    print m.run()
    m = fpgaTopOrBottom(bus,i.igloo["fpgaTopOrBottom"]["register"], 1)
    print m.run()
    m = uniqueID(bus,i.igloo["uniqueID"]["register"], 1)
    print m.run()
    m = statusReg(bus,i.igloo["statusReg"]["register"], 1)
    print m.run()
    m = cntrRegDisplay(bus,i.igloo["cntrReg"]["register"], 1)
    print m.run()
    m = cntrRegChange(bus,i.igloo["cntrReg"]["register"], 1)
    print m.run('all', '')
    m = clk_count(bus,i.igloo["clk_count"]["register"], 1)
    print m.run()
    m = rst_QIE_count(bus,i.igloo["rst_QIE_count"]["register"], 1)
    print m.run()
    m = wte_count(bus,i.igloo["wte_count"]["register"], 1)
    print m.run()
    m = capIDErr_count(bus,i.igloo["capIDErr_count"]["register"], 1)
    print m.run()
    m = fifo_data(bus,i.igloo["fifo_data"]["register"], 1)
    print m.run()
    m = inputSpy(bus,i.igloo["inputSpy"]["register"], 1)
    print m.run()
    m = spy96Bits(bus,i.igloo["spy96Bits"]["register"], 1)
    print m.run()
    m = qie_ck_ph(bus,i.igloo["qie_ck_ph"]["register"], 1)
    print m.run()
    m = link_test_mode(bus,i.igloo["link_test_mode"]["register"], 1)
    print m.run()
    m = link_test_pattern(bus,i.igloo["link_test_pattern"]["register"], 1)
    print m.run()
    m = dataToSERDES(bus,i.igloo["dataToSERDES"]["register"], 1)
    print m.run()
    m = addrToSERDES(bus,i.igloo["addrToSERDES"]["register"], 1)
    print m.run()
    m = ctrlToSERDES(bus,i.igloo["ctrlToSERDES"]["register"], 1)
    print m.run()
    m = dataFromSERDES(bus,i.igloo["dataFromSERDES"]["register"], 1)
    print m.run()
    m = statFromSERDES(bus,i.igloo["statFromSERDES"]["register"], 1)
    print m.run()
    m = scratchReg(bus,i.igloo["scratchReg"]["register"], 1)
    print m.run()

	def QIE_mapping(self):
		# Records the uHTR slot, link, and channel of each QIE in master_dict
		failures=[]
		for j, qslot in enumerate(self.qcards):
			if self.V: print 'mapping qslot '+str(qslot)
			dc=hw.getDChains(qslot, self.bus)
			hw.SetQInjMode(0, qslot, self.bus)
			dc.read()
			
			for mapchip in [0,6]:
				try_map = True
				while try_map:

					for num in xrange(12):
						dc[num].PedestalDAC(-9)
						if num==mapchip:
							dc[num].PedestalDAC(31)
					dc.write()
					dc.read()
					info=self.get_mapping_histo()

					if info is not None:
						uhtr_slot=info[0]
						link=info[1]
						for i in xrange(6):
							if mapchip in range(6): self.add_QIE(qslot, i, uhtr_slot, link, 5-i)
							else: self.add_QIE(qslot, 6+i, uhtr_slot, link, 5-i)
						try_map = False

					elif mapchip == 5 or mapchip == 11:
						if j not in failures:
							print 'mapping qcard {0} failed really hard'.format(qslot)
							failures.append(j)
						try_map = False						

					else: mapchip += 1

			for chip in xrange(12):
				dc[chip].PedestalDAC(6)
				dc.write()
				dc.read()

		if len(failures) > 0:
			failures.reverse() 
			for failure in failures:
				a = self.qcards[failure]
				self.qcards.pop(failure)
				print "qcard {0} successfully popped from self.qcards".format(a)


		if self.V:
			for qslot in self.qcards:
				for chip in xrange(12):
					info=self.get_QIE_map(qslot, chip)
					print 'Q_slot: {4}, Qie: {3}, uhtr_slot: {0}, link: {1}, channel: {2}'.format(info[0], info[1], info[2], chip, qslot)

def setTimingThresholdDAC(slots, threshold_val, bus):

    for i_slot in slots: # all desired slots

        dcs = h.getDChains(i_slot,bus) # the 2 daisy chains from one QIE card
        dcs.read()

        for chip in xrange(12): # all 12 chips
            dcs[chip].TimingThresholdDAC(threshold_val) # change threshold

        dcs.write() # write the changes for both daisy chains

def setFixRangeModeOff(slots, bus):
    #fixed range mode = 1, autorange mode = 0

    for i_slot in slots: # all desired slots

        dcs = h.getDChains(i_slot, bus) # the 2 daisy chains from one QIE card
        dcs.read()

        for chip in xrange(12): # all 12 chips
            dcs[chip].FixRange(0) # turn fixed range OFF

        dcs.write() # write the changes for both daisy chains

def setGsel(slots, gsel_val, bus):
    # valid gsel_val: 0,1,2,4,8,16,18,20,24
    # corresponds to 3.1, 4.65, 6.2, 9.3, 12.4, 15.5, 18.6, 21.7, 24.8 fC/LSB gain
    for i_slot in slots: # all desired slots

        dcs = h.getDChains(i_slot,bus) # the 2 daisy chains from one QIE card
        dcs.read()

        for chip in xrange(12): # all 12 chips
            dcs[chip].Gsel(gsel_val) # change gain

        dcs.write() # write the changes for both daisy chains

def setCapID0pedestal(slots, pedestal_val, bus):
    #pedestal = magnitude * ~1.9 fC
    #takes magnitudes -12 to 12

    for i_slot in slots: # all desired slots

        dcs = h.getDChains(i_slot,bus) # the 2 daisy chains from one QIE card
        dcs.read()

        for chip in xrange(12): # all 12 chips
            dcs[chip].CapID0pedestal(pedestal_val) # change pedestal

        dcs.write() # write the changes for both daisy chains

def setPedestalDAC(slots, pedestal_val, bus):
    #pedestal = magnitude * 2 fC
    #takes magnitudes -31 to 31

    for i_slot in slots: # all desired slots

        dcs = h.getDChains(i_slot,bus) # the 2 daisy chains from one QIE card
        dcs.read()

        for chip in xrange(12): # all 12 chips
            dcs[chip].PedestalDAC(pedestal_val) # change pedestal

        dcs.write() # write the changes for both daisy chains

def printDaisyChain(slots, bus):
    for i_slot in slots: # all desired slots
        ''' makes instance of daisy chain class for each card '''
        dcs = h.getDChains(i_slot, bus) # the 2 daisy chains from one QIE card

        dcs.read() # get real values for 2 daisy chains

        print '\n\n>>>>>>>>>>>> SLOT %d <<<<<<<<<<<<<' %i_slot

        for chip in xrange(12):
            print '\n######## CHIP %d ########' %chip
            print dcs[chip]

        print '############################'

def runSelect(bus):
    h.openChannel(slot,bus)
    bus.write(h.getCardAddress(slot),[0x11,0x03,0,0,0])

    m = fpgaMajVer(bus,i.igloo["fpgaMajVer"]["register"], 1)
    print m.run()
    m = fpgaMinVer(bus,i.igloo["fpgaMinVer"]["register"], 1)
    print m.run()
    m = ones(bus,i.igloo["ones"]["register"], 1)
    print m.run()
    m = zeroes(bus,i.igloo["zeroes"]["register"], 1)
    print m.run()
    m = fpgaTopOrBottom(bus,i.igloo["fpgaTopOrBottom"]["register"], 1)
    print m.run()
    m = uniqueID(bus,i.igloo["uniqueID"]["register"], 1)
    print m.run()
    m = statusReg(bus,i.igloo["statusReg"]["register"], 1)
    print m.run()
    m = cntrRegDisplay(bus,i.igloo["cntrReg"]["register"], 1)
    print m.run()
    m = clk_count(bus,i.igloo["clk_count"]["register"], 1)
    print m.run()
    m = rst_QIE_count(bus,i.igloo["rst_QIE_count"]["register"], 1)
    print m.run()
    m = wte_count(bus,i.igloo["wte_count"]["register"], 1)
    print m.run()
    m = capIDErr_count(bus,i.igloo["capIDErr_count"]["register"], 1)
    print m.run()
    # m = inputSpy(bus,i.igloo["inputSpy"]["register"], 1)
    # print m.run()
    # m = inputSpy_512Reads(bus,i.igloo["inputSpy"]["register"], 1)
    # print m.run()
    m = CI_Mode_On(bus,i.igloo["cntrReg"]["register"], 1)
    print m.run()
    m = CI_Mode_Off(bus,i.igloo["cntrReg"]["register"], 1)
    print m.run()