C++ Target::toEcmdString方法代码示例

fapi::ReturnCode _fapiGetSpyImage(const fapi::Target& i_target,
                            const char * const i_spyId,
                            ecmdDataBufferBase & o_data,
                            const ecmdDataBufferBase & i_imageData)
{
    fapi::ReturnCode l_rc;
    bool l_traceit = platIsScanTraceEnabled();

    // call the platform implementation
    l_rc = platGetSpyImage( i_target, i_spyId, o_data, i_imageData );

    if (l_rc)
    {
      FAPI_ERR("fapiGetSpyImage failed - Target %s, SpyId %s",
                i_target.toEcmdString(), i_spyId);
    }

    if( l_traceit )
    {
      FAPI_SCAN( "TRACE : GETSPYIMAGE : %s : %s %.16llX",
                   i_target.toEcmdString(),
                   i_spyId,
                   o_data.getDoubleWord(0));

    }

    return l_rc;
}

fapi::ReturnCode fapiMultiScom (
                    const   fapi::Target&       i_target,
                            fapi::MultiScom&    io_multiScomObj)
{
    FAPI_DBG (ENTER_MRK "fapiMultiScom - i_target: %s, # input ops: %d",
              i_target.toEcmdString (), io_multiScomObj.iv_ScomList.size ());

    fapi::ReturnCode l_rc;

    // Call the platform specific implemetation
    l_rc = platMultiScom (i_target, io_multiScomObj);

    if (!l_rc.ok ())
    {
        uint32_t l_retCode = l_rc;

        FAPI_ERR ("fapiMultiScom Failed with RC: 0x%.8X! i_target: %s, "
                  "# input ops: %d, # ops complete: %d", l_retCode,
                  i_target.toEcmdString (),
                  io_multiScomObj.iv_ScomList.size (),
                  io_multiScomObj.iv_NumOfCompletes);
    }

    FAPI_DBG (EXIT_MRK "fapiMultiScom - i_target: %s, # input ops: %d, "
              "#ops complete: %d", i_target.toEcmdString (),
              io_multiScomObj.iv_ScomList.size (),
              io_multiScomObj.iv_NumOfCompletes);

    return l_rc;
}

fapi::ReturnCode _fapiPutSpyImage(const fapi::Target& i_target,
                                const spyId_t i_spyId,
                                const ecmdDataBufferBase & i_data,
                                ecmdDataBufferBase & io_imageData)
{
    fapi::ReturnCode l_rc;
    bool l_traceit = platIsScanTraceEnabled();

    // call the platform implementation
    l_rc = platPutSpyImage( i_target, i_spyId, i_data, io_imageData );

    if (l_rc)
    {
      FAPI_ERR("fapiPutSpyImage failed - Target %s, SpyId 0x%.16llX",
                i_target.toEcmdString(), i_spyId);
    }

    if( l_traceit )
    {
        FAPI_SCAN( "TRACE : PUTSPYIMG  : %s : %.16llX %.16llX",
                   i_target.toEcmdString(),
                   i_spyId,
                   i_data.getDoubleWord(0));

    }

    return l_rc;
}

//------------------------------------------------------------------------------
// function: apply PBCQ/AIB customization via SCOM initfile
// parameters: i_target => processor chip target
// returns: FAPI_RC_SUCCESS if initfile evaluation is successful,
//          else error
//------------------------------------------------------------------------------
fapi::ReturnCode proc_pcie_config_pbcq(
    const fapi::Target & i_target)
{
    fapi::ReturnCode rc;
    std::vector<fapi::Target> targets;

    // mark function entry
    FAPI_INF("proc_pcie_config_pbcq: Start");

    do
    {
        // execute Phase2 SCOM initfile
        targets.push_back(i_target);
        FAPI_INF("proc_pcie_config_pbcq: Executing %s on %s",
                 PROC_PCIE_CONFIG_PHASE2_IF, i_target.toEcmdString());
        FAPI_EXEC_HWP(
            rc,
            fapiHwpExecInitFile,
            targets,
            PROC_PCIE_CONFIG_PHASE2_IF);
        if (!rc.ok())
        {
            FAPI_ERR("proc_pcie_config_pbcq: Error from fapiHwpExecInitfile executing %s on %s",
                     PROC_PCIE_CONFIG_PHASE2_IF,
                     i_target.toEcmdString());
            break;
        }
    } while(0);

    // mark function exit
    FAPI_INF("proc_pcie_config_pbcq: End");
    return rc;
}

//******************************************************************************
// fapiPutScom function
//******************************************************************************
fapi::ReturnCode fapiPutScom(const fapi::Target& i_target,
                             const uint64_t i_address,
                             ecmdDataBufferBase & i_data)
{
    fapi::ReturnCode l_rc;
    bool l_traceit = platIsScanTraceEnabled();

    // call the platform implementation
    l_rc = platPutScom( i_target, i_address, i_data );

    if (l_rc)
    {
        FAPI_ERR("fapiPutScom failed - Target %s, Addr %.16llX",
                  i_target.toEcmdString(), i_address);
    }

    if( l_traceit )
    {
        FAPI_SCAN( "TRACE : PUTSCOM     : %s : %.16llX %.16llX",
                   i_target.toEcmdString(),
                   i_address,
                   i_data.getDoubleWord( 0 )  );
    }

    return l_rc;
}

    fapi::ReturnCode mss_eff_config_thermal(const fapi::Target & i_target_mba)
    {
	fapi::ReturnCode rc = fapi::FAPI_RC_SUCCESS;

	FAPI_INF("*** Running mss_eff_config_thermal on %s ***",
		 i_target_mba.toEcmdString());

	rc = mss_eff_config_thermal_powercurve(i_target_mba);
	if (rc)
	{
	    FAPI_ERR("Error (0x%x) calling mss_eff_config_thermal_powercurve", static_cast<uint32_t>(rc));
	    return rc;
	}
	rc = mss_eff_config_thermal_throttles(i_target_mba);
	if (rc)
	{
	    FAPI_ERR("Error (0x%x) calling mss_eff_config_thermal_throttles", static_cast<uint32_t>(rc));
	    return rc;
	}


	FAPI_INF("*** mss_eff_config_thermal COMPLETE on %s ***",
		 i_target_mba.toEcmdString());
	return rc;
    }

    /**
     * Trace PCBS FSMs across primary and secondary chips
     *
     * @param[in] i_target Chip target
     * @param[in] i_msg    String to put out in the trace
     *
     * @retval ECMD_SUCCESS
     * @retval ERROR defined in xml
     */
    fapi::ReturnCode
    p4rs_pcbs_fsm_trace(const fapi::Target& i_primary_target,
                        const fapi::Target& i_secondary_target,
                        const char *       i_msg)
    {
        fapi::ReturnCode                rc;

        do
        {

            rc = p8_pm_pcbs_fsm_trace_chip (i_primary_target, i_msg);
            if (rc)
            {
                FAPI_ERR("pcbs_fsm_trace_chip failed for Target %s",
                         i_primary_target.toEcmdString());
                break;
            }

            if ( i_secondary_target.getType() != TARGET_TYPE_NONE )
            {
                rc = p8_pm_pcbs_fsm_trace_chip (i_secondary_target, i_msg);
                if (rc)
                {
                    FAPI_ERR("pcbs_fsm_trace_chip failed for Target %s",
                             i_secondary_target.toEcmdString());
                    break;
                }
            }
        } while(0);
        return rc;
    }

//******************************************************************************
// fapiPutCfamRegister function
//******************************************************************************
fapi::ReturnCode fapiPutCfamRegister(const fapi::Target& i_target,
                                     const uint32_t i_address,
                                     ecmdDataBufferBase & i_data)
{
    fapi::ReturnCode l_rc;
    bool l_traceit = platIsScanTraceEnabled();

    // call the platform implementation
    l_rc = platPutCfamRegister( i_target, i_address, i_data );

    if (l_rc)
    {
        FAPI_ERR("platPutCfamRegister failed - Target %s, Addr %.8X",
                  i_target.toEcmdString(), i_address);
    }

    if( l_traceit )
    {
        FAPI_SCAN( "TRACE : PUTCFAMREG  : %s : %.8X %.8X",
               i_target.toEcmdString(),
               i_address,
               i_data.getWord(0) );
    }

    return l_rc;
}

fapi::ReturnCode fapiGetRing(const fapi::Target& i_target,
                             const scanRingId_t i_address,
                             ecmdDataBufferBase & o_data,
                             const uint32_t i_ringMode)
{
    fapi::ReturnCode l_rc;
    bool l_traceit = platIsScanTraceEnabled();

    // call the platform implementation
    l_rc = platGetRing( i_target, i_address, o_data, i_ringMode );

    if (l_rc)
    {
        FAPI_ERR("fapiGetRing failed - Target %s, Addr 0x%.16llX", 
                  i_target.toEcmdString(), i_address);
    }

    if( l_traceit )
    {
        FAPI_SCAN( "TRACE : GETRING     : %s : %.16llX %.16llX", 
                   i_target.toEcmdString(),
                   i_address,
                   o_data.getDoubleWord( 0 ) );
    }

    return l_rc;
}

fapi::ReturnCode fapiModifyRing(const fapi::Target& i_target,
                                const scanRingId_t i_address,
                                ecmdDataBufferBase & i_data,
                                const fapi::ChipOpModifyMode i_modifyMode,
                                const uint32_t i_ringMode)
{
    fapi::ReturnCode l_rc;
    bool l_traceit = platIsScanTraceEnabled();

    // call the platform implementation
    l_rc = platModifyRing( i_target, i_address, i_data, i_modifyMode, i_ringMode );

    if (l_rc)
    {
        FAPI_ERR("platModifyRing failed - Target %s, Addr 0x%.16llX,"
                 "ModifyMode 0x%.8X", i_target.toEcmdString(),
                 i_address, i_modifyMode);
    }

    if( l_traceit )
    {
        // get string representation of the modify mode
        const char * l_pMode = NULL;

        if (i_modifyMode == fapi::CHIP_OP_MODIFY_MODE_OR)
        {
            l_pMode = "OR";
        }
        else if (i_modifyMode == fapi::CHIP_OP_MODIFY_MODE_AND)
        {
            l_pMode = "AND";
        }
        else if (i_modifyMode == fapi::CHIP_OP_MODIFY_MODE_XOR)
        {
            l_pMode = "XOR";
        }
        else
        {
            l_pMode = "?";
        }

        FAPI_SCAN( "TRACE : MODRING     : %s : %.16llX %.16llX %s",
               i_target.toEcmdString(),
               i_address,
               i_data.getDoubleWord(0),
               l_pMode);
    }

    return l_rc;
}

//******************************************************************************
//* name=mss_eff_config_rank_group, param=i_target_mba, return=ReturnCode
//******************************************************************************
fapi::ReturnCode mss_eff_config_rank_group(const fapi::Target i_target_mba) {
   fapi::ReturnCode rc = fapi::FAPI_RC_SUCCESS;
   const char * const PROCEDURE_NAME = "mss_eff_config_rank_group";
   const fapi::Target& TARGET_MBA = i_target_mba;
   FAPI_INF("*** Running %s on %s ... ***", PROCEDURE_NAME, i_target_mba.toEcmdString());

   const uint8_t PORT_SIZE = 2;
   const uint8_t DIMM_SIZE = 2;
   // ATTR_EFF_DRAM_GEN: EMPTY = 0, DDR3 = 1, DDR4 = 2,
   // ATTR_EFF_DIMM_TYPE: CDIMM = 0, RDIMM = 1, UDIMM = 2, LRDIMM = 3,
   uint8_t num_ranks_per_dimm_u8array[PORT_SIZE][DIMM_SIZE];
   uint8_t dram_gen_u8;
   uint8_t dimm_type_u8;

   rc = FAPI_ATTR_GET(ATTR_EFF_NUM_RANKS_PER_DIMM, &i_target_mba, num_ranks_per_dimm_u8array); if(rc) return rc;
   rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_GEN, &i_target_mba, dram_gen_u8); if(rc) return rc;
   rc = FAPI_ATTR_GET(ATTR_EFF_DIMM_TYPE, &i_target_mba, dimm_type_u8); if(rc) return rc;

   uint8_t primary_rank_group0_u8array[PORT_SIZE];
   uint8_t primary_rank_group1_u8array[PORT_SIZE];
   uint8_t primary_rank_group2_u8array[PORT_SIZE];
   uint8_t primary_rank_group3_u8array[PORT_SIZE];
   uint8_t secondary_rank_group0_u8array[PORT_SIZE];
   uint8_t secondary_rank_group1_u8array[PORT_SIZE];
   uint8_t secondary_rank_group2_u8array[PORT_SIZE];
   uint8_t secondary_rank_group3_u8array[PORT_SIZE];
   uint8_t tertiary_rank_group0_u8array[PORT_SIZE];
   uint8_t tertiary_rank_group1_u8array[PORT_SIZE];
   uint8_t tertiary_rank_group2_u8array[PORT_SIZE];
   uint8_t tertiary_rank_group3_u8array[PORT_SIZE];
   uint8_t quanternary_rank_group0_u8array[PORT_SIZE];
   uint8_t quanternary_rank_group1_u8array[PORT_SIZE];
   uint8_t quanternary_rank_group2_u8array[PORT_SIZE];
   uint8_t quanternary_rank_group3_u8array[PORT_SIZE];

   for (uint8_t cur_port = 0; cur_port < PORT_SIZE; cur_port += 1) {
      //Removed 32G CDIMM 1R dualdrop workaround.
      //NOTE: Needs mss_draminit_training.C v1.57 or newer.
      //if ((dimm_type_u8 == CDIMM) && (num_ranks_per_dimm_u8array[cur_port][0] == 1) && (num_ranks_per_dimm_u8array[cur_port][1] == 1)) {
         // NOTE: 32G CDIMM 1R dualdrop workaround, normally primary_rank_group0=0, primary_rank_group1=4.
         //primary_rank_group0_u8array[cur_port] = 0;
         //primary_rank_group1_u8array[cur_port] = INVALID;
         //primary_rank_group2_u8array[cur_port] = INVALID;
         //primary_rank_group3_u8array[cur_port] = INVALID;
         //secondary_rank_group0_u8array[cur_port] = 4;
         //secondary_rank_group1_u8array[cur_port] = INVALID;
         //secondary_rank_group2_u8array[cur_port] = INVALID;
         //secondary_rank_group3_u8array[cur_port] = INVALID;
         //tertiary_rank_group0_u8array[cur_port] = INVALID;
         //tertiary_rank_group1_u8array[cur_port] = INVALID;
         //tertiary_rank_group2_u8array[cur_port] = INVALID;
         //tertiary_rank_group3_u8array[cur_port] = INVALID;
         //quanternary_rank_group0_u8array[cur_port] = INVALID;
         //quanternary_rank_group1_u8array[cur_port] = INVALID;
         //quanternary_rank_group2_u8array[cur_port] = INVALID;
         //quanternary_rank_group3_u8array[cur_port] = INVALID;
      //} else if (dimm_type_u8 == LRDIMM) {
      if (dimm_type_u8 == LRDIMM) {
         primary_rank_group2_u8array[cur_port] = INVALID;
         secondary_rank_group2_u8array[cur_port] = INVALID;
         tertiary_rank_group2_u8array[cur_port] = INVALID;
         quanternary_rank_group2_u8array[cur_port] = INVALID;

         primary_rank_group3_u8array[cur_port] = INVALID;
         secondary_rank_group3_u8array[cur_port] = INVALID;
         tertiary_rank_group3_u8array[cur_port] = INVALID;
         quanternary_rank_group3_u8array[cur_port] = INVALID;

         // dimm 0 (far socket)
         switch (num_ranks_per_dimm_u8array[cur_port][0]) {
           case 4:               // 4 rank lrdimm
                 primary_rank_group0_u8array[cur_port] = 0;
                 secondary_rank_group0_u8array[cur_port] = 1;
                 tertiary_rank_group0_u8array[cur_port] = 2;
                 quanternary_rank_group0_u8array[cur_port] = 3;
                 break;
           case 8:               // 8 rank lrdimm falls through to 2 rank case
         // Rank Multiplication mode needed, CS2 & CS3 used as address lines into LRBuffer
         // RM=4 -> only 2 CS valid, each CS controls 4 ranks with CS2 & CS3 as address
         // CS0 = rank 0, 2, 4, 6;  CS1 = rank 1, 3, 5, 7
           case 2:               // 2 rank lrdimm
                 primary_rank_group0_u8array[cur_port] = 0;
                 secondary_rank_group0_u8array[cur_port] = 1;
                 tertiary_rank_group0_u8array[cur_port] = INVALID;
                 quanternary_rank_group0_u8array[cur_port] = INVALID;
                 break;
           case 1:               // 1 rank lrdimm
                 primary_rank_group0_u8array[cur_port] = 0;
                 secondary_rank_group0_u8array[cur_port] = INVALID;
                 tertiary_rank_group0_u8array[cur_port] = INVALID;
                 quanternary_rank_group0_u8array[cur_port] = INVALID;
                 break;
           default:              // not 1, 2, 4, or 8 ranks
                 primary_rank_group0_u8array[cur_port] = INVALID;
                 secondary_rank_group0_u8array[cur_port] = INVALID;
                 tertiary_rank_group0_u8array[cur_port] = INVALID;
                 quanternary_rank_group0_u8array[cur_port] = INVALID;
//.........这里部分代码省略.........

//.........这里部分代码省略.........

    ////FAPI_INF("Inside strcmp cl11");
    l_sbit = 54;
    l_value = i;
    rc = fapiGetScom(i_target_mba, 0x030106ca, l_data_buffer_64);
    if (rc) return rc;
    if (l_num_cols >= 11)
    {
        if (l_dram_cols >= 11)
        {
            rc_num = l_data_buffer_64.insertFromRight(l_value, l_sbit, 6);
            if (rc_num)
            {
                FAPI_ERR("Error in function  parse_addr:");
                rc.setEcmdError(rc_num);
                return rc;
            }
            rc = fapiPutScom(i_target_mba, 0x030106ca, l_data_buffer_64);
            if (rc) return rc;
            //FAPI_DBG("%s: Inside l_dram_cols > 10");
            i--;
        }
        else
        {
            rc_num = l_data_buffer_64.insertFromRight(l_value_zero, l_sbit, 6);
            if (rc_num)
            {
                FAPI_ERR("Error in function  parse_addr:");
                rc.setEcmdError(rc_num);
                return rc;
            }
            rc = fapiPutScom(i_target_mba, 0x030106ca, l_data_buffer_64);
            if (rc) return rc;
            FAPI_DBG("%s:Col 11 -- Invalid", i_target_mba.toEcmdString());
            i++;
        }
    }
    else
    {
        rc_num = l_data_buffer_64.insertFromRight(l_value_zero, l_sbit, 6);
        if (rc_num)
        {
            FAPI_ERR("Error in function  parse_addr:");
            rc.setEcmdError(rc_num);
            return rc;
        }
        rc = fapiPutScom(i_target_mba, 0x030106ca, l_data_buffer_64);
        if (rc) return rc;
        //FAPI_INF("Col 11 -- Invalid");
        i++;
    }

    ////FAPI_INF("Value of i = %d",i);
    ////FAPI_INF("Inside strcmp cl13");
    l_sbit = 48;
    l_value = i;
    rc = fapiGetScom(i_target_mba, 0x030106ca, l_data_buffer_64);
    if (rc) return rc;
    if (l_num_cols >= 12)
    {
        rc_num = l_data_buffer_64.insertFromRight(l_value, l_sbit, 6);
        if (rc_num)
        {
            FAPI_ERR("Error in function  parse_addr:");
            rc.setEcmdError(rc_num);
            return rc;

    fapi::ReturnCode mss_eff_config_thermal_powercurve(const fapi::Target & i_target_mba)
    {
	fapi::ReturnCode rc = fapi::FAPI_RC_SUCCESS;

	FAPI_INF("*** Running mss_eff_config_thermal_powercurve on %s ***",
		 i_target_mba.toEcmdString());

// other variables used in this function
	fapi::Target target_chip;
	uint8_t port;
	uint8_t dimm;
	uint8_t custom_dimm;
	uint8_t dimm_ranks_array[NUM_PORTS][NUM_DIMMS];
	uint32_t power_slope_array[NUM_PORTS][NUM_DIMMS];
	uint32_t power_int_array[NUM_PORTS][NUM_DIMMS];
	uint32_t power_slope2_array[NUM_PORTS][NUM_DIMMS];
	uint32_t power_int2_array[NUM_PORTS][NUM_DIMMS];
	uint32_t total_power_slope_array[NUM_PORTS][NUM_DIMMS];
	uint32_t total_power_int_array[NUM_PORTS][NUM_DIMMS];
	uint32_t total_power_slope2_array[NUM_PORTS][NUM_DIMMS];
	uint32_t total_power_int2_array[NUM_PORTS][NUM_DIMMS];
	uint32_t cdimm_master_power_slope;
	uint32_t cdimm_master_power_intercept;
	uint32_t cdimm_supplier_power_slope;
	uint32_t cdimm_supplier_power_intercept;
	uint32_t cdimm_master_total_power_slope = 0;
	uint32_t cdimm_master_total_power_intercept = 0;
	uint32_t cdimm_supplier_total_power_slope = 0;
	uint32_t cdimm_supplier_total_power_intercept = 0;
	uint8_t l_dram_gen;
	uint8_t l_logged_error_power_curve = 0;
	uint8_t l_logged_error_total_power_curve = 0;
//------------------------------------------------------------------------------
// Get input attributes
//------------------------------------------------------------------------------

// Get Centaur target for the given MBA
	rc = fapiGetParentChip(i_target_mba, target_chip);
	if (rc) {
	    FAPI_ERR("Error from fapiGetParentChip");
	    return rc;
	}

	rc = FAPI_ATTR_GET(ATTR_EFF_CUSTOM_DIMM, &i_target_mba, custom_dimm);
	if (rc) {
	    FAPI_ERR("Error getting attribute ATTR_EFF_CUSTOM_DIMM");
	    return rc;
	}
	rc = FAPI_ATTR_GET(ATTR_EFF_NUM_RANKS_PER_DIMM,
			   &i_target_mba, dimm_ranks_array);
	if (rc) {
	    FAPI_ERR("Error getting attribute ATTR_EFF_NUM_RANKS_PER_DIMM");
	    return rc;
	}
	rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_GEN,
			   &i_target_mba, l_dram_gen);
	if (rc) {
	    FAPI_ERR("Error getting attribute ATTR_EFF_DRAM_GEN");
	    return rc;
	}
	// Only get power curve values for custom dimms to prevent errors
	if (custom_dimm == fapi::ENUM_ATTR_EFF_CUSTOM_DIMM_YES)
	{
	    // These are the CDIMM power curve values for only VMEM (DDR3 and DDR4)
	    rc = FAPI_ATTR_GET(ATTR_CDIMM_VPD_MASTER_POWER_SLOPE,
			       &target_chip, cdimm_master_power_slope);
	    if (rc) {
		FAPI_ERR("Error getting attribute ATTR_CDIMM_VPD_MASTER_POWER_SLOPE");
		return rc;
	    }
	    rc = FAPI_ATTR_GET(ATTR_CDIMM_VPD_MASTER_POWER_INTERCEPT,
			       &target_chip, cdimm_master_power_intercept);
	    if (rc) {
		FAPI_ERR("Error getting attribute ATTR_CDIMM_VPD_MASTER_POWER_INTERCEPT");
		return rc;
	    }

	    rc = FAPI_ATTR_GET(ATTR_CDIMM_VPD_SUPPLIER_POWER_SLOPE,
			       &target_chip, cdimm_supplier_power_slope);
	    if (rc) {
		FAPI_ERR("Error getting attribute ATTR_CDIMM_VPD_SUPPLIER_POWER_SLOPE");
		return rc;
	    }
	    rc = FAPI_ATTR_GET(ATTR_CDIMM_VPD_SUPPLIER_POWER_INTERCEPT,
			       &target_chip, cdimm_supplier_power_intercept);
	    if (rc) {
		FAPI_ERR("Error getting attribute ATTR_CDIMM_VPD_SUPPLIER_POWER_INTERCEPT");
		return rc;
	    }

	    // These are for the total CDIMM power (VMEM+VPP for DDR4)
	    if (l_dram_gen == fapi::ENUM_ATTR_EFF_DRAM_GEN_DDR4)
	    {

		rc = FAPI_ATTR_GET(ATTR_CDIMM_VPD_MASTER_TOTAL_POWER_SLOPE,
				   &target_chip, cdimm_master_total_power_slope);
		if (rc) {
		    FAPI_ERR("Error getting attribute ATTR_CDIMM_VPD_MASTER_TOTAL_POWER_SLOPE");
		    return rc;
		}
//.........这里部分代码省略.........

    fapi::ReturnCode mss_eff_config_thermal_throttles(const fapi::Target & i_target_mba)
    {
	fapi::ReturnCode rc = fapi::FAPI_RC_SUCCESS;

	FAPI_INF("*** Running mss_eff_config_thermal_throttles on %s ***",
		 i_target_mba.toEcmdString());

// variables used in this function
	fapi::Target target_chip;
	std::vector<fapi::Target> target_mba_array;
	std::vector<fapi::Target> target_dimm_array;
	uint8_t custom_dimm;
	uint8_t num_dimms_on_port;
	uint32_t runtime_throttle_n_per_mba;
	uint32_t runtime_throttle_n_per_chip;
	uint32_t runtime_throttle_d;
	uint32_t dimm_thermal_power_limit;
	uint32_t channel_pair_thermal_power_limit;
	uint8_t num_mba_with_dimms = 0;
	uint8_t mba_index;
	uint8_t ras_increment;
	uint8_t cas_increment;
	uint32_t l_max_dram_databus_util;
	uint32_t l_dimm_reg_power_limit_per_dimm_adj;
	uint32_t l_dimm_reg_power_limit_per_dimm;
	uint8_t l_max_number_dimms_per_reg;
	uint8_t l_dimm_reg_power_limit_adj_enable;
	uint8_t l_reg_max_dimm_count;
	uint8_t l_dram_gen;
	uint32_t l_power_slope_array[NUM_PORTS][NUM_DIMMS];
	uint32_t l_power_int_array[NUM_PORTS][NUM_DIMMS];
	uint32_t l_total_power_slope_array[NUM_PORTS][NUM_DIMMS];
	uint32_t l_total_power_int_array[NUM_PORTS][NUM_DIMMS];

//------------------------------------------------------------------------------
// Get input attributes
//------------------------------------------------------------------------------

// Get Centaur target for the given MBA
	rc = fapiGetParentChip(i_target_mba, target_chip);
	if (rc) {
	    FAPI_ERR("Error from fapiGetParentChip");
	    return rc;
	}

	rc = FAPI_ATTR_GET(ATTR_EFF_CUSTOM_DIMM, &i_target_mba, custom_dimm);
	if (rc) {
	    FAPI_ERR("Error getting attribute ATTR_EFF_CUSTOM_DIMM");
	    return rc;
	}
	rc = FAPI_ATTR_GET(ATTR_EFF_NUM_DROPS_PER_PORT,
			   &i_target_mba, num_dimms_on_port);
	if (rc) {
	    FAPI_ERR("Error getting attribute ATTR_EFF_NUM_DROPS_PER_PORT");
	    return rc;
	}
	rc = FAPI_ATTR_GET(ATTR_MRW_THERMAL_MEMORY_POWER_LIMIT,
			   NULL, dimm_thermal_power_limit);
	if (rc) {
	    FAPI_ERR("Error getting attribute ATTR_MRW_THERMAL_MEMORY_POWER_LIMIT");
	    return rc;
	}

	rc = FAPI_ATTR_GET(ATTR_MRW_MEM_THROTTLE_DENOMINATOR, NULL, runtime_throttle_d);
	if (rc) {
	    FAPI_ERR("Error getting attribute ATTR_MRW_MEM_THROTTLE_DENOMINATOR");
	    return rc;
	}
	rc = FAPI_ATTR_GET(ATTR_MRW_MAX_DRAM_DATABUS_UTIL,
			   NULL, l_max_dram_databus_util);
	if (rc) {
	    FAPI_ERR("Error getting attribute ATTR_MRW_MAX_DRAM_DATABUS_UTIL");
	    return rc;
	}
	rc = FAPI_ATTR_GET(ATTR_MRW_VMEM_REGULATOR_MEMORY_POWER_LIMIT_PER_DIMM,
			   NULL, l_dimm_reg_power_limit_per_dimm);
	if (rc) {
	    FAPI_ERR("Error getting attribute ATTR_MRW_VMEM_REGULATOR_MEMORY_POWER_LIMIT_PER_DIMM");
	    return rc;
	}
	rc = FAPI_ATTR_GET(ATTR_MRW_MAX_NUMBER_DIMMS_POSSIBLE_PER_VMEM_REGULATOR,
			   NULL, l_max_number_dimms_per_reg);
	if (rc) {
	    FAPI_ERR("Error getting attribute ATTR_MRW_MAX_NUMBER_DIMMS_POSSIBLE_PER_VMEM_REGULATOR");
	    return rc;
	}
	rc = FAPI_ATTR_GET(ATTR_MRW_VMEM_REGULATOR_POWER_LIMIT_PER_DIMM_ADJ_ENABLE,
			   NULL, l_dimm_reg_power_limit_adj_enable);
	if (rc) {
	    FAPI_ERR("Error getting attribute ATTR_MRW_VMEM_REGULATOR_POWER_LIMIT_PER_DIMM_ADJ_ENABLE");
	    return rc;
	}
	rc = FAPI_ATTR_GET(ATTR_MSS_VMEM_REGULATOR_MAX_DIMM_COUNT,
			   NULL, l_reg_max_dimm_count);
	if (rc) {
	    FAPI_ERR("Error getting attribute ATTR_MSS_VMEM_REGULATOR_MAX_DIMM_COUNT");
	    return rc;
	}
	rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_GEN,
			   &i_target_mba, l_dram_gen);
//.........这里部分代码省略.........

// HWP entry point, comments in header
fapi::ReturnCode proc_chiplet_scominit(const fapi::Target & i_target)
{
    fapi::ReturnCode rc;
    uint32_t rc_ecmd = 0;

    fapi::TargetType target_type;
    std::vector<fapi::Target> initfile_targets;
    std::vector<fapi::Target> ex_targets;
    std::vector<fapi::Target> mcs_targets;
    uint8_t nx_enabled;
    uint8_t mcs_pos;
    uint8_t ex_pos;
    uint8_t num_ex_targets;
    uint8_t master_mcs_pos = 0xFF;
    fapi::Target master_mcs;
    uint8_t enable_xbus_resonant_clocking = 0x0;
    uint8_t i2c_slave_address = 0x0;
    uint8_t dual_capp_present = 0x0;

    ecmdDataBufferBase data(64);
    ecmdDataBufferBase cfam_data(32);
    ecmdDataBufferBase mask(64);

    bool               is_master = false;

    // mark HWP entry
    FAPI_INF("proc_chiplet_scominit: Start");

    do
    {
        rc = proc_check_master_sbe_seeprom(i_target, is_master);
        if (!rc.ok())
        {
            FAPI_ERR("proc_cen_ref_clk_enable: Error from proc_check_master_sbe_seeprom");
            break;
        }

        // obtain target type to determine which initfile(s) to execute
        target_type = i_target.getType();

        // chip level target
        if (target_type == fapi::TARGET_TYPE_PROC_CHIP)
        {
            // execute FBC SCOM initfile
            initfile_targets.push_back(i_target);
            FAPI_INF("proc_chiplet_scominit: Executing %s on %s",
                     PROC_CHIPLET_SCOMINIT_FBC_IF, i_target.toEcmdString());
            FAPI_EXEC_HWP(
                rc,
                fapiHwpExecInitFile,
                initfile_targets,
                PROC_CHIPLET_SCOMINIT_FBC_IF);
            if (!rc.ok())
            {
                FAPI_ERR("proc_chiplet_scominit: Error from fapiHwpExecInitfile executing %s on %s",
                         PROC_CHIPLET_SCOMINIT_FBC_IF,
                         i_target.toEcmdString());
                break;
            }

            // execute PSI SCOM initfile
            FAPI_INF("proc_chiplet_scominit: Executing %s on %s",
                     PROC_CHIPLET_SCOMINIT_PSI_IF, i_target.toEcmdString());
            FAPI_EXEC_HWP(
                rc,
                fapiHwpExecInitFile,
                initfile_targets,
                PROC_CHIPLET_SCOMINIT_PSI_IF);
            if (!rc.ok())
            {
                FAPI_ERR("proc_chiplet_scominit: Error from fapiHwpExecInitfile executing %s on %s",
                         PROC_CHIPLET_SCOMINIT_PSI_IF,
                         i_target.toEcmdString());
                break;
            }

            // execute TP bridge SCOM initfile
            FAPI_INF("proc_chiplet_scominit: Executing %s on %s",
                     PROC_CHIPLET_SCOMINIT_TPBRIDGE_IF, i_target.toEcmdString());
            FAPI_EXEC_HWP(
                rc,
                fapiHwpExecInitFile,
                initfile_targets,
                PROC_CHIPLET_SCOMINIT_TPBRIDGE_IF);
            if (!rc.ok())
            {
                FAPI_ERR("proc_chiplet_scominit: Error from fapiHwpExecInitfile executing %s on %s",
                         PROC_CHIPLET_SCOMINIT_TPBRIDGE_IF,
                         i_target.toEcmdString());
                break;
            }

            // query NX partial good attribute
            rc = FAPI_ATTR_GET(ATTR_PROC_NX_ENABLE,
                               &i_target,
                               nx_enabled);
            if (!rc.ok())
            {
                FAPI_ERR("proc_chiplet_scominit: Error querying ATTR_PROC_NX_ENABLE");
//.........这里部分代码省略.........