本文整理汇总了C++中fapi::Target::getType方法的典型用法代码示例。如果您正苦于以下问题:C++ Target::getType方法的具体用法?C++ Target::getType怎么用?C++ Target::getType使用的例子?那么, 这里精选的方法代码示例或许可以为您提供帮助。您也可以进一步了解该方法所在类fapi::Target
的用法示例。
在下文中一共展示了Target::getType方法的8个代码示例,这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞,您的评价将有助于系统推荐出更棒的C++代码示例。
示例1: while
/**
* Trace PCBS FSMs across primary and secondary chips
*
* @param[in] i_target Chip target
* @param[in] i_msg String to put out in the trace
*
* @retval ECMD_SUCCESS
* @retval ERROR defined in xml
*/
fapi::ReturnCode
p4rs_pcbs_fsm_trace(const fapi::Target& i_primary_target,
const fapi::Target& i_secondary_target,
const char * i_msg)
{
fapi::ReturnCode rc;
do
{
rc = p8_pm_pcbs_fsm_trace_chip (i_primary_target, i_msg);
if (rc)
{
FAPI_ERR("pcbs_fsm_trace_chip failed for Target %s",
i_primary_target.toEcmdString());
break;
}
if ( i_secondary_target.getType() != TARGET_TYPE_NONE )
{
rc = p8_pm_pcbs_fsm_trace_chip (i_secondary_target, i_msg);
if (rc)
{
FAPI_ERR("pcbs_fsm_trace_chip failed for Target %s",
i_secondary_target.toEcmdString());
break;
}
}
} while(0);
return rc;
}
示例2: proc_chiplet_scominit
// HWP entry point, comments in header
fapi::ReturnCode proc_chiplet_scominit(const fapi::Target & i_target)
{
fapi::ReturnCode rc;
uint32_t rc_ecmd = 0;
fapi::TargetType target_type;
std::vector<fapi::Target> initfile_targets;
std::vector<fapi::Target> ex_targets;
std::vector<fapi::Target> mcs_targets;
uint8_t nx_enabled;
uint8_t mcs_pos;
uint8_t ex_pos;
uint8_t num_ex_targets;
uint8_t master_mcs_pos = 0xFF;
fapi::Target master_mcs;
uint8_t enable_xbus_resonant_clocking = 0x0;
uint8_t i2c_slave_address = 0x0;
uint8_t dual_capp_present = 0x0;
ecmdDataBufferBase data(64);
ecmdDataBufferBase cfam_data(32);
ecmdDataBufferBase mask(64);
bool is_master = false;
// mark HWP entry
FAPI_INF("proc_chiplet_scominit: Start");
do
{
rc = proc_check_master_sbe_seeprom(i_target, is_master);
if (!rc.ok())
{
FAPI_ERR("proc_cen_ref_clk_enable: Error from proc_check_master_sbe_seeprom");
break;
}
// obtain target type to determine which initfile(s) to execute
target_type = i_target.getType();
// chip level target
if (target_type == fapi::TARGET_TYPE_PROC_CHIP)
{
// execute FBC SCOM initfile
initfile_targets.push_back(i_target);
FAPI_INF("proc_chiplet_scominit: Executing %s on %s",
PROC_CHIPLET_SCOMINIT_FBC_IF, i_target.toEcmdString());
FAPI_EXEC_HWP(
rc,
fapiHwpExecInitFile,
initfile_targets,
PROC_CHIPLET_SCOMINIT_FBC_IF);
if (!rc.ok())
{
FAPI_ERR("proc_chiplet_scominit: Error from fapiHwpExecInitfile executing %s on %s",
PROC_CHIPLET_SCOMINIT_FBC_IF,
i_target.toEcmdString());
break;
}
// execute PSI SCOM initfile
FAPI_INF("proc_chiplet_scominit: Executing %s on %s",
PROC_CHIPLET_SCOMINIT_PSI_IF, i_target.toEcmdString());
FAPI_EXEC_HWP(
rc,
fapiHwpExecInitFile,
initfile_targets,
PROC_CHIPLET_SCOMINIT_PSI_IF);
if (!rc.ok())
{
FAPI_ERR("proc_chiplet_scominit: Error from fapiHwpExecInitfile executing %s on %s",
PROC_CHIPLET_SCOMINIT_PSI_IF,
i_target.toEcmdString());
break;
}
// execute TP bridge SCOM initfile
FAPI_INF("proc_chiplet_scominit: Executing %s on %s",
PROC_CHIPLET_SCOMINIT_TPBRIDGE_IF, i_target.toEcmdString());
FAPI_EXEC_HWP(
rc,
fapiHwpExecInitFile,
initfile_targets,
PROC_CHIPLET_SCOMINIT_TPBRIDGE_IF);
if (!rc.ok())
{
FAPI_ERR("proc_chiplet_scominit: Error from fapiHwpExecInitfile executing %s on %s",
PROC_CHIPLET_SCOMINIT_TPBRIDGE_IF,
i_target.toEcmdString());
break;
}
// query NX partial good attribute
rc = FAPI_ATTR_GET(ATTR_PROC_NX_ENABLE,
&i_target,
nx_enabled);
if (!rc.ok())
{
FAPI_ERR("proc_chiplet_scominit: Error querying ATTR_PROC_NX_ENABLE");
//.........这里部分代码省略.........
示例3: fapiGetOtherSideOfMemChannel
//******************************************************************************
// fapiGetOtherSideOfMemChannel function
//******************************************************************************
fapi::ReturnCode fapiGetOtherSideOfMemChannel(
const fapi::Target& i_target,
fapi::Target & o_target,
const fapi::TargetState i_state)
{
fapi::ReturnCode l_rc;
TargetHandleList l_targetList;
FAPI_DBG(ENTER_MRK "fapiGetOtherSideOfMemChannel. State: 0x%08x",
i_state);
TargetHandle_t l_target =
reinterpret_cast<TargetHandle_t>(i_target.get());
if (l_target == NULL)
{
FAPI_ERR("fapiGetOtherSideOfMemChannel. Embedded NULL target pointer");
/*@
* @errortype
* @moduleid fapi::MOD_FAPI_GET_OTHER_SIDE_OF_MEM_CHANNEL
* @reasoncode fapi::RC_EMBEDDED_NULL_TARGET_PTR
* @devdesc Target has embedded null target pointer
*/
const bool hbSwError = true;
errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
ERRORLOG::ERRL_SEV_UNRECOVERABLE,
fapi::MOD_FAPI_GET_OTHER_SIDE_OF_MEM_CHANNEL,
fapi::RC_EMBEDDED_NULL_TARGET_PTR,
0, 0, hbSwError);
// Attach the error log to the fapi::ReturnCode
l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
}
else if (i_target.getType() == fapi::TARGET_TYPE_MCS_CHIPLET)
{
// find the Centaur that is associated with this MCS
getChildAffinityTargets(l_targetList, l_target,
CLASS_CHIP, TYPE_MEMBUF, false);
if(l_targetList.size() != 1) // one and only one expected
{
FAPI_ERR("fapiGetOtherSideOfMemChannel. expect 1 Centaur %d",
l_targetList.size());
/*@
* @errortype
* @moduleid fapi::MOD_FAPI_GET_OTHER_SIDE_OF_MEM_CHANNEL
* @reasoncode fapi::RC_NO_SINGLE_MEMBUFF
* @userdata1 Number of Memory Buffers
* @userdata2 MCS HUID
* @devdesc fapiGetOtherSideOfMemChannel could not find exactly
* one target on the other side of the correct state
*/
const bool hbSwError = true;
errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
ERRORLOG::ERRL_SEV_UNRECOVERABLE,
fapi::MOD_FAPI_GET_OTHER_SIDE_OF_MEM_CHANNEL,
fapi::RC_NO_SINGLE_MEMBUFF,
l_targetList.size(),
TARGETING::get_huid(l_target),
hbSwError);
// Attach the error log to the fapi::ReturnCode
l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
}
else
{
o_target.setType(fapi::TARGET_TYPE_MEMBUF_CHIP);
o_target.set(reinterpret_cast<void *>(l_targetList[0]));
}
}
else if (i_target.getType() == fapi::TARGET_TYPE_MEMBUF_CHIP)
{
// find the MCS that is associated with this Centaur
getParentAffinityTargets (l_targetList, l_target,
CLASS_UNIT, TYPE_MCS, false);
if(l_targetList.size() != 1) // one and only one expected
{
FAPI_ERR("fapiGetOtherSideOfMemChannel. expect 1 MCS %d",
l_targetList.size());
/*@
* @errortype
* @moduleid fapi::MOD_FAPI_GET_OTHER_SIDE_OF_MEM_CHANNEL
* @reasoncode fapi::RC_NO_SINGLE_MCS
* @userdata1 Number of MCSs
* @userdata2 Membuf HUID
* @devdesc fapiGetOtherSideOfMemChannel could not find exactly
* one target on the other side of the correct state
*/
const bool hbSwError = true;
errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
ERRORLOG::ERRL_SEV_UNRECOVERABLE,
fapi::MOD_FAPI_GET_OTHER_SIDE_OF_MEM_CHANNEL,
fapi::RC_NO_SINGLE_MCS,
l_targetList.size(),
//.........这里部分代码省略.........
示例4: fapiGetParentChip
//******************************************************************************
// fapiGetParentChip function
//******************************************************************************
fapi::ReturnCode fapiGetParentChip(
const fapi::Target& i_chiplet,
fapi::Target & o_chip)
{
FAPI_DBG(ENTER_MRK "fapiGetParentChip");
fapi::ReturnCode l_rc;
// Extract the HostBoot Target pointer for the input chiplet
TARGETING::Target * l_pChiplet =
reinterpret_cast<TARGETING::Target*>(i_chiplet.get());
// Check that the input target is a chiplet
if (!i_chiplet.isChiplet())
{
FAPI_ERR("fapiGetParentChip. Input target type 0x%08x is not a chiplet",
i_chiplet.getType());
/*@
* @errortype
* @moduleid fapi::MOD_FAPI_GET_PARENT_CHIP
* @reasoncode fapi::RC_INVALID_REQUEST
* @userdata1 Type of input target
* @userdata2 Input Target HUID
* @devdesc fapiGetParentChip request for non-chiplet
*/
const bool hbSwError = true;
errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
ERRORLOG::ERRL_SEV_UNRECOVERABLE,
fapi::MOD_FAPI_GET_PARENT_CHIP,
fapi::RC_INVALID_REQUEST,
i_chiplet.getType(),
TARGETING::get_huid(l_pChiplet),
hbSwError);
// Attach the error log to the fapi::ReturnCode
l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
}
else
{
if (l_pChiplet == NULL)
{
/*@
* @errortype
* @moduleid fapi::MOD_FAPI_GET_PARENT_CHIP
* @reasoncode fapi::RC_EMBEDDED_NULL_TARGET_PTR
* @devdesc Target has embedded null target pointer
*/
const bool hbSwError = true;
errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
ERRORLOG::ERRL_SEV_UNRECOVERABLE,
fapi::MOD_FAPI_GET_PARENT_CHIP,
fapi::RC_EMBEDDED_NULL_TARGET_PTR,
0, 0, hbSwError);
// Attach the error log to the fapi::ReturnCode
l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
}
else
{
const TARGETING::Target * l_pChip =
TARGETING::getParentChip(l_pChiplet);
if (l_pChip == NULL)
{
FAPI_ERR("fapiGetParentChip. Parent not found");
/*@
* @errortype
* @moduleid fapi::MOD_FAPI_GET_PARENT_CHIP
* @reasoncode fapi::RC_NO_SINGLE_PARENT
* @userdata1 Input Chiplet Target HUID
* @devdesc fapiGetParentChip did not find one parent
*/
const bool hbSwError = true;
errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
ERRORLOG::ERRL_SEV_UNRECOVERABLE,
fapi::MOD_FAPI_GET_PARENT_CHIP,
fapi::RC_NO_SINGLE_PARENT,
TARGETING::get_huid(l_pChiplet),
0, hbSwError);
// Attach the error log to the fapi::ReturnCode
l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
}
else
{
// Set the output chip type
if (l_pChip->getAttr<TARGETING::ATTR_TYPE>() ==
TARGETING::TYPE_PROC)
{
o_chip.setType(fapi::TARGET_TYPE_PROC_CHIP);
}
else
{
o_chip.setType(fapi::TARGET_TYPE_MEMBUF_CHIP);
}
//.........这里部分代码省略.........
示例5: fapiGetChildChiplets
//******************************************************************************
// fapiGetChildChiplets function
//******************************************************************************
fapi::ReturnCode fapiGetChildChiplets(
const fapi::Target & i_chip,
const fapi::TargetType i_chipletType,
std::vector<fapi::Target> & o_chiplets,
const fapi::TargetState i_state)
{
FAPI_DBG(ENTER_MRK "fapiGetChildChiplets. Chiplet Type:0x%08x State:0x%08x",
i_chipletType, i_state);
fapi::ReturnCode l_rc;
o_chiplets.clear();
// Extract the HostBoot Target pointer for the input chip
TARGETING::Target * l_pChip =
reinterpret_cast<TARGETING::Target*>(i_chip.get());
// Check that the input target is a chip
if (!i_chip.isChip())
{
FAPI_ERR("fapiGetChildChiplets. Input target type 0x%08x is not a chip",
i_chip.getType());
/*@
* @errortype
* @moduleid fapi::MOD_FAPI_GET_CHILD_CHIPLETS
* @reasoncode fapi::RC_INVALID_REQUEST
* @userdata1 Type of input target
* @userdata2 Input Target HUID
* @devdesc fapiGetChildChiplets request for non-chip
*/
const bool hbSwError = true;
errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
ERRORLOG::ERRL_SEV_UNRECOVERABLE,
fapi::MOD_FAPI_GET_CHILD_CHIPLETS,
fapi::RC_INVALID_REQUEST,
i_chip.getType(),
TARGETING::get_huid(l_pChip),
hbSwError);
// Attach the error log to the fapi::ReturnCode
l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
}
else
{
TARGETING::TYPE l_type = TARGETING::TYPE_NA;
if (i_chipletType == fapi::TARGET_TYPE_EX_CHIPLET)
{
l_type = TARGETING::TYPE_EX;
}
else if (i_chipletType == fapi::TARGET_TYPE_MBA_CHIPLET)
{
l_type = TARGETING::TYPE_MBA;
}
else if (i_chipletType == fapi::TARGET_TYPE_MCS_CHIPLET)
{
l_type = TARGETING::TYPE_MCS;
}
else if (i_chipletType == fapi::TARGET_TYPE_XBUS_ENDPOINT)
{
l_type = TARGETING::TYPE_XBUS;
}
else if (i_chipletType == fapi::TARGET_TYPE_ABUS_ENDPOINT)
{
l_type = TARGETING::TYPE_ABUS;
}
else if (i_chipletType == fapi::TARGET_TYPE_L4)
{
l_type = TARGETING::TYPE_L4;
}
else
{
FAPI_ERR("fapiGetChildChiplets. Chiplet type 0x%08x not supported",
i_chipletType);
/*@
* @errortype
* @moduleid fapi::MOD_FAPI_GET_CHILD_CHIPLETS
* @reasoncode fapi::RC_UNSUPPORTED_REQUEST
* @userdata1 Type of requested chiplet
* @userdata2 Input Chip Target HUID
* @devdesc fapiGetChildChiplets request for unsupported
* or invalid chiplet type
*/
const bool hbSwError = true;
errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
ERRORLOG::ERRL_SEV_UNRECOVERABLE,
fapi::MOD_FAPI_GET_CHILD_CHIPLETS,
fapi::RC_UNSUPPORTED_REQUEST,
i_chipletType,
TARGETING::get_huid(l_pChip),
hbSwError);
// Attach the error log to the fapi::ReturnCode
l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
}
if (!l_rc)
{
if (l_pChip == NULL)
//.........这里部分代码省略.........
示例6: proc_pcie_config
// HWP entry point, comments in header
fapi::ReturnCode proc_pcie_config(
const fapi::Target & i_target)
{
fapi::ReturnCode rc;
uint8_t pcie_enabled;
uint8_t num_phb;
// mark HWP entry
FAPI_INF("proc_pcie_config: Start");
do
{
// check for supported target type
if (i_target.getType() != fapi::TARGET_TYPE_PROC_CHIP)
{
FAPI_ERR("proc_pcie_config: Unsupported target type");
const fapi::Target & TARGET = i_target;
FAPI_SET_HWP_ERROR(rc, RC_PROC_PCIE_CONFIG_INVALID_TARGET);
break;
}
// query PCIE partial good attribute
rc = FAPI_ATTR_GET(ATTR_PROC_PCIE_ENABLE,
&i_target,
pcie_enabled);
if (!rc.ok())
{
FAPI_ERR("proc_pcie_config: Error querying ATTR_PROC_PCIE_ENABLE");
break;
}
// initialize PBCQ/AIB, configure PBCQ FIRs (only if partial good
// atttribute is set)
if (pcie_enabled == fapi::ENUM_ATTR_PROC_PCIE_ENABLE_ENABLE)
{
// determine PHB configuration
rc = FAPI_ATTR_GET(ATTR_PROC_PCIE_NUM_PHB,
&i_target,
num_phb);
if (!rc.ok())
{
FAPI_ERR("proc_pcie_config: Error from FAPI_ATTR_GET (ATTR_PROC_PCIE_NUM_PHB)");
break;
}
rc = proc_pcie_config_pbcq(i_target);
if (!rc.ok())
{
FAPI_ERR("proc_pcie_config: Error from proc_pcie_config_pbcq");
break;
}
rc = proc_pcie_config_pbcq_fir(i_target, num_phb);
if (!rc.ok())
{
FAPI_ERR("proc_pcie_config: Error from proc_pcie_config_pbcq_fir");
break;
}
rc = proc_a_x_pci_dmi_pll_setup_unmask_lock(
i_target,
PCIE_CHIPLET_0x09000000);
if (!rc.ok())
{
FAPI_ERR("proc_pcie_config: Error from proc_a_x_pci_dmi_pll_setup_unmask_lock");
break;
}
}
else
{
FAPI_DBG("proc_pcie_config: Skipping initialization (partial good)");
}
} while(0);
// mark HWP exit
FAPI_INF("proc_pcie_config: End");
return rc;
}
示例7: if
/**
* p8_pm_prep_for_reset Call underlying unit procedure to perform readiness for
* reinitialization of PM complex.
*
* @param[in] i_primary_chip_target Primary Chip target which will be passed
* to all the procedures
* @param[in] i_secondary_chip_target Secondary Chip target will be passed for
* pmc_init -reset only if it is DCM otherwise this should be NULL.
* @param[in] i_mode (PM_RESET (hard - will kill the PMC);
* PM_RESET_SOFT (will not fully reset the PMC))
*
* @retval ECMD_SUCCESS
* @retval ERROR defined in xml
*/
fapi::ReturnCode
p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target,
const fapi::Target &i_secondary_chip_target,
uint32_t i_mode )
{
fapi::ReturnCode rc;
fapi::ReturnCode rc_hold;
uint32_t e_rc = 0;
std::vector<fapi::Target> l_exChiplets;
ecmdDataBufferBase data(64);
ecmdDataBufferBase mask(64);
uint64_t address = 0;
const char * PM_MODE_NAME_VAR; // Defines storage for PM_MODE_NAME
bool b_special_wakeup_pri = false;
bool b_special_wakeup_sec = false;
fapi::Target dummy;
do
{
FAPI_INF("p8_pm_prep_for_reset start ....");
uint8_t ipl_mode = 0;
rc = FAPI_ATTR_GET(ATTR_IS_MPIPL, NULL, ipl_mode);
if (!rc.ok())
{
FAPI_ERR("fapiGetAttribute of ATTR_IS_MPIPL rc = 0x%x", (uint32_t)rc);
break;
}
FAPI_INF("IPL mode = %s", ipl_mode ? "MPIPL" : "NORMAL");
if (i_mode == PM_RESET)
{
FAPI_INF("Hard reset detected");
}
else if (i_mode == PM_RESET_SOFT)
{
FAPI_INF("Soft reset detected. Idle functions will not be affected");
}
else
{
FAPI_ERR("Mode parameter value not supported: %u", i_mode);
uint32_t & MODE = i_mode;
FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PREP_UNSUPPORTED_MODE_ERR);
break;
}
if ( i_secondary_chip_target.getType() == TARGET_TYPE_NONE )
{
if ( i_primary_chip_target.getType() == TARGET_TYPE_NONE )
{
FAPI_ERR("Set primay target properly for SCM " );
const fapi::Target PRIMARY_TARGET = i_primary_chip_target;
FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PREP_TARGET_ERR);
break;
}
FAPI_INF("Running on SCM");
}
else
{
FAPI_INF("Running on DCM");
}
// ******************************************************************
// Clear the Deep Exit Masks to allow Special Wake-up to occur
// ******************************************************************
// Primary
rc = clear_deep_exit_mask(i_primary_chip_target);
if (rc)
{
FAPI_ERR("clear_deep_exit_mask: Failed for Primary Target %s",
i_primary_chip_target.toEcmdString());
break;
}
// Secondary
if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
{
rc = clear_deep_exit_mask(i_secondary_chip_target);
//.........这里部分代码省略.........
示例8: io_fir_isolation
ReturnCode io_fir_isolation(const fapi::Target &i_target){
ReturnCode o_rc;
uint32_t rc_ecmd=0;
fir_io_interface_t interface;
io_interface_t gcr_interface; // requires different base address for gcr scoms
uint32_t group;
ecmdDataBufferBase fir_data(64);
rc_ecmd|=fir_data.flushTo0();
if(rc_ecmd)
{
o_rc.setEcmdError(rc_ecmd);
return(o_rc);
}
//on dmi
if( (i_target.getType() == fapi::TARGET_TYPE_MCS_CHIPLET )){
FAPI_DBG("This is a Processor DMI bus using base DMI scom address");
interface=FIR_CP_IOMC0_P0; // base scom for MC bus
gcr_interface=CP_IOMC0_P0;
o_rc=read_fir_reg(i_target,interface,fir_data);
group=3;
if(o_rc)
return(o_rc);
o_rc=io_error_isolation(i_target,gcr_interface,group,fir_data);
}
//on cen side
else if((i_target.getType() == fapi::TARGET_TYPE_MEMBUF_CHIP)){
FAPI_DBG("This is a Centaur DMI bus using base DMI scom address");
interface=FIR_CEN_DMI;
gcr_interface=CEN_DMI;
o_rc=read_fir_reg(i_target,interface,fir_data);
group=0;
if(o_rc)
return(o_rc);
o_rc=io_error_isolation(i_target,gcr_interface,group,fir_data);
}
// on x bus
else if((i_target.getType() == fapi::TARGET_TYPE_XBUS_ENDPOINT)){
FAPI_DBG("This is a X Bus invocation");
interface=FIR_CP_FABRIC_X0;
gcr_interface=CP_FABRIC_X0;
o_rc=read_fir_reg(i_target,interface,fir_data);
group=0;
if(o_rc)
return(o_rc);
o_rc=io_error_isolation(i_target,gcr_interface,group,fir_data);
}
//on a bus
else if((i_target.getType() == fapi::TARGET_TYPE_ABUS_ENDPOINT)){
FAPI_DBG("This is an A Bus invocation");
interface=FIR_CP_FABRIC_A0;
gcr_interface=CP_FABRIC_A0;
o_rc=read_fir_reg(i_target,interface,fir_data);
group=0;
if(o_rc)
return(o_rc);
o_rc=io_error_isolation(i_target,gcr_interface,group,fir_data);
}
else{
FAPI_ERR("Invalid io_fir HWP invocation . Target doesnt belong to DMI/X/A instances");
const fapi::Target & ENDPOINT = i_target;
FAPI_SET_HWP_ERROR(o_rc, IO_FIR_INVALID_INVOCATION_RC);
}
return(o_rc);
}