C++ codeGen::currAddr方法代码示例

bool insnCodeGen::modifyCall(Address targetAddr, NS_x86::instruction &insn, codeGen &gen) {
   // If we're within a 32-bit displacement, we reuse the original call. 
   // Otherwise we say "welp, sucks to be us", strip any prefixes, 
   // and do a 64-bit long thang

   const unsigned char *origInsn = insn.ptr();
   unsigned insnType = insn.type();
   codeBufIndex_t cur = gen.getIndex();

   // Let's try copying prefixes

   GET_PTR(newInsn, gen);
   copy_prefixes_nosize(origInsn, newInsn, insnType);
   SET_PTR(newInsn, gen);

   // If we're within 32-bits, then okay; otherwise rewind and use
   // 64-bit
   long disp = (targetAddr - (gen.currAddr() + CALL_REL32_SZ));
   if (is_disp32(disp)) {
      insnCodeGen::generateCall(gen, gen.currAddr(), targetAddr);
      return true;
   }

   // Otherwise suck monkey
   gen.setIndex(cur);
   insnCodeGen::generateCall(gen, gen.currAddr(), targetAddr);
   
   return true;
}

// Could be a lot smarter here...
bool InstWidgetPatch::apply(codeGen &gen, CodeBuffer *) {
   relocation_cerr << "\t\t InstWidgetPatch::apply " << this << " /w/ tramp " << tramp << endl;

   gen.registerInstrumentation(tramp, gen.currAddr());
   bool ret = tramp->generateCode(gen, gen.currAddr());
   return ret;
}

bool CodeBuffer::BufferElement::generate(CodeBuffer *buf,
                                         codeGen &gen,
                                         int &shift,
                                         bool &regenerate) {
   codeBufIndex_t start = gen.getIndex();
   addr_ = gen.currAddr();

   // By definition, labels can only apply to the start of a
   // BufferElement. Update it now with our current address.
   buf->updateLabel(labelID_, addr_ - gen.startAddr(), regenerate);

   // Get the easy bits out of the way
   gen.copy(buffer_);

   if (patch_) {
      // Now things get interesting
      if (!patch_->apply(gen, buf)) {
	relocation_cerr << "Patch failed application, ret false" << endl;
         return false;
      }
   }
   unsigned newSize = gen.getDisplacement(start, gen.getIndex());
   if (newSize > size_) {
      shift += newSize - size_;
      size_ = newSize;
      regenerate = true;
   }
   else {
      gen.fill(size_ - newSize, codeGen::cgNOP);
   }
#if 0
   else if (newSize < size_) {

bool insnCodeGen::modifyJump(Address targetAddr, NS_x86::instruction &insn, codeGen &gen) {
   Address from = gen.currAddr();

   const unsigned char *origInsn = insn.ptr();
   unsigned insnType = insn.type();
  
   GET_PTR(newInsn, gen);

   from += copy_prefixes(origInsn, newInsn, insnType);
   // Otherwise we will fail to account for them and
   // generate a branch that is +(# prefix bytes)

   SET_PTR(newInsn, gen);
    
   insnCodeGen::generateBranch(gen, from, targetAddr);
   return true;
}

bool IPPatch::apply(codeGen &gen, CodeBuffer *) {
  relocation_cerr << "\t\t IPPatch::apply" << endl;

  // We want to generate addr (as modified) into the appropriate location.
  // TODO get rid of the #ifdef here...

#if defined(arch_x86) || defined(arch_x86_64) 
    GET_PTR(newInsn, gen); 
    
    *newInsn = 0xE8;
    newInsn++;
    unsigned int *temp = (uint32_t *) newInsn;
    *temp = 0;
    newInsn += sizeof(uint32_t);
    SET_PTR(newInsn, gen);
    Address offset = addr - gen.currAddr() + insn->size();
    REGET_PTR(newInsn, gen);
    *newInsn = 0x81;
    newInsn++;
    *newInsn = 0x04;
    newInsn++;
    *newInsn = 0x24;
    newInsn++;
    temp =  (uint32_t *) newInsn;
    *temp = offset;
    newInsn += sizeof(uint32_t);	  

    if (type == Reg) {
      assert(reg != (Register) -1);
      // pop...
      *newInsn++ = static_cast<unsigned char>(0x58 + reg); // POP family
    }
    SET_PTR(newInsn, gen);
#else
    // For dynamic we can do this in-line
    assert(gen.addrSpace()->edit());

    // Must be in LR
    if (reg == -1) reg = registerSpace::lr;
    assert(reg == registerSpace::lr);

    instPoint *point = gen.point();
    // If we do not have a point then we have to invent one
    if (!point || 
	(point->type() != instPoint::PreInsn &&
	 point->insnAddr() != addr)) {
      point = instPoint::preInsn(func, block, addr, insn, true);
    }
    assert(point);
    
    registerSpace *rs = registerSpace::actualRegSpace(point);
    gen.setRegisterSpace(rs);
    
    int stackSize = 0;
    pdvector<Register> freeReg;
    pdvector<Register> excludeReg;
    
    Register scratchPCReg = gen.rs()->getScratchRegister(gen, true);
    excludeReg.push_back(scratchPCReg);
    Register scratchReg = gen.rs()->getScratchRegister(gen, excludeReg, true);
    
    if ((scratchPCReg == REG_NULL) && (scratchReg == REG_NULL)) {
      excludeReg.clear();
      stackSize = insnCodeGen::createStackFrame(gen, 2, freeReg, excludeReg);
      assert(stackSize == 2);
      scratchPCReg = freeReg[0];
      scratchReg = freeReg[1];
      
    } else if (scratchReg == REG_NULL && scratchPCReg != REG_NULL) {
      stackSize = insnCodeGen::createStackFrame(gen, 1, freeReg, excludeReg);
      assert(stackSize == 1);
      scratchReg = freeReg[0];
    } 
    
    //scratchPCReg == NULL && scratchReg != NULL - not a valid case 
    //since getScratchRegister works in order
    
    // relocaAddr may have moved if we added instructions to setup a new stack frame
    Address newRelocAddr = gen.currAddr();
    
    insnCodeGen::generateBranch(gen, gen.currAddr(),  gen.currAddr()+4, true); // blrl
    insnCodeGen::generateMoveFromLR(gen, scratchPCReg); // mflr
    
    Address varOffset = addr - newRelocAddr;
    gen.emitter()->emitCallRelative(scratchReg, varOffset, scratchPCReg, gen);
    insnCodeGen::generateMoveToLR(gen, scratchReg);

    if( stackSize > 0) {
      insnCodeGen::removeStackFrame(gen); 
    }
#endif
    return true;
}

bool CFPatch::apply(codeGen &gen, CodeBuffer *buf) {

  if (needsTOCUpdate()) {
     relocation_cerr << "\t\t\t isSpecialCase..." << endl;
     gen.setFunction(const_cast<func_instance *>(func));
     if (!handleTOCUpdate(gen)) {
       relocation_cerr << "TOC special case handling in PPC64 failed" << endl;
       return false;
     }
     return true;
   }

   // Question: are we doing an inter-module static control transfer?
   // If so, things get... complicated
   if (isPLT(gen)) {
     relocation_cerr << "\t\t\t isPLT..." << endl;
      if (!applyPLT(gen, buf)) {
	relocation_cerr << "PLT special case handling in PPC64" << endl;
         return false;
      }
      return true;
   }

   // Otherwise this is a classic, and therefore easy.
   int targetLabel = target->label(buf);
   Address targetAddr = buf->predictedAddr(targetLabel);

   relocation_cerr << "\t\t CFPatch::apply, type " << type << ", origAddr " << hex << origAddr_ 
                   << ", and label " << dec << targetLabel << endl;

   if (orig_insn.isValid()) {
      relocation_cerr << "\t\t\t Currently at " << hex << gen.currAddr() << " and targeting predicted " << targetAddr << dec << endl;
      switch(type) {
         case CFPatch::Jump: {
            relocation_cerr << "\t\t\t Generating CFPatch::Jump from " 
                            << hex << gen.currAddr() << " to " << targetAddr << dec << endl;
            if (!insnCodeGen::modifyJump(targetAddr, *ugly_insn, gen)) {
	      relocation_cerr << "modifyJump failed, ret false" << endl;
               return false;
            }
            return true;
         }
         case CFPatch::JCC: {
            relocation_cerr << "\t\t\t Generating CFPatch::JCC from " 
                            << hex << gen.currAddr() << " to " << targetAddr << dec << endl;            
            if (!insnCodeGen::modifyJcc(targetAddr, *ugly_insn, gen)) {
	      relocation_cerr << "modifyJcc failed, ret false" << endl;
               return false;
            }
            return true;            
         }
         case CFPatch::Call: {
            // Special handling for function call replacement:
            //
            // Here we are certain that we are dealing with
            // an intra-module call. For PIE code, the global entry of 
            // the callee will use R12 to set up R2. Since we do not
            // set R12 to be the global entry, we should use the local entry 
            if (target->type() == TargetInt::BlockTarget) {
                Target<block_instance *> *t = static_cast<Target<block_instance *> *>(target);
                block_instance *tb = t->t();
                func_instance *callee = tb->entryOfFunc();
                if (callee->ifunc()->containsPowerPreamble() && callee->addr() == targetAddr) targetAddr += 8;
            }

            if (!insnCodeGen::modifyCall(targetAddr, *ugly_insn, gen)) {
	      relocation_cerr << "modifyCall failed, ret false" << endl;
               return false;
            }
            return true;
         }
         case CFPatch::Data: {
            if (!insnCodeGen::modifyData(targetAddr, *ugly_insn, gen)) {
	      relocation_cerr << "modifyData failed, ret false" << endl;
               return false;
            }
            return true;
         }
      }
   }
   else {
      switch(type) {
         case CFPatch::Jump:
            insnCodeGen::generateBranch(gen, gen.currAddr(), targetAddr);
            break;
         case CFPatch::Call:
            insnCodeGen::generateCall(gen, gen.currAddr(), targetAddr);
            break;
         default:
            assert(0);
      }
   }
   
   return true;
}

bool insnCodeGen::modifyDisp(signed long newDisp, instruction &insn, codeGen &gen, Architecture arch, Address addr) {

    relocation_cerr << "modifyDisp "
        << std::hex << addr
        << std::dec << ", newDisp = " << newDisp << endl;

    const unsigned char* origInsn = insn.ptr();
    unsigned insnType = insn.type();
    unsigned insnSz = insn.size();
    Address from = gen.currAddr();

    unsigned newInsnSz = 0;

    InstructionAPI::InstructionDecoder d2(origInsn, insnSz, arch);
    InstructionAPI::Instruction::Ptr origInsnPtr = d2.decode();

    StackAccess* origAccess;
    signed long origDisp;
    if (!getMemoryOffset(NULL, NULL, origInsnPtr, addr, MachRegister(), StackAnalysis::Height(0), origAccess, arch)) {
        assert(0);
    } else {
        origDisp = origAccess->disp();
    }

    GET_PTR(newInsn, gen);

    const unsigned char* newInsnStart = newInsn;
    const unsigned char* origInsnStart = origInsn;

    /******************************************* prefix/opcode ****************/
    unsigned nPrefixes;

    // In other cases, we can rewrite the insn directly; in the 64-bit case, we
    // still need to copy the insn
    // Copy prefix bytes
    from += copy_prefixes(origInsn, newInsn, insnType);
    nPrefixes = count_prefixes(insnType);
    newInsnSz += nPrefixes;

    // Copy opcode bytes
    if (*origInsn == 0x0F) {
        *newInsn++ = *origInsn++;
        newInsnSz++;
        // 3-byte opcode support
        if (*origInsn == 0x38 || *origInsn == 0x3A) {
            *newInsn++ = *origInsn++;
            newInsnSz++;
        }
    }
    *newInsn++ = *origInsn++;
    newInsnSz++;

    /******************************************* modRM *************************/
    // Update displacement size (mod bits in ModRM), if necessary
    int expectedDifference = 0;
    unsigned char modrm = *origInsn++;
    unsigned char modrm_mod = MODRM_MOD(modrm);
    //unsigned char modrm_reg = MODRM_REG(modrm);
    unsigned char modrm_rm = MODRM_RM(modrm);


    int origDispSize = -1;

    if (origDisp != newDisp) {
        if (modrm_mod == 0) {
            if (modrm_rm == 5) {
                origDispSize = 32;
            } else {
                origDispSize = -1;
            }
        } else if (modrm_mod == 1) {
            origDispSize = 8;
        } else if (modrm_mod == 2) {
            origDispSize = 32;
        } else {
            origDispSize = -1;
        }

        // Switch modrm_mod if necessary
        if (origDispSize == -1) {
            // If we didn't have a displacement before, and we do now, need to handle it!
            if (is_disp8(newDisp)) {
                modrm = modrm + 0x40;
                expectedDifference = 1;
            } else if (is_disp32(newDisp)) {
                modrm = modrm + 0x80;
                expectedDifference = 4;
            }

        } else if (origDispSize == 8) {
            if (is_disp8(newDisp)) {
            } else if (is_disp32(newDisp)) {
                modrm = modrm + 0x40;
                expectedDifference = 3;
            }
        } else if (origDispSize == 32) {
            if (is_disp8(newDisp)) {
                modrm = modrm - 0x40;
                expectedDifference = -3;
            } else if (is_disp32(newDisp)) {
//.........这里部分代码省略.........

bool insnCodeGen::modifyData(Address targetAddr, instruction &insn, codeGen &gen) {
     // We may need to change these from 32-bit relative
   // to 64-bit absolute. This happens with the jumps and calls
   // as well, but it's better encapsulated there.
   
   // We have three options:
   // a) 32-bit relative (AKA "original").
   // b) 32-bit absolute version (where 32-bit relative would fail but we're low)
   // c) 64-bit absolute version
   const unsigned char *origInsn = insn.ptr();
   unsigned insnType = insn.type();
   unsigned insnSz = insn.size();   
   Address from = gen.currAddr();

   bool is_data_abs64 = false;
   signed long newDisp = targetAddr - from;
   GET_PTR(newInsn, gen);

   Register pointer_reg = (Register)-1;
     
#if defined(arch_x86_64)	
   // count opcode bytes (1 or 2)
   unsigned nPrefixes = count_prefixes(insnType);
   unsigned nOpcodeBytes = 1;
   if (*(origInsn + nPrefixes) == 0x0F) {
      nOpcodeBytes = 2;
       // 3-byte opcode support
       if ((*(origInsn + nPrefixes) == 0x0F) && (*(origInsn + nPrefixes + 1) == 0x38 || *(origInsn + nPrefixes + 1) == 0x3A)) {
          nOpcodeBytes = 3;  
       }
   }

   if (!is_disp32(newDisp+insnSz) && !is_addr32(targetAddr)) {
      // Case C: replace with 64-bit.
      is_data_abs64 = true;
      unsigned char mod_rm = *(origInsn + nPrefixes + nOpcodeBytes);
      pointer_reg = (mod_rm & 0x38) != 0 ? 0 : 3;
      SET_PTR(newInsn, gen);
      emitPushReg64(pointer_reg, gen);
      emitMovImmToReg64(pointer_reg, targetAddr, true, gen);
      REGET_PTR(newInsn, gen);
   }
#endif

   const unsigned char* origInsnStart = origInsn;

   // In other cases, we can rewrite the insn directly; in the 64-bit case, we
   // still need to copy the insn
   from += copy_prefixes(origInsn, newInsn, insnType);

   if (*origInsn == 0x0F) {
      *newInsn++ = *origInsn++;
       // 3-byte opcode support
       if (*origInsn == 0x38 || *origInsn == 0x3A) {
           *newInsn++ = *origInsn++;
       }
   }
     
   // And the normal opcode
   *newInsn++ = *origInsn++;
   
   if (is_data_abs64) {
      // change ModRM byte to use [pointer_reg]: requires
      // us to change last three bits (the r/m field)
      // to the value of pointer_reg
      unsigned char mod_rm = *origInsn++;
      assert(pointer_reg != (Register)-1);
      mod_rm = (mod_rm & 0xf8) + pointer_reg;
      *newInsn++ = mod_rm;
   }
   else if (is_disp32(newDisp+insnSz)) {
      // Whee easy case
      *newInsn++ = *origInsn++;
      // Size doesn't change....
      *((int *)newInsn) = (int)(newDisp - insnSz);
      newInsn += 4;
   }
   else if (is_addr32(targetAddr)) {
      assert(!is_disp32(newDisp+insnSz));
      unsigned char mod_rm = *origInsn++;
      
      // change ModRM byte to use SIB addressing (r/m == 4)
      mod_rm = (mod_rm & 0xf8) + 4;
      *newInsn++ = mod_rm;
      
      // SIB == 0x25 specifies [disp32] addressing when mod == 0
      *newInsn++ = 0x25;
      
      // now throw in the displacement (the absolute 32-bit address)
      *((int *)newInsn) = (int)(targetAddr);
      newInsn += 4;
   }
   else {
      // Should never be reached...
      assert(0);
   }
   
   // there may be an immediate after the displacement for RIP-relative
   // so we copy over the rest of the instruction here
   origInsn += 4;
//.........这里部分代码省略.........

bool insnCodeGen::modifyJcc(Address targetAddr, NS_x86::instruction &insn, codeGen &gen) {
   const unsigned char *origInsn = insn.ptr();
   unsigned insnType = insn.type();
   Address from = gen.currAddr();

   Address potential;
   signed long disp;
   codeBufIndex_t start = gen.getIndex();
   GET_PTR(newInsn, gen);

   from += copy_prefixes_nosize_or_segments(origInsn, newInsn, insnType); 
   

   //8-bit jump
   potential = from + 2;
   disp = targetAddr - potential;
   if (is_disp8(disp)) {
      convert_to_rel8(origInsn, newInsn);
      *newInsn++ = (signed char) disp;
      SET_PTR(newInsn, gen);
      return true;
   }

   //Can't convert short E0-E3 loops/jumps to 32-bit equivalents
   if (*origInsn < 0xE0 || *origInsn > 0xE3) {
     /*
      //16-bit jump
      potential = from + 5;
      disp = targetAddr - potential;
      if (is_disp16(disp) && gen.fromSpace()->getAddressWidth() != 8) {
         *newInsn++ = 0x66; //Prefix to shift 32-bit to 16-bit
         convert_to_rel32(origInsn, newInsn);
         *((signed short *) newInsn) = (signed short) disp;
         newInsn += 2;
         SET_PTR(newInsn, gen);
         return true;
      }
     */
      //32-bit jump
      potential = from + 6;
      disp = targetAddr - potential;
      if (is_disp32(disp)) {
         convert_to_rel32(origInsn, newInsn);
         *((signed int *) newInsn) = (signed int) disp;
         newInsn += 4;
         SET_PTR(newInsn, gen);
         return true;
      }
   }
   
   // We use a three-step branch system that looks like so:
   //   jump conditional <A> 
   // becomes
   //   jump conditional <B>
   //   jump <C>
   //   B: jump <A>
   //   C: ... next insn

   // Moves as appropriate...
   convert_to_rel8(origInsn, newInsn);
   // We now want a 2-byte branch past the branch at B
   *newInsn++ = 2;
   
   // Now for the branch to C - <jumpSize> unconditional branch
   *newInsn++ = 0xEB; 
   SET_PTR(newInsn, gen);
    // We now want to 1) move forward a byte (the offset we haven't filled
   // in yet) and track that we want to fill it in once we're done.
   codeBufIndex_t jump_to_c_offset_index = gen.getIndex();
   gen.moveIndex(1);
   codeBufIndex_t jump_from_index = gen.getIndex();

   // Original address is a little skewed... 
   // We've moved past the original address (to the tune of nPrefixes + 2 (JCC) + 2 (J))
   Address currAddr = from + (unsigned) gen.getIndex() - start;
   insnCodeGen::generateBranch(gen, currAddr, targetAddr);
   codeBufIndex_t done = gen.getIndex();

   // Go back and generate the branch _around_ the offset we just calculated
   gen.setIndex(jump_to_c_offset_index);
   REGET_PTR(newInsn, gen);

   //Go back and fill in the size of the jump at B into the 'jump <C>'
   // The -1 is because 
   *newInsn = gen.getDisplacement(jump_from_index, done);
   SET_PTR(newInsn, gen);
   gen.setIndex(done);
   return true;
}