Python xmostest.request_resource函数代码示例

def do_input_events_test(events):
    resources = xmostest.request_resource("xsim")

    path = ''
    if not events:
        path += '_basic'
    else:
        if events:
            path += '_events'

    binary = 'gpio_input_events_test/bin/input' + path + \
        '/gpio_input_events_test_input' + path + '.xe'

    checker = GPIOEventsChecker(test_port="tile[0]:XS1_PORT_4D",
                                expected_test_port_data=0b1010,
                                num_clients=4,
                                trigger_port="tile[0]:XS1_PORT_4B")

    tester = xmostest.ComparisonTester(open('input_events_test%s.expected' % path),
                                       'lib_gpio', 'gpio_sim_tests',
                                       'input_events_test',
                                       {'events':events},
                                       regexp=True)

    xmostest.run_on_simulator(resources['xsim'], binary, simthreads = [checker],
                              tester = tester)

def runtest():
    resources = xmostest.request_resource("xsim")

    binary = 'i2s_tdm_master_test/bin/tdm/i2s_tdm_master_test_tdm.xe'

    checker = TDMMasterChecker(
        "tile[0]:XS1_PORT_1A",
        "tile[0]:XS1_PORT_1N",
        ["tile[0]:XS1_PORT_1O"],
        ["tile[0]:XS1_PORT_1P"],
        "tile[0]:XS1_PORT_1L", 
        "tile[0]:XS1_PORT_16A", 
        "tile[0]:XS1_PORT_1M",
        extra_clocks = 16)

    tester = xmostest.ComparisonTester(open('tdm_cb_test.expect'),
                                     'lib_i2s', 'i2s_tdm_master_sim_tests',
                                     'tdm_test',
                                     {},
                                       regexp=True,
                                       ignore=["CONFIG:"])

    xmostest.run_on_simulator(resources['xsim'], binary,
                              simthreads = [checker],
                              tester = tester,
                              simargs = ['--vcd-tracing','-o ttt.vcd -tile tile[0] -ports'])

    return

def do_rx_test(mac, arch, rx_clk, rx_phy, tx_clk, tx_phy, packets, test_file, seed,
               level='nightly', extra_tasks=[]):

    testname,extension = os.path.splitext(os.path.basename(test_file))

    resources = xmostest.request_resource("xsim")

    binary = 'test_rx_backpressure/bin/{mac}_{phy}_{arch}/test_rx_backpressure_{mac}_{phy}_{arch}.xe'.format(
        mac=mac, phy=tx_phy.get_name(), arch=arch)

    if xmostest.testlevel_is_at_least(xmostest.get_testlevel(), level):
        print "Running {test}: {mac} mac, {phy} phy, {arch} arch sending {n} packets at {clk} (seed {seed})".format(
            test=testname, n=len(packets), mac=mac,
            phy=tx_phy.get_name(), arch=arch, clk=tx_clk.get_name(), seed=seed)

    tx_phy.set_packets(packets)

    tester = OutputChecker('lib_ethernet', 'basic_tests', testname,
                           {'mac':mac, 'phy':tx_phy.get_name(), 'clk':tx_clk.get_name(), 'arch':arch})

    tester.set_min_testlevel(level)

    simargs = get_sim_args(testname, mac, tx_clk, tx_phy, arch)
    xmostest.run_on_simulator(resources['xsim'], binary,
                              simthreads=[rx_clk, rx_phy, tx_clk, tx_phy] + extra_tasks,
                              tester=tester,
                              simargs=simargs)

def do_slave_rx_tx(combined, burnt_threads, miso_enable, mode, transfer_size, testlevel):

    resources = xmostest.request_resource("xsim")

    binary = "spi_slave_rx_tx/bin/{com}{burnt}{miso}{m}{t}/spi_slave_rx_tx_{com}{burnt}{miso}{m}{t}.xe".format(com=combined,burnt=burnt_threads,miso=miso_enable,m=mode,t=transfer_size)

    checker = SPISlaveChecker("tile[0]:XS1_PORT_1C",
                               "tile[0]:XS1_PORT_1D",
                               "tile[0]:XS1_PORT_1A",
                               "tile[0]:XS1_PORT_1B",
                               "tile[0]:XS1_PORT_1E",
                               "tile[0]:XS1_PORT_16B",
                               "tile[0]:XS1_PORT_1F")

    tester = xmostest.ComparisonTester(open('slave.expect'),
                                     'lib_spi',
                                     'spi_slave_sim_tests',
                                     'rx_tx_slave_{com}{burnt}{miso}{m}{t}.xe'.format(com=combined,burnt=burnt_threads,miso=miso_enable,m=mode,t=transfer_size),
                                     {'combined': combined, 'burnt_threads': burnt_threads, 'miso_enable': miso_enable, 'mode': mode, 'transfer_size': transfer_size},
                                     regexp=True)

    tester.set_min_testlevel(testlevel)

    xmostest.run_on_simulator(resources['xsim'], binary,
                              simthreads = [checker],
                              #simargs=['--vcd-tracing', '-o ./spi_slave_rx_tx/trace.vcd -tile tile[0] -pads -functions -clock-blocks -ports-detailed -instructions'],
                              simargs=[],
                              suppress_multidrive_messages = False,
                              tester = tester)

def do_master_test(num_in, num_out, testlevel):

    resources = xmostest.request_resource("xsim")

    binary = 'i2s_tdm_master_test/bin/i2s/i2s_tdm_master_test_i2s.xe'

    clk = Clock("tile[0]:XS1_PORT_1A")


    checker = I2SMasterChecker(
        "tile[0]:XS1_PORT_1B",
        "tile[0]:XS1_PORT_1C",
        ["tile[0]:XS1_PORT_1H","tile[0]:XS1_PORT_1I","tile[0]:XS1_PORT_1J", "tile[0]:XS1_PORT_1K"],
        ["tile[0]:XS1_PORT_1D","tile[0]:XS1_PORT_1E","tile[0]:XS1_PORT_1F", "tile[0]:XS1_PORT_1G"],
        "tile[0]:XS1_PORT_1L", 
        "tile[0]:XS1_PORT_16A", 
        "tile[0]:XS1_PORT_1M",
         clk)

    tester = xmostest.ComparisonTester(open('master_test.expect'),
                                     'lib_i2s', 'i2s_tdm_master_sim_tests',
                                       'i2s_test', {},ignore=["CONFIG:.*"])

    tester.set_min_testlevel(testlevel)

    xmostest.run_on_simulator(resources['xsim'], binary,
                              simthreads = [clk, checker],
                              tester = tester)

def do_input_basic_test(events, timestamps, supply_pin_map, crosstile):
    resources = xmostest.request_resource("xsim")

    path = ''
    if not events and not timestamps and not supply_pin_map and not crosstile:
        path += '_basic'
    else:
        if events:
            path += '_events'
        if timestamps:
            path += '_timestamps'
        if supply_pin_map:
            path += '_supply_pin_map'
        if crosstile:
            path += '_crosstile'

    binary = 'gpio_input_basic_test/bin/input' + path + \
        '/gpio_input_basic_test_input' + path + '.xe'

    checker = GPIOBasicChecker(mode="input",
                               test_port="tile[0]:XS1_PORT_4D",
                               expected_test_port_data=0b1010,
                               num_clients=4)

    tester = xmostest.ComparisonTester(open('input_basic_test.expected'),
                                       'lib_gpio', 'gpio_sim_tests',
                                       'input_basic_test',
                                       {'events':events,
                                       'timestamps':timestamps,
                                       'supply_pin_map':supply_pin_map,
                                       'crosstile':crosstile},
                                       regexp=True)

    xmostest.run_on_simulator(resources['xsim'], binary, simthreads = [checker],
                              tester = tester)

def do_dc_offset_removal_test(testlevel):

    # Check if the test is running in an environment with hardware resources
    # available - the test takes a long time to run in the simulator
    args = xmostest.getargs()
    if not args.remote_resourcer:
        # Abort the test
        print 'remote resourcer not avaliable'
        return

    binary = 'test_dc_offset_removal/bin/test_dc_offset_removal.xe'

    tester = xmostest.ComparisonTester(open('test_dc_offset_removal.expect'),
                                       'lib_mic_array',
                                       'lib_mic_array_backend_tests',
                                       'dc_offset_removal_test_%s'%testlevel)

    tester.set_min_testlevel(testlevel)

    resources = xmostest.request_resource("testrig_os_x_12",
                                          tester)

    run_job = xmostest.run_on_xcore(resources['uac2_xcore200_mc_analysis_device_1'],
                                    binary,
                                    tester=tester)

    xmostest.complete_all_jobs()

def do_master_test(num_in, num_out, testlevel):

    resources = xmostest.request_resource("xsim")

    binary = 'i2s_frame_master_test/bin/{tl}_{i}{o}/i2s_frame_master_test_{tl}_{i}{o}.xe'.format(i=num_in, o=num_out,tl=testlevel)

    clk = Clock("tile[0]:XS1_PORT_1A")


    checker = I2SMasterChecker(
        "tile[0]:XS1_PORT_1B",
        "tile[0]:XS1_PORT_1C",
        ["tile[0]:XS1_PORT_1H","tile[0]:XS1_PORT_1I","tile[0]:XS1_PORT_1J", "tile[0]:XS1_PORT_1K"],
        ["tile[0]:XS1_PORT_1D","tile[0]:XS1_PORT_1E","tile[0]:XS1_PORT_1F", "tile[0]:XS1_PORT_1G"],
        "tile[0]:XS1_PORT_1L",
        "tile[0]:XS1_PORT_16A",
        "tile[0]:XS1_PORT_1M",
         clk,
         False) # Don't check the bclk stops precisely as the hardware can't do that

    tester = xmostest.ComparisonTester(open('master_test.expect'),
                                       'lib_i2s', 'i2s_frame_master_sim_tests',
                                       'basic_test_%s'%testlevel, {'num_in':num_in, 'num_out':num_out},ignore=["CONFIG:.*"])

    tester.set_min_testlevel(testlevel)

    xmostest.run_on_simulator(resources['xsim'], binary,
                              simthreads = [clk, checker],
                              simargs=[],
                              # simargs=['--trace-to', 'sim.log', '--vcd-tracing', '-o ./i2s_frame_master_test/trace.vcd -tile tile[0] -ports-detailed -functions'],
                              suppress_multidrive_messages = True,
                              tester = tester)

def do_slave_test(num_in, num_out, testlevel):

    resources = xmostest.request_resource("xsim")

    binary = 'test_i2s_callback_sequence/bin/slave_{o}{i}/test_i2s_callback_sequence_slave_{o}{i}.xe'.format(i=num_in, o=num_out)

    clk = Clock("tile[0]:XS1_PORT_1A")
    
    checker = I2SSlaveChecker(
        "tile[0]:XS1_PORT_1B",
        "tile[0]:XS1_PORT_1C",
        [],
#"tile[0]:XS1_PORT_1H","tile[0]:XS1_PORT_1I","tile[0]:XS1_PORT_1J", "tile[0]:XS1_PORT_1K"],
        [],
#["tile[0]:XS1_PORT_1D","tile[0]:XS1_PORT_1E","tile[0]:XS1_PORT_1F", "tile[0]:XS1_PORT_1G"],
        "tile[0]:XS1_PORT_1L", 
        "tile[0]:XS1_PORT_16A", 
        "tile[0]:XS1_PORT_1M",
         clk,
        no_start_msg = True)

    tester = xmostest.ComparisonTester(open('sequence_check_{o}{i}.expect'.format(i=num_in, o=num_out)),
                                     'lib_i2s', 'i2s_slave_sim_tests',
                                     'sequence_check',
                                       {'ins':num_in, 'outs':num_out},
                                       ignore=['CONFIG:.*'])

    tester.set_min_testlevel(testlevel)

    xmostest.run_on_simulator(resources['xsim'], binary,
              simthreads = [clk, checker],
              #simargs=['--vcd-tracing', '-o ./test_i2s_callback_sequence/trace.vcd -tile tile[0] -ports'],
              tester = tester)

def do_rx_tx_sync(burnt_threads, cb_enabled, miso_enabled, mosi_enable, testlevel):
    resources = xmostest.request_resource("xsim")

    binary = "spi_master_sync_rx_tx/bin/{burnt}{cb}{miso}{mosi}/spi_master_sync_rx_tx_{burnt}{cb}{miso}{mosi}.xe".format(burnt=burnt_threads,cb=cb_enabled,miso=miso_enabled,mosi=mosi_enable)


    checker = SPIMasterChecker("tile[0]:XS1_PORT_1C",
                               "tile[0]:XS1_PORT_1D",
                               "tile[0]:XS1_PORT_1A",
                               ["tile[0]:XS1_PORT_1B"],
                               "tile[0]:XS1_PORT_1E",
                               "tile[0]:XS1_PORT_16B")

    tester = xmostest.ComparisonTester(open('master.expect'),
                                     'lib_spi',
                                     'spi_master_sim_tests',
                                     'spi_master_sync_rx_tx_{burnt}{cb}{miso}{mosi}'.format(burnt=burnt_threads,cb=cb_enabled,miso=miso_enabled,mosi=mosi_enable),
                                     regexp=True)

    tester.set_min_testlevel(testlevel)
    xmostest.run_on_simulator(resources['xsim'], binary,
                              simthreads = [checker],
                              simargs=[],
                              suppress_multidrive_messages = False,
                              tester = tester)

def run(arch):
    test_name = os.path.splitext(os.path.basename(__file__).replace("test_", "", 1))[0]

    resources = xmostest.request_resource("xsim")

    binary = '{}/bin/{}/{}_{}.xe'.format(test_name, arch, test_name, arch)

    tester = xmostest.ComparisonTester(open('{}.expect'.format(test_name)),
                                     'lib_xcore_c', 'xcore_c_tests',
                                     "{}_{}".format(test_name, arch), regexp=True)

    tester.set_min_testlevel("smoke")

    xmostest.run_on_simulator(resources['xsim'], binary,
                              simthreads=[],
                              tester=tester,
                              simargs=['--xscope', '-offline xscope.xmt'],
                              loopback=[{'from': 'tile[0]:XS1_PORT_1A',
                                         'to': 'tile[0]:XS1_PORT_1C'},
                                        {'from': 'tile[0]:XS1_PORT_1B',
                                         'to': 'tile[0]:XS1_PORT_1D'},
                                        {'from': 'tile[1]:XS1_PORT_1A',
                                         'to': 'tile[1]:XS1_PORT_1C'},
                                        {'from': 'tile[1]:XS1_PORT_1B',
                                         'to': 'tile[1]:XS1_PORT_1D'}])

def do_multi_device_async(burnt_threads, mosi_enable):
    resources = xmostest.request_resource("xsim")

    binary = "spi_master_async_multi_device/bin/{burnt}{mosi}/spi_master_async_multi_device_{burnt}{mosi}.xe".format(burnt=burnt_threads,mosi=mosi_enable)

    checker = SPIMasterChecker("tile[0]:XS1_PORT_1C",
                               "tile[0]:XS1_PORT_1D",
                               "tile[0]:XS1_PORT_1A",
                               ["tile[0]:XS1_PORT_1B", "tile[0]:XS1_PORT_1G"],
                               "tile[0]:XS1_PORT_1E",
                               "tile[0]:XS1_PORT_16B")

    tester = xmostest.ComparisonTester(open('master.expect'),
                                     'lib_spi',
                                     'spi_master_sim_tests',
                                     'spi_master_async_multi_device_{burnt}{mosi}'.format(burnt=burnt_threads, mosi=mosi_enable),
                                     regexp=True)

    tester.set_min_testlevel('nightly')
    xmostest.run_on_simulator(resources['xsim'], binary,
                              simthreads = [checker],
                              #simargs=['--vcd-tracing', '-o ./spi_master_async_multi_device/trace.vcd -tile tile[0] -pads -functions'],
                              simargs=[],
                              suppress_multidrive_messages = False,
                              tester = tester)

def do_master_test(speed, comb):
    resources = xmostest.request_resource("xsim")

    if comb:
        build_config = "comb_%d" % speed
        config = {'speed':speed,'impl':'comb'}
    else:
        build_config = str(speed)
        config = {'speed':speed,'impl':'noncomb'}

    binary = 'i2c_master_async_test/bin/%(config)s/i2c_master_async_test_%(config)s.xe' % {'config':build_config}

    checker = I2CMasterChecker("tile[0]:XS1_PORT_1A",
                               "tile[0]:XS1_PORT_1B",
                               tx_data = [0x99, 0x3A, 0xff],
                               expected_speed = speed,
                               ack_sequence=[True, True, False,
                                             True,
                                             True,
                                             True, True, True, False,
                                             True, False])

    tester = xmostest.ComparisonTester(open('master_test.expect'),
                                     'lib_i2c', 'i2c_master_sim_tests',
                                     'async_basic_test', config,
                                     regexp=True)

    if speed == 10:
        tester.set_min_testlevel('nightly')

    xmostest.run_on_simulator(resources['xsim'], binary,
                              simthreads = [checker],
                              simargs=['--weak-external-drive'],
                              suppress_multidrive_messages = True,
                              tester = tester)

def do_test(baud):
    myenv = {'baud': baud}
    resources = xmostest.request_resource("xsim")

    rx_checker = UARTRxChecker("tile[0]:XS1_PORT_1A", "tile[0]:XS1_PORT_1B",
                               RxParity['UART_PARITY_NONE'], baud, 1, 8)

    tx_checker = UARTTxChecker("tile[0]:XS1_PORT_1D", "tile[0]:XS1_PORT_1C",
                               TxParity['UART_PARITY_NONE'], baud, 4, 1, 8)

    tester = xmostest.ComparisonTester(open('test_loopback_uart.expect'),
                                       "lib_uart", "sim_regression", "loopback", myenv,
                                       regexp=True)

    if baud != 115200:
        tester.set_min_testlevel('nightly')

    xmostest.run_on_simulator(resources['xsim'],
                              'app_uart_test_loopback/bin/{}/app_uart_test_loopback_{}.xe'.format(baud, baud),
                              simthreads=[rx_checker, tx_checker],
                              xscope_io=True,
                              tester=tester,
                              simargs=["--vcd-tracing", "-tile tile[0] -functions -ports -o trace.vcd"],
                              clean_before_build=True,
                              build_env=myenv)

def runtest():
    resources = xmostest.request_resource("xsim")

    binary = 'i2c_master_reg_test/bin/i2c_master_reg_test.xe'

    checker = I2CMasterChecker("tile[0]:XS1_PORT_1A",
                               "tile[0]:XS1_PORT_1B",
                               tx_data = [0x99, 0x3A, 0xff, 0x05],
                               expected_speed = 400,
                               ack_sequence=[True, True, False,
                                             True, True, True, False,
                                             True, True, True, True, False,
                                             True, True,
                                             True, True, True,
                                             True, True, True, True])

    tester = xmostest.ComparisonTester(open('reg_test.expect'),
                                     'lib_i2c', 'i2c_master_sim_tests',
                                     'reg_ops_test',
                                     regexp=True)

    xmostest.run_on_simulator(resources['xsim'], binary,
                              simthreads = [checker],
                              simargs=['--weak-external-drive'],
                              suppress_multidrive_messages = True,
                              tester = tester)