Python posix.ptrace函数代码示例

 def platformContinue(self):
     sig = self.getCurrentSignal()
     if sig == None:
         sig = 0
     print 'PT_THUPDATE',v_posix.ptrace(PT_THUPDATE, self.pid, self.getMeta('StoppedThreadId'), sig)
     v_posix.ptrace(PT_CONTINUE, self.pid, 1, sig)
     self.libc.task_resume(self.task)

 def platformSetRegCtx(self, tid, ctx):
     u = self._getAmdRegsStruct(tid)
     ctx._rctx_Export(u)
     addr = ctypes.addressof(u)
     if v_posix.ptrace(PT_SETREGS, tid, addr, 0) != 0:
         raise Exception("ptrace PT_SETREGS failed!")
     if v_posix.ptrace(PT_SETDBREGS, tid, addr+amd64_DBG_OFF, 0) != 0:
         raise Exception("ptrace PT_SETDBREGS failed!")

 def platformGetRegs(self):
     buf = ctypes.create_string_buffer(TOT_REG_CNT*4)
     #FIXME thread specific
     if v_posix.ptrace(PT_GETREGS, self.pid, buf, 0) != 0:
         raise Exception("ptrace PT_GETREGS failed!")
     if v_posix.ptrace(PT_GETDBREGS, self.pid, ctypes.addressof(buf)+(GEN_REG_CNT*4), 0) != 0:
         raise Exception("ptrace PT_GETDBREGS failed!")
     return buf.raw

    def platformSetRegCtx(self, tid, ctx):
        u = user_regs_i386()
        ctx._rctx_Export(u)
        if v_posix.ptrace(PT_SETREGS, tid, 0, addressof(u)) == -1:
            raise Exception("Error: ptrace(PT_SETREGS...) failed!")

        for i in range(8):
            val = ctx.getRegister(self.dbgidx + i)
            if v_posix.ptrace(v_posix.PT_WRITE_U, tid, self.dbgoff+(4*i), val) != 0:
                raise Exception("PT_WRITE_U for debug%d failed!" % i)

 def platformExec(self, cmdline):
     # Basically just like the one in the Ptrace mixin...
     self.execing = True
     cmdlist = e_cli.splitargs(cmdline)
     os.stat(cmdlist[0])
     pid = os.fork()
     if pid == 0:
         v_posix.ptrace(PT_TRACE_ME, 0, 0, 0)
         os.execv(cmdlist[0], cmdlist)
         sys.exit(-1)
     return pid

    def platformSetRegCtx(self, tid, ctx):
        u = self.user_reg_struct()
        # Populate the reg struct with the current values (to allow for
        # any regs in that struct that we don't track... *fs_base*ahem*
        if v_posix.ptrace(PT_GETREGS, tid, 0, addressof(u)) == -1:
            raise Exception("Error: ptrace(PT_GETREGS...) failed!")

        ctx._rctx_Export(u)
        if v_posix.ptrace(PT_SETREGS, tid, 0, addressof(u)) == -1:
            raise Exception("Error: ptrace(PT_SETREGS...) failed!")

        """

 def _getAmdRegsStruct(self, tid):
     '''
     Get (and populate) a register structure
     (even set regs needs to get it first...)
     '''
     u = bsd_regs_amd64()
     addr = ctypes.addressof(u)
     if v_posix.ptrace(PT_GETREGS, tid, addr, 0) != 0:
         raise Exception("ptrace PT_GETREGS failed!")
     if v_posix.ptrace(PT_GETDBREGS, tid, addr+amd64_DBG_OFF, 0) != 0:
         raise Exception("ptrace PT_GETDBREGS failed!")
     return u

    def platformSetRegs(self, buf, tid):
        """
        Reverse of above...
        """
        x = create_string_buffer(buf[32:])
        if v_posix.ptrace(PT_SETREGS, tid, 0, addressof(x)) != 0:
            raise Exception("ERROR ptrace PT_SETREGS failed!")

        dbgs = struct.unpack("8L", buf[:32])
        off = self.usize - 32
        for i in range(8):
            v_posix.ptrace(v_posix.PT_WRITE_U, tid, off+(4*i), dbgs[i])

    def platformGetRegCtx(self, tid):
        ctx = self.archGetRegCtx()
        u = bsd_regs_amd64()

        addr = ctypes.addressof(u)
        if v_posix.ptrace(PT_GETREGS, tid, addr, 0) != 0:
            raise Exception("ptrace PT_GETREGS failed!")
        if v_posix.ptrace(PT_GETDBREGS, tid, addr+amd64_DBG_OFF, 0) != 0:
            raise Exception("ptrace PT_GETDBREGS failed!")

        ctx._rctx_Import(u)

        return ctx

    def platformGetRegCtx(self, tid):
        ctx = self.archGetRegCtx()
        u = self.user_reg_struct()
        if v_posix.ptrace(PT_GETREGS, tid, 0, addressof(u)) == -1:
            raise Exception("Error: ptrace(PT_GETREGS...) failed!")

        ctx._rctx_Import(u)

        for i in dbgregs:
            offset = self.user_dbg_offset + (self.psize * i)
            r = v_posix.ptrace(v_posix.PT_READ_U, tid, offset, 0)
            ctx.setRegister(self.dbgidx+i, r & self.reg_val_mask)

        return ctx

    def platformContinue(self):
        cmd = v_posix.PT_CONTINUE
        if self.getMode("Syscall", False):
            cmd = PT_SYSCALL
        pid = self.getPid()
        sig = self.getMeta("PendingSignal", 0)
        # Only deliver signals to the main thread
        if v_posix.ptrace(cmd, pid, 0, sig) != 0:
            raise Exception("ERROR ptrace failed for tid %d" % pid)

        for tid in self.pthreads:
            if tid == pid:
                continue
            if v_posix.ptrace(cmd, tid, 0, 0) != 0:
                pass

    def platformGetRegCtx(self, tid):
        """
        """
        ctx = self.archGetRegCtx()
        u = user_regs_i386()
        if v_posix.ptrace(PT_GETREGS, tid, 0, addressof(u)) == -1:
            raise Exception("Error: ptrace(PT_GETREGS...) failed!")

        ctx._rctx_Import(u)

        for i in range(8):
            r = v_posix.ptrace(v_posix.PT_READ_U, tid, self.dbgoff+(4*i), 0)
            ctx.setRegister(self.dbgidx+i, r & 0xffffffff)

        return ctx

 def platformGetRegCtx(self, tid):
     ctx = LinuxMixin.platformGetRegCtx( self, tid )
     for i in intel_dbgregs:
         offset = self.user_dbg_offset + (self.psize * i)
         r = v_posix.ptrace(v_posix.PT_READ_U, tid, offset, 0)
         ctx.setRegister(self.dbgidx+i, r & self.reg_val_mask)
     return ctx

 def platformAttach(self, pid):
     print 'CLASSIC',machhelper.is_pid_classic(pid)
     self.task = self.taskForPid(pid)
     self.setExceptionPort()
     if v_posix.ptrace(PT_ATTACHEXC, pid, 0, 0) != 0:
         #self.libc.perror('ptrace( PT_ATTACHEXC, %d, 0, 0) Failed' % (pid))
         raise Exception("PT_ATTACH failed!")

    def platformStepi(self):
        # This is a total rediculous hack to account
        # for the fact that the arm platform couldn't
        # be bothered to implement single stepping in
        # the stupid hardware...

        self.stepping = True

        pc = self.getProgramCounter()
        op = self.parseOpcode( pc )

        branches = op.getBranches( self )
        if not branches:
            raise Exception('''
                    The branches for the instruction %r were not decoded correctly.  This means that
                    we cant properly predict the possible next instruction executions in a way that allows us
                    to account for the STUPID INSANE FACT THAT THERE IS NO HARDWARE SINGLE STEP CAPABILITY ON
                    ARM (non-realtime or JTAG anyway).  We *would* have written invalid instructions to each
                    of those locations and cleaned them up before you ever knew anything was amiss... which is
                    how we pretend arm can single step... even though IT CANT. (please tell visi...)
            ''' % op)

        # Save the memory at the branches for later
        # restoration in the _fireStep callback.

        self._step_cleanup = []
        for bva,bflags in op.getBranches( self ):
            self._step_cleanup.append( (bva, self.readMemory( bva, 4 )) )
            self.writeMemory( bva, arm_break_le )

        tid = self.getMeta('ThreadId')

        if v_posix.ptrace(v_posix.PT_CONTINUE, tid, 0, 0) != 0:
            raise Exception("ERROR ptrace failed for tid %d" % tid)