Python parse_asm.parse_txt函数代码示例

    def test_ParseTxt(self):
        from miasm2.arch.x86.arch import mn_x86
        from miasm2.core.parse_asm import parse_txt

        ASM0 = '''
        ;
        .LFB0:
        .LA:
        .text
        .data
        .bss
        .string
        .ustring
        .byte 0 0x0
        .byte a
        .comm
        .split
        .dontsplit
        .file
        .cfi_0
        label:
            JMP EAX  ;comment
        '''
        ASM1 = '''
        .XXX
        '''
        self.assertTrue(parse_txt(mn_x86, 32, ASM0))
        self.assertRaises(ValueError, parse_txt, mn_x86, 32, ASM1)

def compute_txt(ir, mode, txt, inputstate={}, debug=False):
    blocs, symbol_pool = parse_asm.parse_txt(mn, mode, txt)
    symbol_pool.set_offset(symbol_pool.getby_name("main"), 0x0)
    patches = asmbloc.asm_resolve_final(mn, blocs[0], symbol_pool)
    interm = ir(symbol_pool)
    for bbl in blocs[0]:
        interm.add_bloc(bbl)
    return symb_exec(interm, inputstate, debug)

def compute_txt(ir, mode, txt, inputstate={}, debug=False):
    asmcfg, loc_db = parse_asm.parse_txt(mn, mode, txt)
    loc_db.set_location_offset(loc_db.get_name_location("main"), 0x0)
    patches = asmblock.asm_resolve_final(mn, asmcfg, loc_db)
    ir_arch = ir(loc_db)
    lbl = loc_db.get_name_location("main")
    ircfg = ir_arch.new_ircfg_from_asmcfg(asmcfg)
    return symb_exec(lbl, ir_arch, ircfg, inputstate, debug)

def compute_txt(ir, mode, txt, inputstate={}, debug=False):
    asmcfg, symbol_pool = parse_asm.parse_txt(mn, mode, txt)
    symbol_pool.set_offset(symbol_pool.getby_name("main"), 0x0)
    patches = asmblock.asm_resolve_final(mn, asmcfg, symbol_pool)
    interm = ir(symbol_pool)
    lbl = symbol_pool.getby_name("main")
    for bbl in asmcfg.blocks:
        interm.add_block(bbl)
    return symb_exec(lbl, interm, inputstate, debug)

    def asm(self):
        blocs, symbol_pool = parse_asm.parse_txt(mn_aarch64, "l", self.TXT, symbol_pool=self.myjit.ir_arch.symbol_pool)
        # fix shellcode addr
        symbol_pool.set_offset(symbol_pool.getby_name("main"), 0x0)
        s = StrPatchwork()
        patches = asmbloc.asm_resolve_final(mn_aarch64, blocs, symbol_pool)
        for offset, raw in patches.items():
            s[offset] = raw

        self.assembly = str(s)

    def asm(self):
        blocks, loc_db = parse_asm.parse_txt(mn_aarch64, 'l', self.TXT,
                                                  loc_db = self.myjit.ir_arch.loc_db)
        # fix shellcode addr
        loc_db.set_location_offset(loc_db.get_name_location("main"), 0x0)
        s = StrPatchwork()
        patches = asmblock.asm_resolve_final(mn_aarch64, blocks, loc_db)
        for offset, raw in patches.items():
            s[offset] = raw

        self.assembly = str(s)

def assemble_text(src_text, symbols=[], mach_name="x86_64", mach_attr=64):
    # 指定アーキテクチャのニーモニックを取得
    mnemo = Machine(mach_name).mn
    # セクションとシンボルの取得
    sections, symbol_pool = parse_asm.parse_txt(mnemo, mach_attr, src_text)
    # シンボル毎のアドレスを設定
    for name, addr in symbols:
        symbol_pool.set_offset(symbol_pool.getby_name(name), addr)
    # アセンブル
    patches = asmbloc.asm_resolve_final(mnemo, sections[0], symbol_pool)
    # アセンブル結果の構築
    patch_worker = StrPatchwork()
    for offset, raw in patches.items():
        patch_worker[offset] = raw

    return str(patch_worker)

    def test_DirectiveDontSplit(self):
        from miasm2.arch.x86.arch import mn_x86
        from miasm2.core.parse_asm import parse_txt
        from miasm2.core.asmblock import asm_resolve_final

        ASM0 = '''
        lbl0:
            INC   EAX
            JNZ   lbl0
            INC   EAX
            JZ    lbl2
        lbl1:
            NOP
            JMP   lbl0
        .dontsplit
        lbl2:
            MOV   EAX, ECX
            RET
        .dontsplit
        lbl3:
            ADD   EAX, EBX
        .dontsplit
        lbl4:
        .align 0x10
        .string "test"
        lbl5:
        .string "toto"
        '''

        asmcfg, symbol_pool = parse_txt(mn_x86, 32, ASM0)
        patches = asm_resolve_final(mn_x86,
                                    asmcfg,
                                    symbol_pool)
        lbls = []
        for i in xrange(6):
            lbls.append(symbol_pool.getby_name('lbl%d' % i))
        # align test
        offset = symbol_pool.loc_key_to_offset(lbls[5])
        assert(offset % 0x10 == 0)
        lbl2block = {}
        for block in asmcfg.blocks:
            lbl2block[block.loc_key] = block
        # dontsplit test
        assert(lbls[2] == lbl2block[lbls[1]].get_next())
        assert(lbls[3] == lbl2block[lbls[2]].get_next())
        assert(lbls[4] == lbl2block[lbls[3]].get_next())
        assert(lbls[5] == lbl2block[lbls[4]].get_next())

    def asm(self):
        mn_x86 = self.machine.mn
        blocks, symbol_pool = parse_asm.parse_txt(
            mn_x86,
            self.arch_attrib,
            self.TXT,
            symbol_pool=self.myjit.ir_arch.symbol_pool
        )

        # fix shellcode addr
        symbol_pool.set_offset(symbol_pool.getby_name("main"), 0x0)
        output = StrPatchwork()
        patches = asm_resolve_final(mn_x86, blocks, symbol_pool)
        for offset, raw in patches.items():
            output[offset] = raw

        self.assembly = str(output)

    def asm(self):
        mn_x86 = self.machine.mn
        blocks, loc_db = parse_asm.parse_txt(
            mn_x86,
            self.arch_attrib,
            self.TXT,
            loc_db=self.myjit.ir_arch.loc_db
        )

        # fix shellcode addr
        loc_db.set_location_offset(loc_db.get_name_location("main"), 0x0)
        output = StrPatchwork()
        patches = asm_resolve_final(mn_x86, blocks, loc_db)
        for offset, raw in patches.items():
            output[offset] = raw

        self.assembly = str(output)

    def test_DirectiveSplit(self):
        from miasm2.arch.x86.arch import mn_x86
        from miasm2.core.parse_asm import parse_txt

        ASM0 = '''
        lbl0:
            JNZ   lbl0
        .split
        lbl1:
            RET
        '''

        blocks, symbol_pool = parse_txt(mn_x86, 32, ASM0)
        lbls = []
        for i in xrange(2):
            lbls.append(symbol_pool.getby_name('lbl%d' % i))
        lbl2block = {}
        for block in blocks:
            lbl2block[block.label] = block
        # split test
        assert(lbl2block[lbls[1]].get_next() is None)

    data = open(args[0]).read()
    bs = bin_stream_str(data)

    mdis = dis_engine(bs)

    addr = int(options.address, 16)


    ir_arch = machine.ir(mdis.loc_db)
    ircfg = ir_arch.new_ircfg()
    symbexec = SymbolicExecutionEngine(ir_arch)

    asmcfg, loc_db = parse_asm.parse_txt(machine.mn, 32, '''
    init:
    PUSH argv
    PUSH argc
    PUSH ret_addr
    ''',
    loc_db=mdis.loc_db)


    argc_lbl = loc_db.get_name_location('argc')
    argv_lbl = loc_db.get_name_location('argv')
    ret_addr_lbl = loc_db.get_name_location('ret_addr')
    init_lbl = loc_db.get_name_location('init')

    argc_loc = ExprLoc(argc_lbl, 32)
    argv_loc = ExprLoc(argv_lbl, 32)
    ret_addr_loc = ExprLoc(ret_addr_lbl, 32)

    return reg_and_id.get(t, ExprId(t, size=32))


my_var_parser = parse_ast(my_ast_id2expr, my_ast_int2expr)
base_expr.setParseAction(my_var_parser)


st = StrPatchwork()

blocs, symbol_pool = parse_asm.parse_txt(
    mn_msp430,
    None,
    """
main:
    mov.w      0x10, R10
    mov.w      0x0, R11
loop:
    add.w      1, R11
    sub.w      1, R10
    jnz        loop
    mov.w      @SP+, PC
""",
)

# fix shellcode addr
symbol_pool.set_offset(symbol_pool.getby_name("main"), 0)

for b in blocs[0]:
    print b

resolved_b, patches = asmbloc.asm_resolve_final(mn_msp430, blocs[0], symbol_pool)
print patches

 def from_asm(self, asm_text):
     all_bloc, symbol_pool = parse_asm.parse_txt(self.mn,0, asm_text)
     self.blks = all_bloc
     raise Exception("Not correctly implemented")

    ret_addr = ExprId('ret_addr')
    reg_and_id[argc.name] = argc
    reg_and_id[argv.name] = argv
    reg_and_id[ret_addr.name] = ret_addr

    my_symbols = [argc, argv, ret_addr]
    my_symbols = dict([(x.name, x) for x in my_symbols])
    my_symbols.update(mn_x86.regs.all_regs_ids_byname)

    ir_arch = ir_x86_32(mdis.symbol_pool)

    sb = symbexec(ir_arch, symbols_init)

    blocs, symbol_pool = parse_asm.parse_txt(mn_x86, 32, '''
    PUSH argv
    PUSH argc
    PUSH ret_addr
    ''')


    b = list(blocs)[0]
    print b
    # add fake address and len to parsed instructions
    for i, l in enumerate(b.lines):
        l.offset, l.l = i, 1
    ir_arch.add_bloc(b)
    irb = get_bloc(ir_arch, mdis, 0)
    sb.emulbloc(irb)
    sb.dump_mem()

    # reset ir_arch blocs