本文整理汇总了Golang中github.com/tsavola/wag/internal/gen.RegCoder.TrapTrampolineAddr方法的典型用法代码示例。如果您正苦于以下问题：Golang RegCoder.TrapTrampolineAddr方法的具体用法？Golang RegCoder.TrapTrampolineAddr怎么用？Golang RegCoder.TrapTrampolineAddr使用的例子？那么恭喜您, 这里精选的方法代码示例或许可以为您提供帮助。您也可以进一步了解该方法所在类github.com/tsavola/wag/internal/gen.RegCoder的用法示例。
在下文中一共展示了RegCoder.TrapTrampolineAddr方法的1个代码示例，这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞，您的评价将有助于系统推荐出更棒的Golang代码示例。
示例1: StoreOp
//.........这里部分代码省略.........
}
if reachAddr < uint64(code.MinMemorySize()) || alreadyChecked {
baseReg = regMemoryBase
indexReg = NoIndex
disp = int32(addr)
return
}
Lea.opFromIndirect(code, types.I64, regScratch, 0, NoIndex, regMemoryBase, int32(reachAddr))
default:
reg, zeroExt, own := mach.opBorrowMaybeScratchReg(code, index, true)
if !zeroExt {
Mov.opFromReg(code, types.I32, reg, reg) // zero-extend index
}
if alreadyChecked {
baseReg = regMemoryBase
indexReg = reg
ownIndexReg = own
disp = int32(offset)
return
}
Lea.opFromIndirect(code, types.I64, regScratch, 0, reg, regMemoryBase, int32(reachOffset))
if own {
code.FreeReg(types.I32, reg)
}
}
Cmp.opFromReg(code, types.I64, regScratch, regMemoryLimit)
if addr := code.TrapTrampolineAddr(traps.MemoryOutOfBounds); addr != 0 {
Jge.op(code, addr)
} else {
var checked links.L
Jl.rel8.opStub(code)
checked.AddSite(code.Len())
code.OpTrapCall(traps.MemoryOutOfBounds)
checked.Addr = code.Len()
mach.updateBranches8(code, &checked)
}
baseReg = regScratch
indexReg = NoIndex
disp = -int32(sizeReach)
return
}
func (mach X86) OpCurrentMemory(code gen.RegCoder) values.Operand {
Mov.opFromReg(code, types.I64, regResult, regMemoryLimit)
Sub.opFromReg(code, types.I64, regResult, regMemoryBase)
ShrImm.op(code, types.I64, regResult, wasm.PageBits)
return values.TempRegOperand(types.I32, regResult, true)
}
func (mach X86) OpGrowMemory(code gen.RegCoder, x values.Operand) values.Operand {
var out links.L
var fail links.L
MovMMX.opToReg(code, types.I64, regScratch, regMemoryGrowLimitMMX)
targetReg, zeroExt := mach.opMaybeResultReg(code, x, false)
if !zeroExt {
Mov.opFromReg(code, types.I32, targetReg, targetReg)
}
ShlImm.op(code, types.I64, targetReg, wasm.PageBits)
Add.opFromReg(code, types.I64, targetReg, regMemoryLimit) // new memory limit
Cmp.opFromReg(code, types.I64, targetReg, regScratch)
Jg.rel8.opStub(code)
fail.AddSite(code.Len())
Mov.opFromReg(code, types.I64, regScratch, regMemoryLimit)
Mov.opFromReg(code, types.I64, regMemoryLimit, targetReg)
Sub.opFromReg(code, types.I64, regScratch, regMemoryBase)
ShrImm.op(code, types.I64, regScratch, wasm.PageBits) // value on success
Mov.opFromReg(code, types.I32, targetReg, regScratch)
JmpRel.rel8.opStub(code)
out.AddSite(code.Len())
fail.Addr = code.Len()
mach.updateBranches8(code, &fail)
MovImm.opImm(code, types.I32, targetReg, -1) // value on failure
out.Addr = code.Len()
mach.updateBranches8(code, &out)
return values.TempRegOperand(types.I32, targetReg, true)
}