C# INSTRUCTION类代码示例

 //Checks opcode-extension prefixes (repz, repnz, opsize) are superfluous.
 static void check_ext_sf_prefixes(byte[] prefixes, ref INSTRUCTION instr, ref DISASM_INOUT_PARAMS param)
 {
     if (prefixes[PREF_OPSIZE_INDEX] != 0xFF)
     add_sf_prefix(prefixes, PREF_OPSIZE_INDEX, ref instr, ref param);
     if (prefixes[PREF_REP_INDEX] != 0xFF)
     add_sf_prefix(prefixes, PREF_OPSIZE_INDEX, ref instr, ref param);
 }

 static UInt32 post_proc_multinop(ulong origin_offset, ulong offset, ref INSTRUCTION instr, INTERNAL_DATA idata, DISMODE mode)
 {
     instr.ops[0].flags &= (byte)~OPERAND_FLAG_PRESENT;
     instr.ops[1].flags &= (byte)~OPERAND_FLAG_PRESENT;
     instr.ops[2].flags &= (byte)~OPERAND_FLAG_PRESENT;
     return 0;
 }

 static UInt32 tq_1(ulong origin_offset, ulong offset, ref INSTRUCTION instr, int op_index, OPERAND_SIZE opsize, INTERNAL_DATA idata, DISMODE mode)
 {
     instr.ops[op_index].flags |= (byte)OP_TYPE.OPERAND_TYPE_IMM;
     instr.ops[op_index].size = (ushort)OP_SIZE.OPERAND_SIZE_8;
     instr.ops[op_index].value.imm.imm8 = 0x1;
     return 0x0;
 }

        //Main function for parsing prefixes. Reads input stream until meets non-prefix byte
        // or maximum instruction length is exceeded. The function checks if a prefix of the same group
        // was already met and if so, replaces old prefix with a new one.
        // Old prefix is added to superfluous prefixes array.
        // The function also checks if a prefix is opcode-extension.
        static UInt32 parse_prefixes(ulong offset, ref INSTRUCTION instr, INTERNAL_DATA idata, byte ext_table_index, byte ext_pref_index, ref DISASM_INOUT_PARAMS param)
        {
            byte pref_code;
            byte rex_found;
            byte pref_id;
            byte pref_index;
            UInt32 res;
            UInt32 tmp;
            OPCODE_DESCRIPTOR ptr;

            res = 0;
            rex_found = 0;

            while(true)
            {

            //pref_code = *offset;
            pref_code = assembly.ReadBytes(offset, 1)[0];

            if (res > Dasmer.MAX_INSTRUCTION_LEN)
            {
            idata.severe_err = ERRS.ERR_TOO_LONG;//error: instruction too long.
            break;
            }

            ptr = tables[IDX_1BYTE].opcodes[pref_code];
            if ( !( ((ptr.groups & GRP_PREFIX)!=0) ||
                (param.mode == DISMODE.DISASSEMBLE_MODE_64 && (pref_code >= 0x40) && (pref_code <= 0x4F) && (rex_found == 0))))
            {
            break;
            }
            else
            {
            if (rex_found!=0)
            {
                idata.severe_err = ERRS.ERR_REX_NOOPCD;//error: an opcode should follow after rex.
                break;
            }

            if ((rex_found != 0) && (param.mode == DISMODE.DISASSEMBLE_MODE_64))
            {
                if ( (pref_code >= 0x40) && (pref_code <= 0x4F) )
                {
                    idata.prefixes[PREF_REX_INDEX] = PREF_REX_ID;
                    instr.rex = pref_code;
                    rex_found = 1;

                    res++;
                    offset++;
                    continue;
                }
            }

            tmp = tq_handlers[ptr.ops[0].type](0, 0, ref instr, 0, new OPERAND_SIZE(), new INTERNAL_DATA(), param.mode);
            pref_index = (byte)(tmp >> 8);
            pref_id = (byte)tmp;// &0xFF;
            if (idata.prefixes[pref_index] != 0xFF)
            {
                add_sf_prefix(idata.prefixes, pref_index, ref instr, ref param);
            }
            idata.prefixes[pref_index] = pref_id;

            //Used later for prefix table switch.
            if (ptr.id == ID_66 || ptr.id == ID_REPZ || ptr.id == ID_REPNZ)
            {
                ext_table_index =(byte)(ptr.props);
                ext_pref_index = pref_index;
            }

            res++;
            offset++;
            }
            }

            return res;
        }

        /*************************
        * Postprocessing routines.
        **************************
        */
        static UInt32 post_proc_arpl_movsxd(ulong origin_offset, ulong offset, ref INSTRUCTION instr, INTERNAL_DATA idata, DISMODE mode)
        {
            UInt32 res;
            res = 0;
            if (mode == DISMODE.DISASSEMBLE_MODE_64)
            {
            OPERAND_SIZE opsize = new OPERAND_SIZE();

            instr.id = ID_MOVSXD;
            instr.groups = GRP_GEN | GRP_CONVER;
            instr.tested_flags = 0;
            instr.modified_flags = 0;
            instr.set_flags = 0;
            instr.cleared_flags = 0;
            instr.flags &= (ushort)(INSTR_FLAG_MODRM | INSTR_FLAG_SIB);

            instr.mnemonic = "movsxd";
            byte[] bt = assembly.ReadBytes((ulong)instr.opcode_offset + 1, 4);
            res = (UInt32)(
              bt[0] +
              bt[1]*256 +
              bt[2]*256*256 +
              bt[3]*256*256*256);
            offset += res;

            if ((instr.flags & INSTR_FLAG_MODRM)!=0)
            {
            res++;
            offset++;
            }
            if ((instr.flags & INSTR_FLAG_SIB)!=0)
            {
            res++;
            offset++;
            }
            instr.ops[0].value.imm.imm64 = 0;
            instr.ops[1].value.imm.imm64 = 0;
            instr.ops[0].flags = OPERAND_FLAG_PRESENT;
            instr.ops[1].flags = OPERAND_FLAG_PRESENT;

            sq_dqp(ref opsize, ref instr, idata, mode);
            res += tq_G(origin_offset, offset, ref instr, 0, opsize, idata, mode);
            sq_d(ref opsize, ref instr, idata, mode);
            res += tq_E(origin_offset, offset, ref instr, 1, opsize, idata, mode);
            }

            return res;
        }

 //Parses instruction's mnemonic. If mnemonic is simple, it is just copied to
 // struct INSTRUCTION. If mnemonic contains has multi mnemonic indicator (MM_INDICATOR)
 // at first character then it depends on implicit operand's size. In this case the function
 // calls get_instruction_opsize and builds choses mnemonic basing on result.
 static void parse_mnemonic(OPCODE_DESCRIPTOR opcode, INSTRUCTION instr, INTERNAL_DATA idata, DISMODE mode)
 {
     if ((opcode.mnemonic.value.Length>0) && (opcode.mnemonic.value[0] != MM_INDICATOR))
     {
     instr.mnemonic = opcode.mnemonic.value;
     }
     else
     {
     get_instruction_opsize(opcode.mnemonic, instr, idata, mode);
     instr.mnemonic = opcode.mnemonic.values[bsr(instr.opsize) - 1];
     }
 }

        //Main function for parsing opcode and prefixes. First of all it parses all prefixes and then
        // looks up for struct OPCODE_DESCRIPTOR. The following algorithm is used to handle instructions that
        // use prefixes as opcode extension:
        //
        // * Have we prefix that may be opcode extension?
        //   No: Lookup starts from 1byte table.
        //       * Is instruction found?
        //         No: Error.
        //         Yes: Success.
        //   Yes: Lookup starts from 'ext_table_index' table.
        //        * Is instruction found?
        //          No: Lookup starts from 1byte table.
        //              * Is instruction found?
        //                No: Error.
        //                Yes: Success.
        //          Yes: Success.
        static UInt32 parse_opcode(ulong offset, ref OPCODE_DESCRIPTOR opcode_descr, ref INSTRUCTION instr, INTERNAL_DATA idata, ref DISASM_INOUT_PARAMS param)
        {
            byte ext_table_index  = 0xFF;
            byte ext_prefix_index = 0;
            UInt32 res;
            UInt32 tmp;

            res = parse_prefixes(offset, ref instr, idata, ext_table_index, ext_prefix_index, ref param);
            if (idata.severe_err==0)
            {
            instr.opcode_offset = (byte)res;
            offset += res;

            if ((ext_table_index != 0xFF) && (offset == 0xF))
            {
            tmp = lookup_opcode(offset, ext_table_index, ref opcode_descr, idata);
            if ((idata.severe_err==0) && (opcode_descr.id != ID_NULL))
            {
                idata.prefixes[ext_prefix_index] = 0xFF;
                check_ext_sf_prefixes(idata.prefixes, ref instr, ref param);
                res += tmp;
            }
            else
            {
                idata.severe_err = 0;
                res += lookup_opcode(offset, IDX_1BYTE, ref opcode_descr, idata);
            }
            }
            else
            {
            res += lookup_opcode(offset, IDX_1BYTE, ref opcode_descr, idata);
            }

            if ((idata.severe_err==0) && (opcode_descr.id == ID_NULL))
            {
            idata.severe_err = ERRS.ERR_BADCODE;//error: invalid opcode.
            }
            }
            return res;
        }

 //Creates OPERAND_TYPE_REG operand of given type.
 static void create_reg_operand(ref INSTRUCTION instr, int op_index, REG_TYPE type, byte code, OP_SIZE size)
 {
     instr.ops[op_index].flags |= (byte)OP_TYPE.OPERAND_TYPE_REG;
     instr.ops[op_index].value.reg.type = type;
     instr.ops[op_index].value.reg.code = code;
     instr.ops[op_index].size = (ushort)size;
 }

 static void create_xmmreg_operand(ref INSTRUCTION instr, int op_index, byte code, OP_SIZE size, byte rex, ref INTERNAL_DATA idata, DISMODE mode)
 {
     if ((mode == DISMODE.DISASSEMBLE_MODE_64) && (idata.prefixes[PREF_REX_INDEX] != 0xFF))
     {
     if ((instr.rex & rex)!=0)
     {
     code |= REG_CODE_64;
     idata.is_rex_used = 1;
     }
     }
     create_reg_operand(ref instr, op_index, REG_TYPE.REG_TYPE_XMM, code, size);
 }

 //Copies instruction's flags from struct OPCODE_DESCRIPTOR to struct INSTRUCTION.
 static void copy_instr_flags(ref INSTRUCTION instr, ref  OPCODE_DESCRIPTOR opcode)
 {
     if ((opcode.props & PROP_IOPL)!=0)
     instr.flags |= INSTR_FLAG_IOPL;
     if ((opcode.props & PROP_RING0)!=0)
     instr.flags |= INSTR_FLAG_RING0;
     if ((opcode.props & PROP_SERIAL)!=0)
     instr.flags |= INSTR_FLAG_SERIAL;
     if ((opcode.props & PROP_UNDOC) != 0)
     instr.flags |= INSTR_FLAG_UNDOC;
 }

 static void create_genreg_operand(ref INSTRUCTION instr, int op_index, byte code, OP_SIZE size, byte rex, ref INTERNAL_DATA idata, DISMODE mode)
 {
     if (mode == DISMODE.DISASSEMBLE_MODE_64 && idata.prefixes[PREF_REX_INDEX] != 0xFF)
     {
     if (code > REG_CODE_BX && size == OP_SIZE.OPERAND_SIZE_8)
     {
     code |= REG_CODE_64;
     code += 0x4;
     idata.is_rex_used = 1;
     }
     if ((instr.rex & rex)!=0)
     {
     code |= REG_CODE_64;
     idata.is_rex_used = 1;
     }
     }
     create_reg_operand(ref instr, op_index, REG_TYPE.REG_TYPE_GEN, code, size);
 }

 static void copy_eflags(ref INSTRUCTION instr, ref OPCODE_DESCRIPTOR opcode)
 {
     instr.tested_flags = opcode.tested_flags;
     instr.modified_flags = opcode.modified_flags;
     instr.set_flags = opcode.set_flags;
     instr.cleared_flags = opcode.cleared_flags;
     instr.undefined_flags = opcode.undefined_flags;
 }

 //Converts prefixes from internal to external representation.
 static void convert_prefixes(INSTRUCTION instr, byte[] prefixes)
 {
     for (int i = 0; i < PREFIX_COUNT; i++)
     {
     if (prefixes[i] != 0xFF)
     instr.prefixes |= pref_bits[prefixes[i]];
     }
 }

        //Checks if segment override prefix is superfluous.
        static void check_seg_sf_prefixes(INSTRUCTION instr, byte[] prefixes, DISASM_INOUT_PARAMS param)
        {
            uint i;
            bool mem_op_found = false;

            if (prefixes[PREF_SEG_INDEX] != 0xFF)
            {
            for (i = 0; i < 3; i++)
            {
            if ((instr.ops[i].flags & (byte)OP_TYPE.OPERAND_TYPE_MEM)!=0)
            {
                if (param.mode == DISMODE.DISASSEMBLE_MODE_64)
                {
                    if ( !((prefixes[PREF_SEG_INDEX] == PREF_FS_ID) || (prefixes[PREF_SEG_INDEX] == PREF_GS_ID)) )
                    {
                        add_sf_prefix(prefixes, PREF_SEG_INDEX, ref instr, ref param);
                    }
                }
                else
                {
                    if ( (instr.ops[i].value.addr.mod & ADDR_MOD_BASE)==0 )
                    {
                        if (instr.ops[i].value.addr.seg == SREG_CODE_DS)
                            add_sf_prefix(prefixes, PREF_SEG_INDEX, ref instr, ref param);
                    }
                    else
                    {
                        if ((instr.ops[i].value.addr.bas == REG_CODE_BP) || (instr.ops[i].value.addr.bas == REG_CODE_SP))
                        {
                            if (instr.ops[i].value.addr.seg == SREG_CODE_SS)
                                add_sf_prefix(prefixes, PREF_SEG_INDEX, ref instr, ref param);
                        }
                        else
                        {
                            if (instr.ops[i].value.addr.seg == SREG_CODE_DS)
                                add_sf_prefix(prefixes, PREF_SEG_INDEX, ref instr, ref param);
                        }
                    }
                }

                mem_op_found = true;
            }
            }

            if (!mem_op_found)
            add_sf_prefix(prefixes, PREF_SEG_INDEX, ref instr, ref param);
            }
        }

        //Parses 16bit memory address operand.
        static UInt32 parse_mem_operand_16(ulong origin_offset, ulong offset, ref INSTRUCTION instr, int op_index, DISMODE mode)
        {
            byte len;
            int index;

            instr.ops[op_index].value.addr.mod = (byte)(instr.modrm >> 0x6);
            len = get_disp(origin_offset, offset, ref instr, op_index, mode);
            index = (instr.modrm >> 0x3 & 0x18) | (instr.modrm & 0x7);
            instr.ops[op_index].value.addr.seg = addrs_16bit[index].seg;
            instr.ops[op_index].value.addr.mod = addrs_16bit[index].mod;
            instr.ops[op_index].value.addr.bas = addrs_16bit[index].bas;
            instr.ops[op_index].value.addr.index = addrs_16bit[index].index;
            instr.ops[op_index].value.addr.scale = addrs_16bit[index].scale;

            return len;
        }