本文整理汇总了C++中tr::Register::containsCollectedReference方法的典型用法代码示例。如果您正苦于以下问题:C++ Register::containsCollectedReference方法的具体用法?C++ Register::containsCollectedReference怎么用?C++ Register::containsCollectedReference使用的例子?那么恭喜您, 这里精选的方法代码示例或许可以为您提供帮助。您也可以进一步了解该方法所在类tr::Register
的用法示例。
在下文中一共展示了Register::containsCollectedReference方法的3个代码示例,这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞,您的评价将有助于系统推荐出更棒的C++代码示例。
示例1: stackMemoryRegion
int32_t TR::ARM64SystemLinkage::buildArgs(TR::Node *callNode,
TR::RegisterDependencyConditions *dependencies)
{
const TR::ARM64LinkageProperties &properties = getProperties();
TR::ARM64MemoryArgument *pushToMemory = NULL;
TR::Register *argMemReg;
TR::Register *tempReg;
int32_t argIndex = 0;
int32_t numMemArgs = 0;
int32_t argSize = 0;
int32_t numIntegerArgs = 0;
int32_t numFloatArgs = 0;
int32_t totalSize;
int32_t i;
TR::Node *child;
TR::DataType childType;
TR::DataType resType = callNode->getType();
uint32_t firstArgumentChild = callNode->getFirstArgumentIndex();
/* Step 1 - figure out how many arguments are going to be spilled to memory i.e. not in registers */
for (i = firstArgumentChild; i < callNode->getNumChildren(); i++)
{
child = callNode->getChild(i);
childType = child->getDataType();
switch (childType)
{
case TR::Int8:
case TR::Int16:
case TR::Int32:
case TR::Int64:
case TR::Address:
if (numIntegerArgs >= properties.getNumIntArgRegs())
numMemArgs++;
numIntegerArgs++;
break;
case TR::Float:
case TR::Double:
if (numFloatArgs >= properties.getNumFloatArgRegs())
numMemArgs++;
numFloatArgs++;
break;
default:
TR_ASSERT(false, "Argument type %s is not supported\n", childType.toString());
}
}
// From here, down, any new stack allocations will expire / die when the function returns
TR::StackMemoryRegion stackMemoryRegion(*trMemory());
/* End result of Step 1 - determined number of memory arguments! */
if (numMemArgs > 0)
{
pushToMemory = new (trStackMemory()) TR::ARM64MemoryArgument[numMemArgs];
argMemReg = cg()->allocateRegister();
}
totalSize = numMemArgs * 8;
// align to 16-byte boundary
totalSize = (totalSize + 15) & (~15);
numIntegerArgs = 0;
numFloatArgs = 0;
for (i = firstArgumentChild; i < callNode->getNumChildren(); i++)
{
TR::MemoryReference *mref = NULL;
TR::Register *argRegister;
TR::InstOpCode::Mnemonic op;
child = callNode->getChild(i);
childType = child->getDataType();
switch (childType)
{
case TR::Int8:
case TR::Int16:
case TR::Int32:
case TR::Int64:
case TR::Address:
if (childType == TR::Address)
argRegister = pushAddressArg(child);
else if (childType == TR::Int64)
argRegister = pushLongArg(child);
else
argRegister = pushIntegerWordArg(child);
if (numIntegerArgs < properties.getNumIntArgRegs())
{
if (!cg()->canClobberNodesRegister(child, 0))
{
if (argRegister->containsCollectedReference())
tempReg = cg()->allocateCollectedReferenceRegister();
else
tempReg = cg()->allocateRegister();
//.........这里部分代码省略.........
示例2: if
// Build arguments for system linkage dispatch.
//
int32_t TR::AMD64SystemLinkage::buildArgs(
TR::Node *callNode,
TR::RegisterDependencyConditions *deps)
{
TR::SymbolReference *methodSymRef = callNode->getSymbolReference();
TR::MethodSymbol *methodSymbol = methodSymRef->getSymbol()->castToMethodSymbol();
TR::RealRegister::RegNum noReg = TR::RealRegister::NoReg;
TR::RealRegister *espReal = machine()->getX86RealRegister(TR::RealRegister::esp);
int32_t firstNodeArgument = callNode->getFirstArgumentIndex();
int32_t lastNodeArgument = callNode->getNumChildren() - 1;
int32_t offset = 0;
int32_t sizeOfOutGoingArgs= 0;
uint16_t numIntArgs = 0,
numFloatArgs = 0;
int32_t first, last, direction;
int32_t numCopiedRegs = 0;
TR::Register *copiedRegs[TR::X86LinkageProperties::MaxArgumentRegisters];
if (getProperties().passArgsRightToLeft())
{
first = lastNodeArgument;
last = firstNodeArgument - 1;
direction = -1;
}
else
{
first = firstNodeArgument;
last = lastNodeArgument + 1;
direction = 1;
}
// If the dispatch is indirect we must add the VFT register to the preconditions
// so that it gets register assigned with the other preconditions to the call.
//
if (callNode->getOpCode().isIndirect())
{
TR::Node *vftChild = callNode->getFirstChild();
TR_ASSERT(vftChild->getRegister(), "expecting VFT child to be evaluated");
TR::RealRegister::RegNum scratchRegIndex = getProperties().getIntegerScratchRegister(1);
deps->addPreCondition(vftChild->getRegister(), scratchRegIndex, cg());
}
int32_t i;
for (i = first; i != last; i += direction)
{
TR::parmLayoutResult layoutResult;
TR::RealRegister::RegNum rregIndex = noReg;
TR::Node *child = callNode->getChild(i);
layoutParm(child, sizeOfOutGoingArgs, numIntArgs, numFloatArgs, layoutResult);
if (layoutResult.abstract & TR::parmLayoutResult::IN_LINKAGE_REG_PAIR)
{
// TODO: AMD64 SysV ABI might put a struct into a pair of linkage registerr
TR_ASSERT(false, "haven't support linkage_reg_pair yet.\n");
}
else if (layoutResult.abstract & TR::parmLayoutResult::IN_LINKAGE_REG)
{
TR_RegisterKinds regKind = layoutResult.regs[0].regKind;
uint32_t regIndex = layoutResult.regs[0].regIndex;
TR_ASSERT(regKind == TR_GPR || regKind == TR_FPR, "linkage registers includes TR_GPR and TR_FPR\n");
rregIndex = (regKind == TR_FPR) ? getProperties().getFloatArgumentRegister(regIndex): getProperties().getIntegerArgumentRegister(regIndex);
}
else
{
offset = layoutResult.offset;
}
TR::Register *vreg;
vreg = cg()->evaluate(child);
bool needsStackOffsetUpdate = false;
if (rregIndex != noReg)
{
// For NULL JNI reference parameters, it is possible that the NULL value will be evaluated into
// a different register than the child. In that case it is not necessary to copy the temporary scratch
// register across the call.
//
if ((child->getReferenceCount() > 1) &&
(vreg == child->getRegister()))
{
TR::Register *argReg = cg()->allocateRegister();
if (vreg->containsCollectedReference())
argReg->setContainsCollectedReference();
generateRegRegInstruction(TR::Linkage::movOpcodes(RegReg, movType(child->getDataType())), child, argReg, vreg, cg());
vreg = argReg;
copiedRegs[numCopiedRegs++] = vreg;
}
deps->addPreCondition(vreg, rregIndex, cg());
}
else
{
// Ideally, we would like to push rather than move
generateMemRegInstruction(TR::Linkage::movOpcodes(MemReg, fullRegisterMovType(vreg)),
child,
generateX86MemoryReference(espReal, offset, cg()),
vreg,
//.........这里部分代码省略.........
示例3: if
//.........这里部分代码省略.........
continue;
}
else if (reg->getAssociation() == regNum)
continue;
if (regList.find(reg) || (highReg && regList.find(highReg)))
{
TR::InstOpCode::Mnemonic opCode;
TR_RegisterKinds kind = reg->getKind();
switch (kind)
{
case TR_GPR:
opCode = TR::InstOpCode::mr;
break;
case TR_FPR:
opCode = TR::InstOpCode::fmr;
break;
case TR_VRF:
opCode = TR::InstOpCode::vor;
//TR_ASSERT(0, "VMX not fully supported.");
break;
case TR_VSX_VECTOR:
opCode = TR::InstOpCode::xxlor;
break;
case TR_CCR:
opCode = TR::InstOpCode::mcrf;
break;
default:
TR_ASSERT(0, "Invalid register kind.");
}
if (regList.find(reg))
{
bool containsInternalPointer = false;
if (reg->getPinningArrayPointer())
containsInternalPointer = true;
copyReg = (reg->containsCollectedReference() && !containsInternalPointer) ?
cg->allocateCollectedReferenceRegister() : cg->allocateRegister(kind);
if (containsInternalPointer)
{
copyReg->setContainsInternalPointer();
copyReg->setPinningArrayPointer(reg->getPinningArrayPointer());
}
if (opCode == TR::InstOpCode::vor || opCode == TR::InstOpCode::xxlor)
iCursor = generateTrg1Src2Instruction(cg, opCode, node, copyReg, reg, reg, iCursor);
else
iCursor = generateTrg1Src1Instruction(cg, opCode, node, copyReg, reg, iCursor);
reg = copyReg;
}
if (highReg && regList.find(highReg))
{
bool containsInternalPointer = false;
if (highReg->getPinningArrayPointer())
containsInternalPointer = true;
highCopyReg = (highReg->containsCollectedReference() && !containsInternalPointer) ?
cg->allocateCollectedReferenceRegister() : cg->allocateRegister(kind);
if (containsInternalPointer)
{
highCopyReg->setContainsInternalPointer();
highCopyReg->setPinningArrayPointer(highReg->getPinningArrayPointer());
}
if (opCode == TR::InstOpCode::vor || opCode == TR::InstOpCode::xxlor)
iCursor = generateTrg1Src2Instruction(cg, opCode, node, highCopyReg, highReg, highReg, iCursor);
else
iCursor = generateTrg1Src1Instruction(cg, opCode, node, highCopyReg, highReg, iCursor);
highReg = highCopyReg;
}
}
addPreCondition(reg, regNum);
addPostCondition(reg, regNum);
if (copyReg != NULL)
cg->stopUsingRegister(copyReg);
else
regList.add(reg);
if (highReg)
{
addPreCondition(highReg, highRegNum);
addPostCondition(highReg, highRegNum);
if (highCopyReg != NULL)
cg->stopUsingRegister(highCopyReg);
else
regList.add(highReg);
}
}
if (iCursor!=NULL && cursorPtr!=NULL)
*cursorPtr = iCursor;
}