C++ const_instr_iterator::isInsideBundle方法代码示例

void EpiphanyAsmPrinter::EmitInstruction(const MachineInstr *MI) {
  // Do any auto-generated pseudo lowerings.
  if (emitPseudoExpansionLowering(*OutStreamer, MI))
    return;

  switch (MI->getOpcode()) {
  case Epiphany::DBG_VALUE: {
    if (isVerbose() && OutStreamer->hasRawTextSupport()) {
      SmallString<128> TmpStr;
      raw_svector_ostream OS(TmpStr);
      PrintDebugValueComment(MI, OS);
      OutStreamer->EmitRawText(StringRef(OS.str()));
    }
    return;
    }
  case Epiphany::MOVT32ri: {
    EmitToStreamer(*OutStreamer, MCInstBuilder(Epiphany::MOVT32ri)
      .addReg(MI->getOperand(0).getReg())
      .addReg(MI->getOperand(0).getReg())
      .addImm(MI->getOperand(1).getImm()));
    return;
    }
  }

  // Generic way
  MachineBasicBlock::const_instr_iterator I = MI;
  MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();
  do {
    MCInst TmpInst;
    MCInstLowering.Lower(I, TmpInst);
    EmitToStreamer(*OutStreamer, TmpInst);
  } while ((++I != E) && I->isInsideBundle());
}

unsigned int PatmosInstrInfo::getInstrSize(const MachineInstr *MI) const {
  if (MI->isInlineAsm()) {
    // TODO is there a way to get the current context?
    MCContext Ctx(PTM.getMCAsmInfo(),
                  PTM.getRegisterInfo(), PTM.getInstrInfo(), 0);

    // PIA is deleted by AsmPrinter
    PatmosInstrAnalyzer *PIA = createPatmosInstrAnalyzer(Ctx);

    PatmosAsmPrinter PAP(PTM, *PIA);
    PAP.EmitInlineAsm(MI);

    return PIA->getSize();
  }
  else if (MI->isBundle()) {
    const MachineBasicBlock *MBB = MI->getParent();
    MachineBasicBlock::const_instr_iterator I = MI, E = MBB->instr_end();
    unsigned Size = 0;
    while ((++I != E) && I->isInsideBundle()) {
      Size += getInstrSize(I);
    }
    return Size;
  }
  else if (MI->isPseudo()) {
    return 0;
  }
  else {
    // trust the desc..
    return MI->getDesc().getSize();
  }
}

/// printMachineInstruction -- Print out a single Hexagon MI in Darwin syntax to
/// the current output stream.
///
void HexagonAsmPrinter::EmitInstruction(const MachineInstr *MI) {
  MCInst MCB = HexagonMCInstrInfo::createBundle();
  const MCInstrInfo &MCII = *Subtarget->getInstrInfo();

  if (MI->isBundle()) {
    const MachineBasicBlock* MBB = MI->getParent();
    MachineBasicBlock::const_instr_iterator MII = MI->getIterator();
    unsigned IgnoreCount = 0;

    for (++MII; MII != MBB->instr_end() && MII->isInsideBundle(); ++MII)
      if (MII->getOpcode() == TargetOpcode::DBG_VALUE ||
          MII->getOpcode() == TargetOpcode::IMPLICIT_DEF)
        ++IgnoreCount;
      else
        HexagonLowerToMC(MCII, &*MII, MCB, *this);
  }
  else
    HexagonLowerToMC(MCII, MI, MCB, *this);

  bool Ok = HexagonMCInstrInfo::canonicalizePacket(
      MCII, *Subtarget, OutStreamer->getContext(), MCB, nullptr);
  assert(Ok);
  (void)Ok;
  if(HexagonMCInstrInfo::bundleSize(MCB) == 0)
    return;
  OutStreamer->EmitInstruction(MCB, getSubtargetInfo());
}

PatmosII::MemType PatmosInstrInfo::getMemType(const MachineInstr *MI) const {
  assert(MI->mayLoad() || MI->mayStore());

  if (MI->isBundle()) {
    // find mem instruction in bundle (does not need to be the first
    // instruction, they might be sorted later!)
    MachineBasicBlock::const_instr_iterator II = MI; ++II;
    while (II->isInsideBundle() && !II->mayLoad() && !II->mayStore()) {
      ++II;
    }
    return getMemType(II);
  }

  // FIXME: Maybe there is a better way to get this info directly from
  //        the instruction definitions in the .td files
  using namespace Patmos;
  unsigned opc = MI->getOpcode();
  switch (opc) {
    case LWS: case LHS: case LBS: case LHUS: case LBUS:
    case SWS: case SHS: case SBS:
      return PatmosII::MEM_S;
    case LWL: case LHL: case LBL: case LHUL: case LBUL:
    case SWL: case SHL: case SBL:
      return PatmosII::MEM_L;
    case  LWC: case  LHC: case  LBC: case  LHUC: case  LBUC:
    case  SWC: case  SHC: case  SBC:
      return PatmosII::MEM_C;
    case  LWM: case  LHM: case  LBM: case  LHUM: case  LBUM:
    case  SWM: case  SHM: case  SBM:
      return PatmosII::MEM_M;
    default: llvm_unreachable("Unexpected memory access instruction!");
  }

}

void AMDGPUAsmPrinter::EmitInstruction(const MachineInstr *MI) {
  AMDGPUMCInstLower MCInstLowering;

  // Ignore placeholder instructions:
  if (MI->getOpcode() == AMDGPU::MASK_WRITE) {
    return;
  }

  if (MI->isBundle()) {
    const MachineBasicBlock *MBB = MI->getParent();
    MachineBasicBlock::const_instr_iterator I = MI;
    ++I;
    while (I != MBB->end() && I->isInsideBundle()) {
      MCInst MCBundleInst;
      const MachineInstr *BundledInst = I;
      MCInstLowering.lower(BundledInst, MCBundleInst);
      OutStreamer.EmitInstruction(MCBundleInst);
      ++I;
    }
  } else {
    MCInst TmpInst;
    MCInstLowering.lower(MI, TmpInst);
    OutStreamer.EmitInstruction(TmpInst);
  }
}

void AMDGPUAsmPrinter::EmitInstruction(const MachineInstr *MI) {
  const AMDGPUSubtarget &STI = MF->getSubtarget<AMDGPUSubtarget>();
  AMDGPUMCInstLower MCInstLowering(OutContext, STI);

#ifdef _DEBUG
  StringRef Err;
  if (!STI.getInstrInfo()->verifyInstruction(MI, Err)) {
    errs() << "Warning: Illegal instruction detected: " << Err << "\n";
    MI->dump();
  }
#endif
  if (MI->isBundle()) {
    const MachineBasicBlock *MBB = MI->getParent();
    MachineBasicBlock::const_instr_iterator I = MI;
    ++I;
    while (I != MBB->end() && I->isInsideBundle()) {
      EmitInstruction(I);
      ++I;
    }
  } else {
    MCInst TmpInst;
    MCInstLowering.lower(MI, TmpInst);
    EmitToStreamer(OutStreamer, TmpInst);

    if (STI.dumpCode()) {
      // Disassemble instruction/operands to text.
      DisasmLines.resize(DisasmLines.size() + 1);
      std::string &DisasmLine = DisasmLines.back();
      raw_string_ostream DisasmStream(DisasmLine);

      AMDGPUInstPrinter InstPrinter(*TM.getMCAsmInfo(),
                                    *MF->getSubtarget().getInstrInfo(),
                                    *MF->getSubtarget().getRegisterInfo());
      InstPrinter.printInst(&TmpInst, DisasmStream, StringRef());

      // Disassemble instruction/operands to hex representation.
      SmallVector<MCFixup, 4> Fixups;
      SmallVector<char, 16> CodeBytes;
      raw_svector_ostream CodeStream(CodeBytes);

      MCObjectStreamer &ObjStreamer = (MCObjectStreamer &)OutStreamer;
      MCCodeEmitter &InstEmitter = ObjStreamer.getAssembler().getEmitter();
      InstEmitter.EncodeInstruction(TmpInst, CodeStream, Fixups,
                                    MF->getSubtarget<MCSubtargetInfo>());
      CodeStream.flush();

      HexLines.resize(HexLines.size() + 1);
      std::string &HexLine = HexLines.back();
      raw_string_ostream HexStream(HexLine);

      for (size_t i = 0; i < CodeBytes.size(); i += 4) {
        unsigned int CodeDWord = *(unsigned int *)&CodeBytes[i];
        HexStream << format("%s%08X", (i > 0 ? " " : ""), CodeDWord);
      }

      DisasmStream.flush();
      DisasmLineMaxLen = std::max(DisasmLineMaxLen, DisasmLine.size());
    }
  }
}

void OR1KAsmPrinter::EmitInstruction(const MachineInstr *MI) {

  MachineBasicBlock::const_instr_iterator I = MI;
  MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();

  do {
    customEmitInstruction(I++);
  } while ((I != E) && I->isInsideBundle());
}

unsigned AArch64InstrInfo::getInstBundleLength(const MachineInstr &MI) const {
  unsigned Size = 0;
  MachineBasicBlock::const_instr_iterator I = MI;
  MachineBasicBlock::const_instr_iterator E = MI.getParent()->instr_end();
  while (++I != E && I->isInsideBundle()) {
    assert(!I->isBundle() && "No nested bundle!");
    Size += getInstSizeInBytes(*I);
  }
  return Size;
}

void LanaiAsmPrinter::EmitInstruction(const MachineInstr *MI) {
  MachineBasicBlock::const_instr_iterator I = MI->getIterator();
  MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();

  do {
    if (I->isCall()) {
      emitCallInstruction(&*I);
      continue;
    }

    customEmitInstruction(&*I);
  } while ((++I != E) && I->isInsideBundle());
}

void NyuziAsmPrinter::EmitInstruction(const MachineInstr *MI) {
  MachineBasicBlock::const_instr_iterator I = MI->getIterator();
  MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();

  do {
    MCInst TmpInst;
    MCInstLowering.Lower(MI, TmpInst);
    EmitToStreamer(*OutStreamer, TmpInst);
    if (MI->getOpcode() == Nyuzi::JUMP_TABLE) {
      EmitInlineJumpTable(MI);
    }
  } while ((I != E) && I->isInsideBundle());
}

void AMDGPUAsmPrinter::EmitInstruction(const MachineInstr *MI) {
    AMDGPUMCInstLower MCInstLowering(OutContext);

    if (MI->isBundle()) {
        const MachineBasicBlock *MBB = MI->getParent();
        MachineBasicBlock::const_instr_iterator I = MI;
        ++I;
        while (I != MBB->end() && I->isInsideBundle()) {
            EmitInstruction(I);
            ++I;
        }
    } else {
        MCInst TmpInst;
        MCInstLowering.lower(MI, TmpInst);
        OutStreamer.EmitInstruction(TmpInst);

        if (DisasmEnabled) {
            // Disassemble instruction/operands to text.
            DisasmLines.resize(DisasmLines.size() + 1);
            std::string &DisasmLine = DisasmLines.back();
            raw_string_ostream DisasmStream(DisasmLine);

            AMDGPUInstPrinter InstPrinter(*TM.getMCAsmInfo(), *TM.getInstrInfo(),
                                          *TM.getRegisterInfo());
            InstPrinter.printInst(&TmpInst, DisasmStream, StringRef());

            // Disassemble instruction/operands to hex representation.
            SmallVector<MCFixup, 4> Fixups;
            SmallVector<char, 16> CodeBytes;
            raw_svector_ostream CodeStream(CodeBytes);

            MCObjectStreamer &ObjStreamer = (MCObjectStreamer &)OutStreamer;
            MCCodeEmitter &InstEmitter = ObjStreamer.getAssembler().getEmitter();
            InstEmitter.EncodeInstruction(TmpInst, CodeStream, Fixups);
            CodeStream.flush();

            HexLines.resize(HexLines.size() + 1);
            std::string &HexLine = HexLines.back();
            raw_string_ostream HexStream(HexLine);

            for (size_t i = 0; i < CodeBytes.size(); i += 4) {
                unsigned int CodeDWord = *(unsigned int *)&CodeBytes[i];
                HexStream << format("%s%08X", (i > 0 ? " " : ""), CodeDWord);
            }

            DisasmStream.flush();
            DisasmLineMaxLen = std::max(DisasmLineMaxLen, DisasmLine.size());
        }
    }
}

void PatmosAsmPrinter::EmitInstruction(const MachineInstr *MI) {

  SmallVector<const MachineInstr*, 2> BundleMIs;
  unsigned Size = 1;

  // Unpack BUNDLE instructions
  if (MI->isBundle()) {

    const MachineBasicBlock *MBB = MI->getParent();
    MachineBasicBlock::const_instr_iterator MII = MI;
    ++MII;
    while (MII != MBB->end() && MII->isInsideBundle()) {
      const MachineInstr *MInst = MII;
      if (MInst->isPseudo()) {
        // DBG_VALUE and IMPLICIT_DEFs outside of bundles are handled in
        // AsmPrinter::EmitFunctionBody()
        MInst->dump();
        report_fatal_error("Pseudo instructions must not be bundled!");
      }

      BundleMIs.push_back(MInst);
      ++MII;
    }
    Size = BundleMIs.size();
    assert(Size == MI->getBundleSize() && "Corrupt Bundle!");
  }
  else {
    if (MI->getOpcode() == Patmos::PSEUDO_LOOPBOUND) {
      int LoopBoundMin = MI->getOperand(0).getImm();
      int LoopBoundMax = MI->getOperand(1).getImm();
      OutStreamer.GetCommentOS() << "Loop bound: ["
        << LoopBoundMin << ", " << LoopBoundMax << "]\n";
      return;
    }
    BundleMIs.push_back(MI);
  }

  // Emit all instructions in the bundle.
  for (unsigned Index = 0; Index < Size; Index++) {
    MCInst MCI;
    MCInstLowering.Lower(BundleMIs[Index], MCI);

    // Set bundle marker
    bool isBundled = (Index < Size - 1);
    MCI.addOperand(MCOperand::CreateImm(isBundled));

    OutStreamer.EmitInstruction(MCI);
  }
}

const MachineInstr *PatmosInstrInfo::hasOpcode(const MachineInstr *MI,
                                               int Opcode) const {
  if (MI->isBundle()) {
    MachineBasicBlock::const_instr_iterator II = MI; ++II;

    while (II->isInsideBundle()) {
      if (II->getOpcode() == Opcode) return II;
      II++;
    }

    return 0;
  } else {
    return MI->getOpcode() == Opcode ? MI : 0;
  }
}

bool PatmosInstrInfo::mayStall(const MachineInstr *MI) const {
  if (MI->isInlineAsm()) {
    // Being conservative here..
    return MI->mayLoad() || MI->mayStore();
  } else if (MI->isBundle()) {
    const MachineBasicBlock *MBB = MI->getParent();
    MachineBasicBlock::const_instr_iterator I = MI, E = MBB->instr_end();
    while ((++I != E) && I->isInsideBundle()) {
      if (mayStall(I)) return true;
    }
    return false;
  } else if (MI->isPseudo()) {
    return false;
  }
  // We could check for load instructions if they are always-hit.
  return isPatmosMayStall(MI->getDesc().TSFlags);
}

/// printMachineInstruction -- Print out a single Hexagon MI in Darwin syntax to
/// the current output stream.
///
void HexagonAsmPrinter::EmitInstruction(const MachineInstr *MI) {
  if (MI->isBundle()) {
    std::vector<MachineInstr const *> BundleMIs;

    const MachineBasicBlock *MBB = MI->getParent();
    MachineBasicBlock::const_instr_iterator MII = MI;
    ++MII;
    unsigned int IgnoreCount = 0;
    while (MII != MBB->end() && MII->isInsideBundle()) {
      const MachineInstr *MInst = MII;
      if (MInst->getOpcode() == TargetOpcode::DBG_VALUE ||
        MInst->getOpcode() == TargetOpcode::IMPLICIT_DEF) {
        IgnoreCount++;
        ++MII;
        continue;
      }
      // BundleMIs.push_back(&*MII);
      BundleMIs.push_back(MInst);
      ++MII;
    }
    unsigned Size = BundleMIs.size();
    assert((Size + IgnoreCount) == MI->getBundleSize() && "Corrupt Bundle!");
    for (unsigned Index = 0; Index < Size; Index++) {
      MCInst MCI;

      HexagonLowerToMC(BundleMIs[Index], MCI, *this);
      HexagonMCInstrInfo::AppendImplicitOperands(MCI);
      HexagonMCInstrInfo::setPacketBegin(MCI, Index == 0);
      HexagonMCInstrInfo::setPacketEnd(MCI, Index == (Size - 1));
      EmitToStreamer(*OutStreamer, MCI);
    }
  }
  else {
    MCInst MCI;
    HexagonLowerToMC(MI, MCI, *this);
    HexagonMCInstrInfo::AppendImplicitOperands(MCI);
    if (MI->getOpcode() == Hexagon::ENDLOOP0) {
      HexagonMCInstrInfo::setPacketBegin(MCI, true);
      HexagonMCInstrInfo::setPacketEnd(MCI, true);
    }
    EmitToStreamer(*OutStreamer, MCI);
  }

  return;
}