C++ stream::read方法代码示例

void toplevel(hls::stream<uint32>& in, hls::stream<uint32>& out) {

#pragma HLS INTERFACE ap_fifo port=in
#pragma HLS INTERFACE ap_fifo port=out
#pragma HLS RESOURCE variable=in core=AXI4Stream
#pragma HLS RESOURCE variable=out core=AXI4Stream
#pragma HLS INTERFACE ap_ctrl_none port=return

#pragma HLS ARRAY_PARTITION variable=openings complete dim=1
#pragma HLS ARRAY_PARTITION variable=inGrid complete dim=1
#pragma HLS ARRAY_MAP variable=directions instance=instance1 horizontal
#pragma HLS ARRAY_MAP variable=tile instance=instance1 horizontal

	uint8 tileCoords = in.read();
	uint8 tileSize = in.read();
	uint8 tileDataLen = in.read(); // Number of 32-bit bits
	readData(in, tileDataLen);

	uint8 numOpenings = findOpenings(tileSize);
	out.write(tileCoords);
	out.write(numOpenings);

	if (numOpenings > 0) {
		writeEntrance(out);
		findDeadEnds(tileSize);
		uint16 numDirections = findPath(tileSize);
		writeDirections(out, numDirections);
	}
}

void gauss_transform(
		hls::stream<uint32_t> &uniform_rns,
		hls::stream<float> &gaussian_rns) {
	#pragma HLS interface ap_fifo port=uniform_rns
	#pragma HLS resource core=AXI4Stream variable=uniform_rns

	#pragma HLS interface ap_fifo port=gaussian_rns
	#pragma HLS resource core=AXI4Stream variable=gaussian_rns

	#pragma HLS interface ap_ctrl_none port=return

	float u1, u2, r, z1, z2;
	while (true){
	//for (int i = 0; i < 100/2; ++i) {
		#pragma HLS PIPELINE II=2
		// intervall (0:1]
		u1 = ((float)uniform_rns.read() + 1.f) * (float)(1.0 / 4294967296.0);
		// intervall (0:2PI]
		u2 = ((float)uniform_rns.read() + 1.f) * (float)(2 * M_PI / 4294967296.0);
		r = hls::sqrtf(-2 * hls::logf(u1));
		z1 = r * hls::cosf(u2);
		z2 = r * hls::sinf(u2);
		gaussian_rns.write(z1);
		gaussian_rns.write(z2);
	}

}

// -----------------------------------------------------------
void lsupdate2SW_step	( 	const uint32_t step,
							const uint32_t stepsMC,
							const uint32_t pathsMC,
							const float discount,
							hls::stream<float> &contin_in,
							hls::stream<float> &payoff_in,
							hls::stream<float> &cashFlow_in,
							hls::stream<float> &cashFlow_out,
							hls::stream<float> &cashFlowDisc_out,
							hls::stream<float> &toAccum_out )
{
	printf("lsupdate2SW_step\n");
/**
	zerosLoop:for(uint32_t path=0; path<pathsMC; ++path)
	{
#pragma HLS PIPELINE II=1 enable_flush
		// ---------------------------------
		// write to outputs
		cashFlow_out.write((float) 0.0f);

		cashFlowDisc_out.write((float) 0.0f);
	}
*/

	//stepsLoop:for(uint32_t step=0; step<=stepsMC; ++step)
	{
		pathsLoop:for(uint32_t path=0; path<pathsMC; ++path)
		{

			float continuation = contin_in.read();
			float payoff       = payoff_in.read();

			float cashFlow = cashFlow_in.read();

			float discountedCashFlow = discount * cashFlow;

			// ---------------------------------
			float newY;

			if( (payoff > (float) 0.0f) && (payoff >= (float) continuation) )
				newY = payoff;
			else
				newY = discountedCashFlow;

			// ---------------------------------
			// write to outputs
			if(step < stepsMC)
				cashFlow_out.write(newY);

			if(step < stepsMC)
				cashFlowDisc_out.write(discount * newY);

			if(step == stepsMC)
				toAccum_out.write(newY);
		}
	}

	return;
}

//Top-level function
void toplevel(hls::stream<uint32> &input, hls::stream<uint32> &output) {
#pragma HLS INTERFACE ap_fifo port=input
#pragma HLS INTERFACE ap_fifo port=output
#pragma HLS RESOURCE variable=input core=AXI4Stream
#pragma HLS RESOURCE variable=output core=AXI4Stream
#pragma HLS INTERFACE ap_ctrl_none port=return

		uint32 command;

		init();

		side = input.read();
		ntiles = side * side;

		for(u8 t = 0; t < ntiles; t++)
			for (u8 e = 0; e < 4; e++)
				tiles[t][e] = input.read();

		mapcolours();

		// we start off with tile 0 in position 0
	    avail &= ~BIT36(0);

	    seq = 1;
	    while (!terminate) {
	    	if (seq == 1)
	    		solve();

			if (terminate) {
				output.write(0);
				break;
			}

			/* use magic flag to enforce sequencing */
			seq = 0;
			output.write(1);
			if (seq == 0)
				command = input.read();
			seq = 1;

			/* command 0: terminate */
			if (command == 0)
				break;

			/* command 1: write output */
			if (command == 1)
				for (u8 p = 0; p < ntiles; p++)
					for(u8 e = 0; e < 4; e++)
						output.write(colour(p, e));

			/* any other command (canonically 2) will cause search
			 * to continue without output */
			if (seq == 0)
				backtrack();
			seq = 1;
	    }
}

void pricing(hls::stream<float> in, hls::stream<float> out, hls::stream<float> out2, float strike_price) {
	//#pragma HLS PIPELINE II=1

	const int BLOCK = 64;
	static ap_uint<32> res_cnt[BLOCK];
	static float res_sum[BLOCK];
	static float res_prod[BLOCK];

	for (int i = 0; i < BLOCK; ++i) {
		#pragma HLS PIPELINE II=1
		float path = in.read();
		float res = max_0(hls::expf(path) - strike_price);


		ap_uint<32> l_cnt = res_cnt[i];
		float l_sum = res_sum[i];
		float l_prod = res_prod[i];

		ap_uint<32> n_cnt = l_cnt + 1;
		float delta = res - l_sum;
		float n_sum = l_sum + delta / n_cnt;
		float n_prod = l_prod + delta * (res - n_sum);

		res_cnt[i] = n_cnt;
		res_sum[i] = n_sum;
		res_prod[i] = n_prod;


		out.write(res_sum[i]);
		out2.write(res_prod[i]);
	}

	//std::max(0.f, hls::expf(path) - strike_price);
}

void dut(
    hls::stream<bit32_t> &strm_in,
    hls::stream<bit32_t> &strm_out
)
{
  // -----------------------------
  // YOUR CODE GOES HERE
  // -----------------------------
  digit  in_digit;
  bit4_t out_bit4;

  // ------------------------------------------------------
  // Input processing
  // ------------------------------------------------------
  // read the two input 32-bit words (low word first)
  bit32_t input_lo = strm_in.read();
  bit32_t input_hi = strm_in.read();

  // Convert input raw bits to digit 49-bit representation via bit slicing
  in_digit(31, 0) = input_lo;
  in_digit(in_digit.length()-1, 32) = input_hi;

  // ------------------------------------------------------
  // Call digitrec
  // ------------------------------------------------------
  out_bit4 = digitrec( in_digit );

  // ------------------------------------------------------
  // Output processing
  // ------------------------------------------------------

  // Write out the recognized digit (0-9)
  strm_out.write( out_bit4(out_bit4.length()-1, 0) );
}

void fir_sw(hls::stream<int> &input_val, hls::stream<int> &output_val)
{
	int i;
	static short shift_reg[TAPS] = {0};
	const short coeff[TAPS] = {6,0,-4,-3,5,6,-6,-13,7,44,64,44,7,-13,
                                 -6,6,5,-3,-4,0,6};

	for(i=0; i < RUN_LENGTH; i++){
		int sample;
		sample = input_val.read();

		//Shift Register
		for(int j=0; j < TAPS-1; j++){
			shift_reg[j] = shift_reg[j+1];
		}
		shift_reg[TAPS-1] = sample;

		//Filter Operation
		int acc = 0;
		for(int k=0; k < TAPS; k++){
			acc += shift_reg[k] * coeff[k];
		}
		output_val.write(acc);
	}
}

void antithetic(
		hls::stream<float> &rn_in,
		hls::stream<float> &rn_out_1,
		hls::stream<float> &rn_out_2)
{
	#pragma HLS interface ap_fifo port=rn_in
	#pragma HLS resource core=AXI4Stream variable=rn_in

	#pragma HLS interface ap_fifo port=rn_out_1
	#pragma HLS resource core=AXI4Stream variable=rn_out_1
	#pragma HLS interface ap_fifo port=rn_out_2
	#pragma HLS resource core=AXI4Stream variable=rn_out_2

	#pragma HLS interface ap_ctrl_none port=return

	//for (int i = 0; i < 10 / 2; ++i) {
	{
	//while (true) {
		#pragma HLS PIPELINE II=2

		float r1 = rn_in.read();
		float r2 = rn_in.read();

		rn_out_1.write(r1);
		rn_out_2.write(r2);

		rn_out_1.write(negate(r1));
		rn_out_2.write(negate(r2));
	}
}

void dut(
    hls::stream<bit32_t> &strm_in,
    hls::stream<bit32_t> &strm_out
)
{
  // Declare the input and output variables
  complex<float> out[4096];
  complex<float> complex_In1[4096];
  complex<float> complex_In2[4096];
  float input_data_re = 0;

  //-------------------------------------------------------
  // Input processing
  //-------------------------------------------------------
  // Read the two input 32-bit words
  bit32_t input1_lo;
  bit32_t input2_hi;
  bit32_t output_r;
  bit32_t output_i;
 
  for(int i = 0; i < 4096 ;i++) 
  {
    input1_lo = strm_in.read();
    input2_hi = strm_in.read();
    input_data_re = input1_lo;
    complex_In1[i] = complex<float>(input_data_re, 0);
    input_data_re = input2_hi;
    complex_In2[i] = complex<float>(input_data_re, 0);

  }

//  for(int m = 0; m < 4096 ;m++)
//  {
////    input_data_re = in1[m];
//    complex_In1[m] = complex<float>(80, 0);
////    input_data_re = in2[m];
//    complex_In2[m] = complex<float>(80, 0);
//  }
 
  // ------------------------------------------------------
  // Call Hybrid Imaging
  // ------------------------------------------------------
  hybrid_image(12, complex_In1, complex_In2, out );

  // ------------------------------------------------------
  // Output processing
  // ------------------------------------------------------
  // Write out the computed digit value
  
  for(int i = 0; i < 4096 ;i++)  
  { 
//    printf("%f\n",out[i]);
//    output = out[i];
    output_r = out[i].real();
    output_i = out[i].imag();
    strm_out.write(output_r);
    strm_out.write(output_i );
  }
}

void cflowaccumregio(	const uint32_t pathsMC,
						float *totalSum,
						hls::stream<float> &inData )

{
#pragma HLS INTERFACE s_axilite port=return bundle=CONTROL
#pragma HLS INTERFACE s_axilite port=pathsMC bundle=CONTROL
#pragma HLS INTERFACE s_axilite port=totalSum bundle=CONTROL

#pragma HLS INTERFACE axis register port=inData


	////////////////////////////////////////////////////////////////////////////////////////////////////////////

	//static float sums[N];
	float sums[NELEMENTS];
	#pragma HLS RESOURCE variable=sums core=RAM_2P_BRAM
	#pragma HLS dependence variable=sums false

	resetLoop:for(uint8_t i=0; i<NELEMENTS; ++i)
	{
#pragma HLS PIPELINE II=1

		sums[i] = (float) 0.0f;
	}

	uint8_t index = (uint8_t) 0;

	pathsLoop:for(uint32_t i=0; i<pathsMC; ++i)
	{
#pragma HLS PIPELINE II=1

		float data = inData.read();
		float oldSum = sums[index];
		float newSum = oldSum + data;

		sums[index] = newSum;

		index = (index<(NELEMENTS-1))?++index:(uint8_t)0;
	}


	float total = (float) 0.0f;

	totalLoop:for(uint8_t i=0; i<NELEMENTS;++i)
	{
#pragma HLS PIPELINE II=1
		total += sums[i];
	}

	*totalSum = total;

	return;
}

// -----------------------------------------------------------
void accumSW(	const uint32_t stepsMC,
				const uint32_t pathsMC,
				hls::stream<float> &inData,
				hls::stream<float> &outAccum )
{
	printf("accumSW\n");

	float sums[ACCUM_ELEM];
	#pragma HLS RESOURCE variable=sums core=RAM_2P_BRAM
	#pragma HLS DEPENDENCE variable=sums false

	stepsLoop:for(uint32_t step=0; step<=stepsMC; ++step)
	{
		// ------------------------------------------
		resetLoop:for(uint8_t i=0; i<ACCUM_ELEM; ++i)
		{
	#pragma HLS PIPELINE II=1 enable_flush

			sums[i] = (float) 0.0f;
		}

		// ------------------------------------------
		uint8_t index = (uint8_t) 0;

		pathsLoop:for(uint32_t i=0; i<pathsMC; ++i)
		{
	#pragma HLS PIPELINE II=1 enable_flush

			float data = inData.read();
			float oldSum = sums[index];
			float newSum = oldSum + data;

			sums[index] = newSum;

			index = (index<(ACCUM_ELEM-1))?++index:(uint8_t)0;
		}

		// ------------------------------------------
		float totalSum = (float) 0.0f;

		totalLoop:for(uint8_t i=0; i<ACCUM_ELEM;++i)
		{
	#pragma HLS PIPELINE II=1
			totalSum += sums[i];
		}

		// ------------------------------------------
		outAccum.write(totalSum);
	}

	return;
}

void fe_wfl(hls::stream< ap_uint<32> > sampleFifo, hls::stream< ap_uint<32> > featureFifo, ap_uint<8> windowSize) {
#pragma HLS INTERFACE ap_ctrl_none port=return
#pragma HLS INTERFACE ap_fifo port=featureFifo
#pragma HLS INTERFACE ap_fifo port=sampleFifo

    ap_uint<32> data;

    ap_int<32> wflChannel1 = 0;
    ap_int<32> wflChannel2 = 0;

    ap_int<16> sampleChannel1 = 0;
    ap_int<16> sampleChannel2 = 0;

    ap_int<16> prevSampleChannel1 = 0;
    ap_int<16> prevSampleChannel2 = 0;   

    ap_uint<8> cntSamples = 0;
    
    // Wait for Samples to arrive in FIFO
    while( windowSize == 0 ) {

    }

    while(1) {
        wflChannel1 = 0;
        wflChannel2 = 0;

        // Count zero-crossing for channel 1 & 2
        for(cntSamples = 0; cntSamples < windowSize; cntSamples++) {
            // Read data from Sample-FIFO
            // 2 16 bit Samples at one position in 32 bit FIFO => Process 2 channels in parallel
            data = sampleFifo.read();

            sampleChannel1 = data(15, 0);
            sampleChannel2 = data(31, 16);

            if (cntSamples > 0) {
                wflChannel1 += abs2(sampleChannel1 - prevSampleChannel1);
                wflChannel2 += abs2(sampleChannel2 - prevSampleChannel2);
            }

            prevSampleChannel1 = sampleChannel1;
            prevSampleChannel2 = sampleChannel2;
        }

        // Write back features to Feature-FIFO
        featureFifo.write(wflChannel1);
        featureFifo.write(wflChannel2);
    }
}

/**
 * Read data from the AXI stream and convert from uint32 to uint1
 */
void readData(hls::stream<uint32> &in, uint8 tileDataLen) {
#pragma HLS INLINE

	readLoop: for (uint8 i = 0; i < tileDataLen; i++) {
#pragma HLS LOOP_TRIPCOUNT min=5 max=18 // Min: MIN_TILE_DATA_32 (5) Max: MAX_TILE_DATA_32 (18) Actual: tileDataLen
		inGrid[i] = in.read();

		// Convert data from 18 * 32 => 576 * 1
		readShiftLoop: for (uint8 j = 0; j < BUS_WIDTH; j++) {
#pragma HLS UNROLL

			uint16 ix = i * BUS_WIDTH + (BUS_WIDTH - j - 1); // (BUS_WIDTH - j - 1) necessary to preserve direction
			tile[ix] = (inGrid[i] & (1 << j)) ? 1 : 0;
		}
	}
}

void nufft_top_pyr(hls::stream<t_input_complex>  &sig,
			   hls::stream<t_disp_scalar>    &dispFilter,
			   hls::stream<t_nufft_output_complex> &sigStreamOutH,
			   hls::stream<t_nufft_output_complex> &sigStreamOutL0,
			   hls::stream<t_nufft_output_complex> &sigStreamOutLA,
			   hls::stream<t_nufft_output_complex> &sigStreamOutLP) {
#pragma HLS inline off
/*
#ifndef  NUFFTB
#pragma HLS INTERFACE axis port=sig
#pragma HLS INTERFACE axis port=dispFilter
#pragma HLS INTERFACE axis port=sigStreamOutH
#pragma HLS INTERFACE axis port=sigStreamOutL0
#pragma HLS INTERFACE axis port=sigStreamOutLA
#pragma HLS INTERFACE axis port=sigStreamOutLP
#endif
*/

#pragma HLS data_pack variable=sig

#pragma HLS DATAFLOW
	hls::stream<t_input_complex>  sigH;
	hls::stream<t_input_complex>  sigL0;
	hls::stream<t_input_complex>  sigLA;

	hls::stream<t_disp_scalar > disp0;
	hls::stream<t_disp_scalar > disp1;
	hls::stream<t_disp_scalar > disp2;



#pragma HLS data_pack variable=sigH
#pragma HLS data_pack variable=sigL0
#pragma HLS data_pack variable=sigLA
#pragma HLS data_pack variable=sigStreamOutH
#pragma HLS data_pack variable=sigStreamOutL0
#pragma HLS data_pack variable=sigStreamOutLA
#pragma HLS data_pack variable=sigStreamOutLP

#pragma HLS stream variable=disp0   depth=512
#pragma HLS stream variable=disp1   depth=512
#pragma HLS stream variable=disp2   depth=512

#pragma HLS stream variable=sigH    depth=512
#pragma HLS stream variable=sigL0   depth=512
#pragma HLS stream variable=sigLA   depth=512
//#pragma HLS stream variable=sigStreamOutH    depth=512
//#pragma HLS stream variable=sigStreamOutL0   depth=512
//#pragma HLS stream variable=sigStreamOutLA   depth=490
//#pragma HLS stream variable=sigStreamOutLP   depth=64


	hls::stream<t_input_complex>  sigInMem;
#pragma HLS data_pack variable=sigInMem
#pragma HLS stream variable=sigInMem    depth=1520
	for(int coefIdx = 0;coefIdx < 1520; coefIdx++) {
#pragma HLS pipeline
		sigInMem.write(sig.read());
	}

	int l = 0;
	int i = 0;
	for(int coefIdx = 0;coefIdx < 1520; coefIdx++)
	{
#pragma HLS pipeline

			t_input_complex v = sigInMem.read();
			if (coefIdx >=0 && coefIdx < climits[1]) 			sigH.write(v);
			if (coefIdx >=climits[1] && coefIdx < climits[2])	sigL0.write(v);
			if (coefIdx >=climits[2] && coefIdx < climits[6])   sigLA.write(v);
			if (coefIdx >=climits[6])                           sigStreamOutLP.write(v);


		t_disp_scalar dispVal = dispFilter.read();

		if (coefIdx >=0 && coefIdx < climits[1])   	        disp0.write(dispVal);
		if (coefIdx >=climits[1] && coefIdx < climits[2]) 	disp1.write(dispVal);
		if (coefIdx >=climits[2] && coefIdx < climits[6]) 	disp2.write(dispVal);
	}
part1:
	nufft_top<C, 512>( sigH, disp0,  sigStreamOutH, 512,255);
part2:
	nufft_top<C, 512>( sigL0, disp1, sigStreamOutL0, 512,255);

part3:

//const int limits[] = { 512, 512,256,128,64,32,16};
//const int Klimits[] = { 255, 255, 127, 63, 31, 15, 3};

	for(int k=0;k<4;k++) {
//#pragma HLS DATAFLOW
		const int limit = 256>>k;
		const int klimit = 127 >> k;
		int level = k;
		nufft_top<C, 256>(sigLA, disp2, sigStreamOutLA, limit, level, klimit);
	}

//	for(int k=2;k<6;k++) {
//		nufft_top<C, 256>(sigL[2], disp2, sigStreamOutLA, limits[k],k-1,Klimits[k]);
//	}
//.........这里部分代码省略.........

void lsdatagenregio ( const uint32_t stepsMC,
						const uint32_t pathsMC,
						const float K,
						const uint32_t callPut,
						volatile uint32_t *peekStep,
						volatile uint32_t *peekPath,
						hls::stream<float> &stock,
						hls::stream<float> &cashFlow,
						hls::stream<float> &stream_x0,
						hls::stream<float> &stream_x1,
						hls::stream<float> &stream_x2,
						hls::stream<float> &stream_x3,
						hls::stream<float> &stream_x4,
						hls::stream<float> &stream_y,
						hls::stream<float> &stream_yx,
						hls::stream<float> &stream_yx2 )
{
#pragma HLS INTERFACE axis register port=stock
#pragma HLS INTERFACE axis register port=cashFlow

#pragma HLS INTERFACE axis register port=stream_x0
#pragma HLS INTERFACE axis register port=stream_x1
#pragma HLS INTERFACE axis register port=stream_x2
#pragma HLS INTERFACE axis register port=stream_x3
#pragma HLS INTERFACE axis register port=stream_x4
#pragma HLS INTERFACE axis register port=stream_y
#pragma HLS INTERFACE axis register port=stream_yx
#pragma HLS INTERFACE axis register port=stream_yx2

#pragma HLS INTERFACE s_axilite port=peekStep bundle=CONTROL
#pragma HLS INTERFACE s_axilite port=peekPath bundle=CONTROL
#pragma HLS INTERFACE s_axilite port=callPut bundle=CONTROL
#pragma HLS INTERFACE s_axilite port=K bundle=CONTROL
#pragma HLS INTERFACE s_axilite port=pathsMC bundle=CONTROL
#pragma HLS INTERFACE s_axilite port=stepsMC bundle=CONTROL
#pragma HLS INTERFACE s_axilite port=return bundle=CONTROL


	*peekStep = 0xFFFFFFFF;
	*peekPath = 0xFFFFFFFF;

	stepsLoop:for(uint32_t step=0; step < stepsMC; ++step)
	{
		*peekStep = step;

		pathsLoop:for(uint32_t path=0; path<pathsMC; ++path)
		{
//#pragma HLS PIPELINE II=1 enable_flush
#pragma HLS PIPELINE II=1

			float s = stock.read();
			float cflow = cashFlow.read();

			// ---------------------------------
			// in-the-money calculation
			float diff = (s-K);

			float payoff;

			if(callPut == 0)
				payoff = diff;
			else
				payoff = -diff;

			bool inTheMoney;

			if( payoff > 0.0f )
				inTheMoney = true;
			else
				inTheMoney = false;

			// ---------------------------------
			// basis functions
			float s2 = s*s;

			float x0;
			float x1;
			float x2;
			float y;

			if(inTheMoney == true)
			{
				x0 = (float) 1.0f;
				x1 = (float) s;
				x2 = (float) s2;
				y  = (float) cflow;
			}
			else
			{
				x0 = (float) 0.0f;
				x1 = (float) 0.0f;
				x2 = (float) 0.0f;
				y  = (float) 0.0f;
			}

			// remaining multipliers
			float x3  = x1*x2;
			float x4  = x2*x2;
			float yx  =  y*x1;
			float yx2 =  y*x2;
//.........这里部分代码省略.........