C++ address_map::global_mask方法代码示例

void c8280_device::c8280_fdc_mem(address_map &map)
{
	map.global_mask(0x1fff);
	map(0x0000, 0x007f).mirror(0x300).ram();
	map(0x0080, 0x0083).mirror(0x37c).rw(WD1797_TAG, FUNC(fd1797_device::read), FUNC(fd1797_device::write));
	map(0x0400, 0x07ff).ram().share("share1");
	map(0x0800, 0x0bff).ram().share("share2");
	map(0x0c00, 0x0fff).ram().share("share3");
	map(0x1000, 0x13ff).ram().share("share4");
	map(0x1400, 0x1400).mirror(0x3ff).rw(this, FUNC(c8280_device::fk5_r), FUNC(c8280_device::fk5_w));
	map(0x1800, 0x1fff).rom().region(M6502_FDC_TAG, 0);
}

void speglsht_state::st0016_io(address_map &map)
{
	map.global_mask(0xff);
	//AM_RANGE(0x00, 0xbf) AM_READ(st0016_vregs_r) AM_WRITE(st0016_vregs_w)
	map(0xe1, 0xe1).w(FUNC(speglsht_state::st0016_rom_bank_w));
	//AM_RANGE(0xe2, 0xe2) AM_WRITE(st0016_sprite_bank_w)
	//AM_RANGE(0xe3, 0xe4) AM_WRITE(st0016_character_bank_w)
	//AM_RANGE(0xe5, 0xe5) AM_WRITE(st0016_palette_bank_w)
	map(0xe6, 0xe6).nopw();
	map(0xe7, 0xe7).nopw();
	//AM_RANGE(0xf0, 0xf0) AM_READ(st0016_dma_r)
}

/*   IO decoding
 *
 *   A7 A6 A5 A4 A3 A2 A1 A0
 *    0  x  x  x  x  x  x  x - 74138 selected
 *    0  0  0  0  x  x  x  x - 74259 selected
 *    0  0  0  0  D  0  0  0 - EEPROM Data In
 *    0  0  0  0  D  0  0  1 - COMDTR
 *    0  0  0  0  D  0  1  0 - EEPROM CS
 *    0  0  0  0  D  0  1  1 - Vertical Sync
 *    0  0  0  0  D  1  0  0 - TBRQ and BLANK set
 *    0  0  0  0  D  1  0  1 - BLINK
 *    0  0  0  0  D  1  1  0 - CSTR
 *    0  0  0  0  D  1  1  1 - EEPROM CLK
 *    0  0  0  1  x  x  x  x - AP5
 *    0  0  1  0  x  x  x  x - WKB
 *    0  0  1  1  x  x  x  x - 74299 G1+G2
 *    0  1  0  0  x  x  x  x - Reset of 74299
 *    0  1  0  1  x  x  x  x - Enable TX?
 *    0  1  1  0  x  x  x  x - Reset KBD
 *    0  1  1  1  x  x  x  x - DKA/DREQ0 Z180 = D0
 *
 * Now, in parallel there is a lot of stuff going on in the upper I/O address lines
 * they are driving the character generator and some other signals
 *  A19 - not available on the DIP64 package
 *  A18 - multiplexed pin used as Tout pulsing the VT1 signal
 *  A17 - WA on DD17 (74670) and DD18 (74670)
 *  A16 - WB on DD 17 (74670) and DD18 (74670)
 *
 * At the moment we emulate the screen at a high level so I just disregard the special functions on A16 - A18 by mirroring the mapping below
 */
void kron180_state::kron180_iomap(address_map &map)
{
	map.global_mask(0xff);
	map(0x0000, 0x000f).w(FUNC(kron180_state::sn74259_w));
	map(0x0010, 0x001f).rw(FUNC(kron180_state::ap5_r), FUNC(kron180_state::ap5_w));
	map(0x0020, 0x002f).w(FUNC(kron180_state::wkb_w));
	map(0x0030, 0x003f).r(FUNC(kron180_state::sn74299_r));
	map(0x0040, 0x004f).w(FUNC(kron180_state::sn74299_w));
	map(0x0050, 0x005f).w(FUNC(kron180_state::txen_w));
	map(0x0060, 0x006f).w(FUNC(kron180_state::kbd_reset_w));
	map(0x0070, 0x007f).w(FUNC(kron180_state::dreq_w));
}

void b2m_state::b2m_io(address_map &map)
{
	map.global_mask(0x1f);
	map(0x00, 0x03).rw(m_pit, FUNC(pit8253_device::read), FUNC(pit8253_device::write));
	map(0x04, 0x07).rw("ppi8255_2", FUNC(i8255_device::read), FUNC(i8255_device::write));
	map(0x08, 0x0b).rw("ppi8255_1", FUNC(i8255_device::read), FUNC(i8255_device::write));
	map(0x0c, 0x0c).rw(FUNC(b2m_state::b2m_localmachine_r), FUNC(b2m_state::b2m_localmachine_w));
	map(0x10, 0x13).rw(FUNC(b2m_state::b2m_palette_r), FUNC(b2m_state::b2m_palette_w));
	map(0x14, 0x15).rw(m_pic, FUNC(pic8259_device::read), FUNC(pic8259_device::write));
	map(0x18, 0x19).rw("uart", FUNC(i8251_device::read), FUNC(i8251_device::write));
	map(0x1c, 0x1f).rw(m_fdc, FUNC(fd1793_device::read), FUNC(fd1793_device::write));
}

void djboy_state::slavecpu_port_am(address_map &map)
{
	map.global_mask(0xff);
	map(0x00, 0x00).w(FUNC(djboy_state::slavecpu_bankswitch_w));
	map(0x02, 0x02).w(m_soundlatch, FUNC(generic_latch_8_device::write));
	map(0x04, 0x04).r(m_slavelatch, FUNC(generic_latch_8_device::read)).w(m_beastlatch, FUNC(generic_latch_8_device::write));
	map(0x06, 0x06).w(FUNC(djboy_state::djboy_scrolly_w));
	map(0x08, 0x08).w(FUNC(djboy_state::djboy_scrollx_w));
	map(0x0a, 0x0a).w(FUNC(djboy_state::trigger_nmi_on_mastercpu));
	map(0x0c, 0x0c).r(FUNC(djboy_state::beast_status_r));
	map(0x0e, 0x0e).w(FUNC(djboy_state::coin_count_w));
}

void c2040_device::c2040_fdc_mem(address_map &map)
{
	map.global_mask(0x1fff);
	map(0x0000, 0x003f).mirror(0x0300).m(M6530_TAG, FUNC(mos6530_new_device::ram_map));
	map(0x0040, 0x004f).mirror(0x0330).m(M6522_TAG, FUNC(via6522_device::map));
	map(0x0080, 0x008f).mirror(0x0330).m(M6530_TAG, FUNC(mos6530_new_device::io_map));
	map(0x0400, 0x07ff).ram().share("share1");
	map(0x0800, 0x0bff).ram().share("share2");
	map(0x0c00, 0x0fff).ram().share("share3");
	map(0x1000, 0x13ff).ram().share("share4");
	map(0x1c00, 0x1fff).rom().region(M6504_TAG, 0);
}

void mightguy_state::mightguy_io_map(address_map &map)
{
	map.global_mask(0xff);
	map(0x00, 0x00).portr("P1");
	map(0x01, 0x01).portr("P2");
	map(0x02, 0x02).portr("SYSTEM");
	map(0x03, 0x03).portr("DSW1");
	map(0x04, 0x04).portr("DSW2");
	map(0x40, 0x43).w(FUNC(cop01_state::cop01_vreg_w));
	map(0x44, 0x44).w(FUNC(cop01_state::cop01_sound_command_w));
	map(0x45, 0x45).w(FUNC(cop01_state::cop01_irq_ack_w)); /* ? */
}

void ojankohs_state::ojankoc_io_map(address_map &map)
{
	map.global_mask(0xff);
	map(0x00, 0x1f).w(FUNC(ojankohs_state::ojankoc_palette_w));
	map(0xf9, 0xf9).w(FUNC(ojankohs_state::ojankohs_msm5205_w));
	map(0xfb, 0xfb).w(FUNC(ojankohs_state::ojankoc_ctrl_w));
	map(0xfc, 0xfc).r(FUNC(ojankohs_state::ojankoc_keymatrix_p1_r));
	map(0xfd, 0xfd).r(FUNC(ojankohs_state::ojankoc_keymatrix_p2_r));
	map(0xfd, 0xfd).w(FUNC(ojankohs_state::port_select_w));
	map(0xfe, 0xff).w("aysnd", FUNC(ay8910_device::data_address_w));
	map(0xff, 0xff).r("aysnd", FUNC(ay8910_device::data_r));
}

void mw18w_state::mw18w_portmap(address_map &map)
{
	map.unmap_value_high();
	map.global_mask(0xff);
	map(0x00, 0x00).portr("IN0").w(FUNC(mw18w_state::mw18w_sound0_w));
	map(0x01, 0x01).portr("IN1").w(FUNC(mw18w_state::mw18w_sound1_w));
	map(0x02, 0x02).portr("IN2").w(FUNC(mw18w_state::mw18w_lamps_w));
	map(0x03, 0x03).portr("DSW").w(FUNC(mw18w_state::mw18w_led_display_w));
	map(0x04, 0x04).portr("IN4");
	map(0x06, 0x06).w("watchdog", FUNC(watchdog_timer_device::reset_w));
	map(0x07, 0x07).w(FUNC(mw18w_state::mw18w_irq0_clear_w));
}

void dsb46_state::dsb46_io(address_map &map)
{
	map.global_mask(0xff);
	map.unmap_value_high();
	map(0x00, 0x03).rw("sio", FUNC(z80sio_device::ba_cd_r), FUNC(z80sio_device::ba_cd_w));
	map(0x08, 0x0b).rw("ctc1", FUNC(z80ctc_device::read), FUNC(z80ctc_device::write));
	map(0x1a, 0x1a).w(FUNC(dsb46_state::port1a_w));
	//AM_RANGE(0x10, 0x10) disk related
	//AM_RANGE(0x14, 0x14) ?? (read after CTC1 TRG3)
	//AM_RANGE(0x18, 0x18) ??
	//AM_RANGE(0x1c, 0x1c) disk data
	//AM_RANGE(0x1d, 0x1d) disk status (FF = no fdc)
}

/* port i/o functions */
void p2000t_state::p2000t_io(address_map &map)
{
	map.global_mask(0xff);
	map(0x00, 0x0f).r(FUNC(p2000t_state::p2000t_port_000f_r));
	map(0x10, 0x1f).w(FUNC(p2000t_state::p2000t_port_101f_w));
	map(0x20, 0x2f).r(FUNC(p2000t_state::p2000t_port_202f_r));
	map(0x30, 0x3f).w(FUNC(p2000t_state::p2000t_port_303f_w));
	map(0x50, 0x5f).w(FUNC(p2000t_state::p2000t_port_505f_w));
	map(0x70, 0x7f).w(FUNC(p2000t_state::p2000t_port_707f_w));
	map(0x88, 0x8b).w(FUNC(p2000t_state::p2000t_port_888b_w));
	map(0x8c, 0x90).w(FUNC(p2000t_state::p2000t_port_8c90_w));
	map(0x94, 0x94).w(FUNC(p2000t_state::p2000t_port_9494_w));
}

void avalnche_state::main_map(address_map &map)
{
	map.global_mask(0x7fff);
	map(0x0000, 0x1fff).ram().share("videoram");
	map(0x2000, 0x2000).mirror(0x0ffc).portr("IN0");
	map(0x2001, 0x2001).mirror(0x0ffc).portr("IN1");
	map(0x2002, 0x2002).mirror(0x0ffc).portr("PADDLE");
	map(0x2003, 0x2003).mirror(0x0ffc).nopr();
	map(0x3000, 0x3000).mirror(0x0fff).w("watchdog", FUNC(watchdog_timer_device::reset_w));
	map(0x4000, 0x4007).mirror(0x0ff8).w("latch", FUNC(f9334_device::write_d0));
	map(0x5000, 0x5000).mirror(0x0fff).w(FUNC(avalnche_state::avalnche_noise_amplitude_w));
	map(0x6000, 0x7fff).rom();
}

void divebomb_state::divebomb_rozcpu_iomap(address_map &map)
{
	map.global_mask(0xff);
	map(0x00, 0x00).w(FUNC(divebomb_state::rozcpu_bank_w));
	map(0x10, 0x10).w(FUNC(divebomb_state::rozcpu_wrap_enable_w<1>));
	map(0x12, 0x12).w(FUNC(divebomb_state::rozcpu_enable_w<0>));
	map(0x13, 0x13).w(FUNC(divebomb_state::rozcpu_enable_w<1>));
	map(0x14, 0x14).w(FUNC(divebomb_state::rozcpu_wrap_enable_w<0>));
	map(0x20, 0x2f).w(m_k051316[0], FUNC(k051316_device::ctrl_w));
	map(0x30, 0x3f).w(m_k051316[1], FUNC(k051316_device::ctrl_w));
	map(0x40, 0x40).r("fg2roz", FUNC(generic_latch_8_device::read)).w(m_roz2fg_latch, FUNC(generic_latch_8_device::write));
	map(0x50, 0x50).w(FUNC(divebomb_state::rozcpu_pal_w));
}

void mazerbla_state::mazerbla_io_map(address_map &map)
{
	map.global_mask(0xff);
	map(0x4c, 0x4f).rw(FUNC(mazerbla_state::ls670_1_r), FUNC(mazerbla_state::ls670_0_w));
	map(0x60, 0x60).w(FUNC(mazerbla_state::zpu_bcd_decoder_w)); // AM_READ from protection pal, if populated
	map(0x62, 0x62).r(FUNC(mazerbla_state::zpu_inputs_r));
	// 64 is some sort of output latch, unpopulated?
	// 66 is some sort of output latch, unpopulated?
	map(0x68, 0x68).w(FUNC(mazerbla_state::zpu_coin_counter_w));
	map(0x6a, 0x6a).w(FUNC(mazerbla_state::zpu_lamps_w));
	// 6c RW is a 6850 acia for communication with another cabinet or debug console? unpopulated?
	map(0x6e, 0x6f).w(FUNC(mazerbla_state::zpu_led_w));
}

void mc1000_state::mc1000_io(address_map &map)
{
	map.global_mask(0xff);
	map(0x04, 0x04).rw(FUNC(mc1000_state::printer_r), FUNC(mc1000_state::printer_w));
	map(0x05, 0x05).w("cent_data_out", FUNC(output_latch_device::bus_w));
//  map(0x10, 0x10).w(m_crtc, FUNC(mc6845_device::address_w));
//  map(0x11, 0x11).rw(m_crtc, FUNC(mc6845_device::register_r), FUNC(mc6845_device::register_w));
	map(0x12, 0x12).w(FUNC(mc1000_state::mc6845_ctrl_w));
	map(0x20, 0x20).w(AY8910_TAG, FUNC(ay8910_device::address_w));
	map(0x40, 0x40).r(AY8910_TAG, FUNC(ay8910_device::data_r));
	map(0x60, 0x60).w(AY8910_TAG, FUNC(ay8910_device::data_w));
	map(0x80, 0x80).w(FUNC(mc1000_state::mc6847_attr_w));
}