C++ TargetHandleList::begin方法代码示例

void calloutSymbolData( TargetHandle_t i_mba, const CenRank & i_rank,
                        const MemUtils::MaintSymbols & i_symData,
                        STEP_CODE_DATA_STRUCT & io_sc, PRDpriority i_priority )
{
    bool dimmsBad[PORT_SLCT_PER_MBA] = { false, false };

    for ( MemUtils::MaintSymbols::const_iterator it = i_symData.begin();
          it != i_symData.end(); it++ )
    {
        dimmsBad[it->symbol.getPortSlct()] = true;
    }

    for ( uint32_t port = 0; port < PORT_SLCT_PER_MBA; port++ )
    {
        if ( dimmsBad[port] )
        {
            TargetHandleList list = getConnectedDimms( i_mba, i_rank, port );
            for ( TargetHandleList::iterator it = list.begin();
                  it != list.end(); it++ )
            {
                io_sc.service_data->SetCallout( *it, i_priority );
            }
        }
    }
}

errlHndl_t checkForIplAttentions()
{
    errlHndl_t err = NULL;

    assert(!Singleton<Service>::instance().running());

    TargetHandleList list;

    getTargetService().getAllChips(list, TYPE_PROC);

    TargetHandleList::iterator tit = list.begin();

    while(tit != list.end())
    {
        err = Singleton<Service>::instance().handleAttentions(*tit);

        if(err)
        {
            errlCommit(err, ATTN_COMP_ID);
        }

        tit = list.erase(tit);
    }

    return 0;
}

TargetHandleList getConnectedDimms( TargetHandle_t i_mba,
                                    uint8_t i_port )
{
    #define PRDF_FUNC "[CalloutUtil::getConnectedDimms] "

    TargetHandleList o_list;

    TargetHandleList dimmList = getConnectedDimms( i_mba );

    for ( TargetHandleList::iterator dimmIt = dimmList.begin();
          dimmIt != dimmList.end(); dimmIt++)
    {
        uint8_t portSlct;
        int32_t l_rc = getMbaPort( *dimmIt, portSlct );
        if ( SUCCESS != l_rc )
        {
            PRDF_ERR( PRDF_FUNC "getMbaPort(0x%08x) failed",
                      getHuid(*dimmIt) );
            continue;
        }

        if ( portSlct == i_port )
        {
            o_list.push_back( *dimmIt );
        }
    }

    return o_list;

    #undef PRDF_FUNC
}

        registerOcc()
        {
            runtimeInterfaces_t * rt_intf = getRuntimeInterfaces();
            rt_intf->get_lid_list = &UtilLidMgr::getLidList;
            rt_intf->occ_load = &executeLoadOCC;
            rt_intf->occ_start = &executeStartOCCs;
            rt_intf->occ_stop = &executeStopOCCs;
            rt_intf->process_occ_error  = &process_occ_error;
            rt_intf->process_occ_reset  = &process_occ_reset;
            rt_intf->enable_occ_actuation  = &enable_occ_actuation;

            // If we already loaded OCC during the IPL we need to fix up
            //  the virtual address because we're now not using virtual
            //  memory
            // Note: We called our memory "ibm,slw-occ-image" but OPAL
            //  created their own range that subsumed ours
            //@todo-RTC:124392-solve this naming issue...
            uint64_t l_base_homer =
              g_hostInterfaces->get_reserved_mem("ibm,homer-image");

            TargetHandleList procChips;
            getAllChips(procChips, TYPE_PROC, true);
            for (TargetHandleList::iterator itr = procChips.begin();
                 itr != procChips.end();
                 ++itr)
            {
                uint64_t l_offset = (*itr)->getAttr<ATTR_POSITION>()
                  * VMM_HOMER_INSTANCE_SIZE;
                (*itr)->setAttr<ATTR_HOMER_VIRT_ADDR>
                  (l_base_homer+l_offset);
            }
        }

/**
 * @brief  Optional plugin function called after analysis is complete but
 *         before PRD exits.
 * @param  i_cenChip A Centaur MBA chip.
 * @param  i_sc      The step code data struct.
 * @note   This is especially useful for any analysis that still needs to be
 *         done after the framework clears the FIR bits that were at attention.
 * @return SUCCESS.
 */
int32_t PllPostAnalysis( ExtensibleChip * i_cenChip,
                         STEP_CODE_DATA_STRUCT & i_sc )
{
    #define PRDF_FUNC "[Membuf::PllPostAnalysis] "

    int32_t o_rc = SUCCESS;

    TargetHandle_t cenTrgt = i_cenChip->GetChipHandle();

    do
    {
        // need to clear associated bits in the MCIFIR bits.
        o_rc = MemUtils::mcifirCleanup( i_cenChip, i_sc );
        if( SUCCESS != o_rc )
        {
            PRDF_ERR( PRDF_FUNC"mcifirCleanup() failed");
            break;
        }

        // Check to make sure we are at threshold and have something garded.
        if ( !i_sc.service_data->IsAtThreshold() ||
             (GardAction::NoGard == i_sc.service_data->QueryGard()) )
        {
            break; // nothing to do
        }

        TargetHandleList list = getConnected( cenTrgt, TYPE_MBA );
        if ( 0 == list.size() )
        {
            PRDF_ERR( PRDF_FUNC"getConnected(0x%08x, TYPE_MBA) failed",
                      getHuid(cenTrgt) );
            o_rc = FAIL; break;
        }

        // Send SKIP_MBA message for each MBA.
        for ( TargetHandleList::iterator mbaIt = list.begin();
              mbaIt != list.end(); ++mbaIt )
        {
            int32_t l_rc = mdiaSendEventMsg( *mbaIt, MDIA::SKIP_MBA );
            if ( SUCCESS != l_rc )
            {
                PRDF_ERR( PRDF_FUNC"mdiaSendEventMsg(0x%08x, SKIP_MBA) failed",
                          getHuid(*mbaIt) );
                o_rc |= FAIL;
                continue; // keep going
            }
        }

    } while(0);

    return o_rc;

    #undef PRDF_FUNC
}

void Service::processIntrQMsgPreAck(const msg_t & i_msg)
{
    // this function should do as little as possible
    // since the hw can't generate additional interrupts
    // until the msg is acknowledged

    TargetHandle_t proc = NULL;

    // ---------------------------
    // P8 used the XISR structure
    // P9 uses the PIR structure
    // ---------------------------
    // PIR structure is
    // 17 bits unused, 4 bits group, 3 bits chipId, 1 unused,
    // 5/4 CoreID(norm/fused), 2/3 ThreadId(norm/fused)
    PIR_t  l_pir;
    l_pir.word = i_msg.data[1];


    TargetHandleList procs;
    getTargetService().getAllChips(procs, TYPE_PROC);

    TargetHandleList::iterator it = procs.begin();

    // resolve the PIR to a proc target
    while(it != procs.end())
    {
        uint64_t group = 0, chip = 0;

        getTargetService().getAttribute(ATTR_FABRIC_GROUP_ID, *it, group);
        getTargetService().getAttribute(ATTR_FABRIC_CHIP_ID, *it,  chip);

        // for debug, but you have to compile it in
        ATTN_TRACE("IntrQMsgPreAck: Group:%X Chip:%X  PirG:%X PirC:%X PirW:%X",
                    group, chip, l_pir.groupId, l_pir.chipId, l_pir.word  );

        if ((group == l_pir.groupId) && (chip == l_pir.chipId))
        {
            proc = *it;
            break;
        }

        ++it;
    }

    ServiceCommon::processAttnPreAck(proc);

}

errlHndl_t Service::processCheckstop()
{
    errlHndl_t err = NULL;
    AttentionList attentions;

    assert(!Singleton<Service>::instance().running());
    TargetHandleList list;

    ProcOps & procOps = getProcOps();
    attentions.clear();

    getTargetService().getAllChips(list, TYPE_PROC);

    TargetHandleList::iterator tit = list.begin();

    while(tit != list.end())
    {
        // query the proc resolver for active attentions
        // (we also handle mem bufs in this routine)
        err = procOps.resolve( *tit, 0, attentions);

        if(err)
        {
            ATTN_ERR("procOps.resolve() returned error.HUID:0X%08X ",
                      get_huid( *tit ));
            break;
        }

        ++tit;
    }

    if ( NULL == err )
    {
        if(!attentions.empty())
        {
            err = getPrdWrapper().callPrd(attentions);
        }

        if(err)
        {
            ATTN_ERR("callPrd() returned error." )
        }
    }

    return err;
}

/**
 * @brief  Plugin to add MBA and Dimms behind given port to callout list.
 * @param  i_chip   mba chip
 * @param  i_sc     The step code data struct.
 * @param  i_port   Port Number.
 * @return SUCCESS
 */
int32_t CalloutMbaAndDimm( ExtensibleChip * i_chip,
                           STEP_CODE_DATA_STRUCT & i_sc, uint32_t i_port )
{
    using namespace TARGETING;
    using namespace CalloutUtil;
    int32_t o_rc = SUCCESS;
    TargetHandle_t mbaTarget = i_chip->GetChipHandle();

    TargetHandleList calloutList = getConnectedDimms( mbaTarget, i_port );
    i_sc.service_data->SetCallout( mbaTarget, MRU_LOW );

    for ( TargetHandleList::iterator it = calloutList.begin();
          it != calloutList.end(); it++)
    {
       i_sc.service_data->SetCallout( *it,MRU_HIGH );
    }
    return o_rc;
}

/**
 * @brief Enable and disable special wakeup for SCOM operations
 *   FSP:  Call the Host interface wakeup function for all core
 *         targets under the specified target, HOST wakeup bit is used
 *   BMC:  Call the wakeup HWP for the target type specified (EQ/EX/CORE),
 *         Proc type calls the HWP for all cores, FSP wakeup bit is used
 */
errlHndl_t handleSpecialWakeup(TARGETING::Target* i_target, bool i_enable)
{
    errlHndl_t l_errl = NULL;

    TARGETING::TYPE l_type = i_target->getAttr<TARGETING::ATTR_TYPE>();

    // FSP
    if(INITSERVICE::spBaseServicesEnabled())
    {
        // Check for valid interface function
        if( g_hostInterfaces == NULL ||
            g_hostInterfaces->wakeup == NULL )
        {
            TRACFCOMP( g_trac_scom,
                       ERR_MRK"Hypervisor wakeup interface not linked");

            /*@
             * @errortype
             * @moduleid     SCOM_HANDLE_SPECIAL_WAKEUP
             * @reasoncode   SCOM_RUNTIME_INTERFACE_ERR
             * @userdata1    Target HUID
             * @userdata2    Wakeup Enable
             * @devdesc      Wakeup runtime interface not linked.
             */
            l_errl = new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_INFORMATIONAL,
                                             SCOM_HANDLE_SPECIAL_WAKEUP,
                                             SCOM_RUNTIME_INTERFACE_ERR,
                                             get_huid(i_target),
                                             i_enable);

            l_errl->addProcedureCallout(HWAS::EPUB_PRC_HB_CODE,
                                        HWAS::SRCI_PRIORITY_HIGH);

            return l_errl;
        }

        TargetHandleList pCoreList;

        // If the target is already a core just push it on the list
        if(l_type == TARGETING::TYPE_CORE)
        {
            pCoreList.clear();
            pCoreList.push_back(i_target);
        }
        else
        {
            getChildChiplets( pCoreList, i_target, TARGETING::TYPE_CORE );
        }

        // Call wakeup on all core targets
        // Wakeup may be called twice for fused cores
        for ( auto pCore_it = pCoreList.begin();
              pCore_it != pCoreList.end();
              ++pCore_it )
        {
            // Runtime target id
            RT_TARG::rtChipId_t rtTargetId = 0;
            l_errl = RT_TARG::getRtTarget(*pCore_it, rtTargetId);
            if(l_errl)
            {
                break;
            }

            uint32_t mode;
            if(i_enable)
            {
                mode = HBRT_WKUP_FORCE_AWAKE;
            }
            else
            {
                mode = HBRT_WKUP_CLEAR_FORCE;
            }

            // Do the special wakeup
            int l_rc = g_hostInterfaces->wakeup(rtTargetId,mode);

            if(l_rc)
            {
                TRACFCOMP( g_trac_scom,ERR_MRK
                    "Hypervisor wakeup failed. "
                    "rc 0x%X target_huid 0x%llX rt_target_id 0x%llX mode %d",
                    l_rc, get_huid(*pCore_it), rtTargetId, mode );

                // convert rc to error log
                /*@
                 * @errortype
                 * @moduleid         SCOM_HANDLE_SPECIAL_WAKEUP
                 * @reasoncode       SCOM_RUNTIME_WAKEUP_ERR
                 * @userdata1        Hypervisor return code
                 * @userdata2[0:31]  Runtime Target ID
                 * @userdata2[32:63] Wakeup Mode
                 * @devdesc          Hypervisor wakeup failed.
                 */
//.........这里部分代码省略.........

errlHndl_t PegasusConfigurator::addDomainChips( TARGETING::TYPE  i_type,
                                          RuleChipDomain * io_domain,
                                          PllDomainList  * io_pllDomains,
                                          PllDomainList  * io_pllDomains2)
{
    using namespace TARGETING;
    errlHndl_t l_errl = NULL ;

    // Get references to factory objects.
    ScanFacility      & scanFac = ScanFacility::Access();
    ResolutionFactory & resFac  = ResolutionFactory::Access();

    // Get all targets of specified type and add to given domain.
    TargetHandleList list = PlatServices::getFunctionalTargetList( i_type );

    if ( 0 == list.size() )
    {
        PRDF_ERR( "[addDomainChips] getFunctionalTargetList "
                  "returned empty list for i_type=%d", i_type );
    }
    else
    {
        // Get rule filename based on type.
        const char * fileName = "";
        switch ( i_type )
        {
            case TYPE_PROC:   
                // Check which Proc chip type
                if (MODEL_NAPLES == getProcModel(list[0]))
                    fileName = NaplesProc;
                else
                    fileName = MuranoVeniceProc;
                break;
            case TYPE_EX:     fileName = Ex;     break;
            case TYPE_MCS:    fileName = Mcs;    break;
            case TYPE_MEMBUF: fileName = Membuf; break;
            case TYPE_MBA:    fileName = Mba;    break;

            default:
                // Print a trace statement, but do not fail the build.
                PRDF_ERR( "[addDomainChips] Unsupported target type: %d",
                          i_type );
        }

        for ( TargetHandleList::const_iterator itr = list.begin();
              itr != list.end(); ++itr )
        {
            if ( NULL == *itr ) continue;

            RuleChip * chip = new RuleChip( fileName, *itr,
                                            scanFac, resFac,l_errl );
            if( NULL != l_errl )
            {
                delete chip;
                break;
            }
            sysChipLst.push_back( chip );
            io_domain->AddChip(   chip );

            // PLL domains
            switch ( i_type )
            {
                case TYPE_PROC:
                    addChipsToPllDomain(CLOCK_DOMAIN_FAB,
                                        io_pllDomains,
                                        chip,
                                        *itr,
                                        scanFac,
                                        resFac);
                    addChipsToPllDomain(CLOCK_DOMAIN_IO,
                                        io_pllDomains2,
                                        chip,
                                        *itr,
                                        scanFac,
                                        resFac);
                    break;
                case TYPE_MEMBUF:
                    addChipsToPllDomain(CLOCK_DOMAIN_MEMBUF,
                                        io_pllDomains,
                                        chip,
                                        *itr,
                                        scanFac,
                                        resFac);
                    break;
                default:
                    break;
            }
        }

        // Flush rule table cache since objects are all built.
        Prdr::LoadChipCache::flushCache();

    }

    return  l_errl;
}

/** @func GetCheckstopInfo
 *  To be called from the fabric domain to gather Checkstop information.  This
 *  information is used in a sorting algorithm.
 *
 *  This is a plugin function: GetCheckstopInfo
 *
 *  @param i_chip - The chip.
 *  @param o_wasInternal - True if this chip has an internal checkstop.
 *  @param o_externalChips - List of external fabrics driving checkstop.
 *  @param o_wofValue - Current WOF value (unused for now).
 */
int32_t GetCheckstopInfo( ExtensibleChip * i_chip,
                          bool & o_wasInternal,
                          TargetHandleList & o_externalChips,
                          uint64_t & o_wofValue )
{
    // Clear parameters.
    o_wasInternal = false;
    o_externalChips.erase(o_externalChips.begin(), o_externalChips.end());
    o_wofValue = 0;

    SCAN_COMM_REGISTER_CLASS * l_globalFir =
      i_chip->getRegister("GLOBAL_CS_FIR");

    SCAN_COMM_REGISTER_CLASS * l_pbXstpFir =
      i_chip->getRegister("PB_CHIPLET_CS_FIR");

    SCAN_COMM_REGISTER_CLASS * l_extXstpFir =
      i_chip->getRegister("PBEXTFIR");

    int32_t o_rc = SUCCESS;
    o_rc |= l_globalFir->Read();
    o_rc |= l_pbXstpFir->Read();
    o_rc |= l_extXstpFir->Read();

    if(o_rc)
    {
        PRDF_ERR( "[GetCheckstopInfo] SCOM fail on 0x%08x rc=%x",
                  i_chip->GetId(), o_rc);
        return o_rc;
    }

    if ((0 != l_globalFir->GetBitFieldJustified(0,32)) &&
        (!l_globalFir->IsBitSet(2) ||
         !l_pbXstpFir->IsBitSet(2)))
        o_wasInternal = true;

    // Get connected chips.
    uint32_t l_connectedXstps = l_extXstpFir->GetBitFieldJustified(0,7);
    uint32_t l_positions[] =
    {
        0, // bit 0 - XBUS 0
        1, // bit 1 - XBUS 1
        2, // bit 2 - XBUS 2
        3, // bit 3 - XBUS 3
        0, // bit 4 - ABUS 0
        1, // bit 5 - ABUS 1
        2  // bit 6 - ABUS 2
    };

    for (int i = 0, j = 0x40; i < 7; i++, j >>= 1)
    {
        if (0 != (j & l_connectedXstps))
        {
            TargetHandle_t l_connectedFab =
              getConnectedPeerProc(i_chip->GetChipHandle(),
                                   i<4 ? TYPE_XBUS : TYPE_ABUS,
                                   l_positions[i]);

            if (NULL != l_connectedFab)
            {
                o_externalChips.push_back(l_connectedFab);
            }
        }
    }

    // Read WOF value.
    SCAN_COMM_REGISTER_CLASS * l_wof = i_chip->getRegister("TODWOF");
    o_rc |= l_wof->Read();

    if(o_rc)
    {
        PRDF_ERR( "[GetCheckstopInfo] SCOM fail on 0x%08x rc=%x",
                  i_chip->GetId(), o_rc);
        return o_rc;
    }

    o_wofValue = l_wof->GetBitFieldJustified(0,64);

    return SUCCESS;

} PRDF_PLUGIN_DEFINE( Proc, GetCheckstopInfo );

int32_t CenMbaTdCtlr::handleUE( STEP_CODE_DATA_STRUCT & io_sc )
{
    #define PRDF_FUNC "[CenMbaTdCtlr::handleUE] "

    using namespace CalloutUtil;

    int32_t o_rc = SUCCESS;

    iv_tdState = NO_OP; // Abort the TD procedure.

    setTdSignature( io_sc, PRDFSIG_MaintUE );
    io_sc.service_data->SetServiceCall();

    CenMbaDataBundle * mbadb = getMbaDataBundle( iv_mbaChip );

    do
    {
        // Clean up the maintenance command. This is needed just in case the UE
        // isolation procedure is modified to use maintenance commands.
        o_rc = cleanupPrevCmd();
        if ( SUCCESS != o_rc )
        {
            PRDF_ERR( PRDF_FUNC"cleanupPrevCmd() failed" );
            break;
        }

        // Look for all failing bits on this rank.
        CenDqBitmap bitmap;
        o_rc = mssIplUeIsolation( iv_mbaTrgt, iv_rank, bitmap );
        if ( SUCCESS != o_rc )
        {
            PRDF_ERR( PRDF_FUNC"mssIplUeIsolation() failed" );
            break;
        }

        // Add UE data to capture data.
        bitmap.getCaptureData( io_sc.service_data->GetCaptureData() );

        // Callout the failing DIMMs.
        TargetHandleList callouts;
        for ( int32_t ps = 0; ps < PORT_SLCT_PER_MBA; ps++ )
        {
            bool badDqs = false;
            o_rc = bitmap.badDqs( ps, badDqs );
            if ( SUCCESS != o_rc )
            {
                PRDF_ERR( PRDF_FUNC"badDqs(%d) failed", ps );
                break;
            }

            if ( !badDqs ) continue; // nothing to do.

            TargetHandleList dimms = getConnectedDimms(iv_mbaTrgt, iv_rank, ps);
            if ( 0 == dimms.size() )
            {
                PRDF_ERR( PRDF_FUNC"getConnectedDimms(%d) failed", ps );
                o_rc = FAIL; break;
            }

            callouts.insert( callouts.end(), dimms.begin(), dimms.end() );

            if ( isMfgCeCheckingEnabled() )
            {
                // As we are doing callout for UE, we dont need to do callout
                // during CE for this rank on given port
                mbadb->getIplCeStats()->banAnalysis( iv_rank, ps );
            }
        }
        if ( SUCCESS != o_rc ) break;

        if ( 0 == callouts.size() )
        {
            // It is possible the scrub counters have rolled over to zero due to
            // a known DD1.0 hardware bug. In this case, the best we can do is
            // callout both DIMMs, because at minimum we know there was a UE, we
            // just don't know where.
            // NOTE: If this condition happens because of a DD2.0+ bug, the
            //       mssIplUeIsolation procedure will callout the Centaur.
            callouts = getConnectedDimms( iv_mbaTrgt, iv_rank );
            if ( 0 == callouts.size() )
            {
                PRDF_ERR( PRDF_FUNC"getConnectedDimms() failed" );
                o_rc = FAIL; break;
            }

            if ( isMfgCeCheckingEnabled() )
            {
                // As we are doing callout for UE, we dont need to do callout
                // during CE for this rank on both port
                mbadb->getIplCeStats()->banAnalysis( iv_rank);
            }
        }

        // Callout all DIMMs in the list.
        for ( TargetHandleList::iterator i = callouts.begin();
              i != callouts.end(); i++ )
        {
            io_sc.service_data->SetCallout( *i, MRU_HIGH );
        }

//.........这里部分代码省略.........

errlHndl_t discoverTargets()
{
    HWAS_INF("discoverTargets entry");
    errlHndl_t errl = NULL;

    //  loop through all the targets and set HWAS_STATE to a known default
    for (TargetIterator target = targetService().begin();
            target != targetService().end();
            ++target)
    {
        HwasState hwasState             = target->getAttr<ATTR_HWAS_STATE>();
        hwasState.deconfiguredByEid     = 0;
        hwasState.poweredOn             = false;
        hwasState.present               = false;
        hwasState.functional            = false;
        hwasState.dumpfunctional        = false;
        target->setAttr<ATTR_HWAS_STATE>(hwasState);
    }

    // Assumptions and actions:
    // CLASS_SYS (exactly 1) - mark as present
    // CLASS_ENC, TYPE_PROC, TYPE_MEMBUF, TYPE_DIMM
    //     (ALL require hardware query) - call platPresenceDetect
    //  \->children: CLASS_* (NONE require hardware query) - mark as present
    do
    {
        // find CLASS_SYS (the top level target)
        Target* pSys;
        targetService().getTopLevelTarget(pSys);

        HWAS_ASSERT(pSys,
                "HWAS discoverTargets: no CLASS_SYS TopLevelTarget found");

        // mark this as present
        enableHwasState(pSys, true, true, 0);
        HWAS_DBG("pSys %.8X - marked present",
            pSys->getAttr<ATTR_HUID>());

        // find list of all we need to call platPresenceDetect against
        PredicateCTM predEnc(CLASS_ENC);
        PredicateCTM predChip(CLASS_CHIP);
        PredicateCTM predDimm(CLASS_LOGICAL_CARD, TYPE_DIMM);
        PredicatePostfixExpr checkExpr;
        checkExpr.push(&predChip).push(&predDimm).Or().push(&predEnc).Or();

        TargetHandleList pCheckPres;
        targetService().getAssociated( pCheckPres, pSys,
            TargetService::CHILD, TargetService::ALL, &checkExpr );

        // pass this list to the hwas platform-specific api where
        // pCheckPres will be modified to only have present targets
        HWAS_DBG("pCheckPres size: %d", pCheckPres.size());
        errl = platPresenceDetect(pCheckPres);
        HWAS_DBG("pCheckPres size: %d", pCheckPres.size());

        if (errl != NULL)
        {
            break; // break out of the do/while so that we can return
        }

        // for each, read their ID/EC level. if that works,
        //  mark them and their descendants as present
        //  read the partialGood vector to determine if any are not functional
        //  and read and store values from the PR keyword

        // list of procs and data that we'll need to look at the PR keyword
        procRestrict_t l_procEntry;
        std::vector <procRestrict_t> l_procPRList;

        // sort the list by ATTR_HUID to ensure that we
        //  start at the same place each time
        std::sort(pCheckPres.begin(), pCheckPres.end(),
                compareTargetHuid);

        for (TargetHandleList::const_iterator pTarget_it = pCheckPres.begin();
                pTarget_it != pCheckPres.end();
                ++pTarget_it
            )
        {
            TargetHandle_t pTarget = *pTarget_it;

            // if CLASS_ENC is still in this list, mark as present
            if (pTarget->getAttr<ATTR_CLASS>() == CLASS_ENC)
            {
                enableHwasState(pTarget, true, true, 0);
                HWAS_DBG("pTarget %.8X - CLASS_ENC marked present",
                    pTarget->getAttr<ATTR_HUID>());

                // on to the next target
                continue;
            }

            bool chipPresent = true;
            bool chipFunctional = true;
            uint32_t errlEid = 0;
            uint16_t pgData[VPD_CP00_PG_DATA_LENGTH / sizeof(uint16_t)];
            bzero(pgData, sizeof(pgData));

            if (pTarget->getAttr<ATTR_CLASS>() == CLASS_CHIP)
            {
//.........这里部分代码省略.........

void Service::processIntrQMsgPreAck(const msg_t & i_msg)
{
    // this function should do as little as possible
    // since the hw can't generate additional interrupts
    // until the msg is acknowledged

    TargetHandle_t proc = NULL;

    INTR::XISR_t xisr;

    xisr.u32 = i_msg.data[0];

    TargetHandleList procs;
    getTargetService().getAllChips(procs, TYPE_PROC);

    TargetHandleList::iterator it = procs.begin();

    // resolve the xisr to a proc target

    while(it != procs.end())
    {
        uint64_t node = 0, chip = 0;

        getTargetService().getAttribute(ATTR_FABRIC_NODE_ID, *it, node);
        getTargetService().getAttribute(ATTR_FABRIC_CHIP_ID, *it, chip);

        if(node == xisr.node
                && chip == xisr.chip)
        {
            proc = *it;
            break;
        }

        ++it;
    }

    uint64_t hostMask = HostMask::host();
    uint64_t nonHostMask = HostMask::nonHost();
    uint64_t data = 0;

    // do the minimum that is required
    // for sending EOI without getting
    // another interrupt.  for host attentions
    // this is clearing the gpio interrupt
    // type status register
    // and for xstp,rec,spcl this is
    // masking the appropriate bit in
    // ipoll mask

    // read the ipoll status register
    // to determine the interrupt was
    // caused by host attn or something
    // else (xstp,rec,spcl)

    errlHndl_t err = getScom(proc, IPOLL_STATUS_REG, data);

    if(err)
    {
        errlCommit(err, ATTN_COMP_ID);

        // assume everything is on

        data = hostMask | nonHostMask;
    }

    if(data & hostMask)
    {
        // if host attention, clear the ITR macro gpio interrupt
        // type status register.

        err = putScom(proc, INTR_TYPE_LCL_ERR_STATUS_AND_REG, 0);

        if(err)
        {
            errlCommit(err, ATTN_COMP_ID);
        }
    }

    if(data & nonHostMask)
    {
        // mask local proc xstp,rec and/or special attns if on.

        // the other thread might be trying to unmask
        // on the same target.  The mutex ensures
        // neither thread corrupts the register.

        mutex_lock(&iv_mutex);

        err = modifyScom(proc, IPOLL::address, data & nonHostMask, SCOM_OR);

        mutex_unlock(&iv_mutex);

        if(err)
        {
            errlCommit(err, ATTN_COMP_ID);
        }
    }
}

errlHndl_t Service::configureInterrupts(
        msg_q_t i_q,
        ConfigureMode i_mode)
{
    errlHndl_t err = NULL;

    // First register for Q
    // This will set up the psi host bridge logic for
    // lcl_err interrupt on all chips

    if(i_mode == UP)
    {
        err = INTR::registerMsgQ(i_q,
                                 ATTENTION,
                                 INTR::ISN_LCL_ERR);
    }

    // setup the ITR macro for GPIO type host attentions,
    // on all procs

    if(!err)
    {
        TargetHandleList procs;
        getTargetService().getAllChips(procs, TYPE_PROC);
        TargetHandleList::iterator it = procs.begin();

        while(it != procs.end())
        {
            uint64_t mask = 0;

            // clear GPIO interrupt type status register

            if(i_mode == UP)
            {
                err = putScom(*it, INTR_TYPE_LCL_ERR_STATUS_AND_REG,
                              0);
            }

            if(err)
            {
                break;
            }

            // unmask GPIO interrupt type

            mask = 0x8000000000000000ull;

            err = putScom(
                    *it,
                    (i_mode == UP
                     ? INTR_TYPE_MASK_AND_REG
                     : INTR_TYPE_MASK_OR_REG),
                    i_mode == UP ? ~mask : mask);

            if(err)
            {
                break;
            }

            // set GPIO interrupt type mode - or

            if(i_mode == UP)
            {
                err = putScom(*it, INTR_TYPE_CONFIG_AND_REG,
                                 ~mask);
            }

            if(err)
            {
                break;
            }

            // enable/disable MCSes

            mask = 0;

            GP1::forEach(~0, &mask, &getPbGp2Mask);

            err = modifyScom(
                             *it,
                             GP2_REG,
                             i_mode == UP ? mask : ~mask,
                             i_mode == UP ? SCOM_OR : SCOM_AND);

            if(err)
            {
                break;
            }

            // enable attentions in ipoll mask

            mask = HostMask::nonHost();
            mask |= HostMask::host();

            // this doesn't have an and/or reg for some reason...

            err = modifyScom(
                    *it,
                    IPOLL::address,
                    i_mode == UP ? ~mask : mask,
//.........这里部分代码省略.........