C++ Opnd类代码示例

void SSABuilder::clearPhiSrcs(Node *node, const StlVectorSet<VarOpnd *> *whatVars)
{
    Inst* phi = (Inst*)node->getSecondInst();
    if (whatVars) {
        for (;phi!=NULL && phi->isPhi(); phi = phi->getNextInst()) {
            Opnd *dstOp = phi->getDst();
            VarOpnd *varOpnd = dstOp->asVarOpnd();
            if (!varOpnd) {
                SsaVarOpnd *ssaOpnd = dstOp->asSsaVarOpnd();
                assert(ssaOpnd);
                varOpnd = ssaOpnd->getVar();
            }
            if (whatVars->has(varOpnd)) {
                PhiInst *phiInst = phi->asPhiInst();
                assert(phiInst);
                phiInst->setNumSrcs(0);
            }
        }
    } else {
        for (;phi!=NULL && phi->isPhi(); phi = phi->getNextInst()) {
            PhiInst *phiInst = phi->asPhiInst();
            assert(phiInst);
            phiInst->setNumSrcs(0);
        }
    }
}

PeepHoleOpt::Changed PeepHoleOpt::handleInst_SSEXor(Inst* inst)
{
    assert(inst->getMnemonic() == Mnemonic_XORPS || 
           inst->getMnemonic() == Mnemonic_XORPD);
           
    if (inst->getOpndCount() != 2) {
        // Expected only XORPS/PD a, b
        assert(false);
        return Changed_Nothing;
    }
    
    Opnd* dst = inst->getOpnd(0);
    Opnd* src = inst->getOpnd(1);
    
    if (isReg(dst) && isReg(src, dst->getRegName())) {
        /*what: XORPS/XORPD regN, regN => PXOR regN, regN
          why: XORPS/PD used for zero-ing register, but PXOR is faster 
               (2 ticks on PXOR vs 4 ticks for XORPS/XORPD)
        */
        // FIXME: replacing operands on 1 instruction only 
        // will fail liveness verification if their refcount > 1
        //dst = convertToXmmReg64(dst);
        //src = convertToXmmReg64(src);
        //Inst* ii = irManager->newInst(Mnemonic_PXOR, dst, src);
        //replaceInst(inst, ii);
        //return Changed_Inst;
    }
    return Changed_Nothing;
}

void PrologEpilogGenerator::saveRestorePreservedGr() {

    opndManager->initSavedBase();                // after this point mem local stack must contain preserved regs only
    IPF_LOG << "    Preserved register saved in memory stack with offset: " << opndManager->savedBase << endl;

    RegBitSet preservGrMask(string("11110000")); // work with r4-r7 only (not with automatic regs r32-r127)
    RegBitSet regMask = usedGrMask & preservGrMask;
    if(regMask.any() == false) return;

    IPF_LOG << "    Preserved grs:";
    for(uint16 i=4; i<8; i++) {
        if(regMask[i] == false) continue;

        Opnd *storage = newStorage(DATA_U64, SITE_STACK);
        Opnd *offset  = opndManager->newImm(storage->getValue());
        Opnd *preserv = opndManager->newRegOpnd(OPND_G_REG, DATA_U64, i);

        saveGrsInsts.push_back(new(mm) Inst(mm, INST_ADDS, p0, stackAddr, offset, sp));
        saveGrsInsts.push_back(new(mm) Inst(mm, INST_ST8_SPILL, p0, stackAddr, preserv));
        restGrsInsts.push_back(new(mm) Inst(mm, INST_ADDS, p0, stackAddr, offset, sp));
        restGrsInsts.push_back(new(mm) Inst(mm, INST_LD8_FILL, p0, preserv, stackAddr));

        IPF_LOG << " " << IrPrinter::toString(preserv);
    }
    IPF_LOG << endl;
    opndManager->savedGrMask = regMask.to_ulong();
}

void PrologEpilogGenerator::saveRestorePreservedBr() {

    RegBitSet regMask = usedBrMask & opndManager->preservBrMask;
    if(regMask.any() == false) return;

    IPF_LOG << "    Preserved brs:";
    for(uint16 i=1; i<6; i++) {
        if(regMask[i] == false) continue;

        Opnd *storage  = newStorage(DATA_B, SITE_STACK);
        Opnd *offset   = opndManager->newImm(storage->getValue());
        Opnd *scratch  = opndManager->newRegOpnd(OPND_G_REG, DATA_B, SPILL_REG2);
        Opnd *preserv  = opndManager->newRegOpnd(OPND_B_REG, DATA_B, i);
        
        saveBrsInsts.push_back(new(mm) Inst(mm, INST_MOV, p0, scratch, preserv));
        saveBrsInsts.push_back(new(mm) Inst(mm, INST_ADDS, p0, stackAddr, offset, sp));
        saveBrsInsts.push_back(new(mm) Inst(mm, INST_ST, CMPLT_SZ_8, p0, stackAddr, scratch));

        restBrsInsts.push_back(new(mm) Inst(mm, INST_ADDS, p0, stackAddr, offset, sp));
        restBrsInsts.push_back(new(mm) Inst(mm, INST_LD, CMPLT_SZ_8, p0, scratch, stackAddr));
        restBrsInsts.push_back(new(mm) Inst(mm, INST_MOV, p0, preserv, scratch));
        IPF_LOG << " " << IrPrinter::toString(preserv);
    }
    IPF_LOG << endl;
    opndManager->savedBrMask = regMask.to_ulong();
}

void SSABuilder::deconvertSSA(ControlFlowGraph* fg,OpndManager& opndManager) {
    const Nodes& nodes = fg->getNodes();
    Nodes::const_iterator niter;
    for(niter = nodes.begin(); niter != nodes.end(); ++niter) {
        Node* node = *niter;
        Inst *headInst = (Inst*)node->getFirstInst();
        for (Inst *inst = headInst->getNextInst(); inst != NULL; ) {
            Inst *nextInst = inst->getNextInst();
            if (inst->isPhi()) {
                inst->unlink();
            } else {
                for (U_32 i = 0; i < inst->getNumSrcOperands(); i++) {
                    Opnd *opnd = inst->getSrc(i);
                    if (opnd->isSsaVarOpnd()) {
                        SsaVarOpnd *ssa = (SsaVarOpnd *)opnd;
                        VarOpnd *var = ssa->getVar();
                        inst->setSrc(i,var);
                    } else if (opnd->isVarOpnd()) {
                    }
                }
                Opnd *dst = inst->getDst();
                if (dst->isSsaVarOpnd()) {
                    SsaVarOpnd *ssa = (SsaVarOpnd *)dst;
                    inst->setDst(ssa->getVar()); 
                } 
            }
            inst = nextInst;
        }
    }
}

/**
 * Checks if Op_TauStInd (stind) instruction has a side effect.
 * @param inst - checked instruction
 * @return <code>true</code> if an instruction has side effect;
 *         <code>false<code> if an instruction has no side effect.
 */
bool
LazyExceptionOpt::fieldUsageHasSideEffect(Inst* inst) {
    Opnd* insOp = inst->getSrc(0);
    Inst* instDef = insOp->getInst();
    if (instDef->getOpcode() == Op_DefArg) {
#ifdef _DEBUG
        if (Log::isEnabled()) {
            Log::out() << "    fieldUsageHasSideEffect: ";
            inst->print(Log::out());
            Log::out()  << std::endl;
            Log::out() << "    fieldUsageHasSideEffect: ";
            instDef->print(Log::out());
            Log::out()  << std::endl;
            Log::out() << "    fieldUsageHasSideEffect: ";
            Log::out() << (int)(instDef->getDefArgModifier()) << " " <<
                       (instDef->getDefArgModifier()==DefArgNoModifier) << " " <<
                       (instDef->getDefArgModifier()==NonNullThisArg) << " " <<
                       (instDef->getDefArgModifier()==DefArgBothModifiers) << std::endl;
        }
#endif
        if (instDef->getDefArgModifier()==NonNullThisArg && isExceptionInit)
            return false;
    }
    return true;
}

bool Opnd::isImm(int size) {

    if (isImm() == false) return false;
    
    Opnd* imm = (Opnd*) this;
    if (Opnd::isFoldableImm(imm->getValue(), size)) return true;
    return false;
}

Opnd* OpndUtils::findImmediateSource(Opnd* opnd) 
{
    Opnd* res = opnd;
    while (!res->isPlacedIn(OpndKind_Imm)) {
        Inst* defInst = res->getDefiningInst();
        if (!defInst || defInst->getMnemonic()!=Mnemonic_MOV) {
            return NULL;
        }
        res = defInst->getOpnd(1);
    }
    return res;
}

void Opnd::normalizeMemSubOpnds(void)
{
    if (!isPlacedIn(OpndKind_Mem)) {
        return;
    }
    Opnd* base = getMemOpndSubOpnd(MemOpndSubOpndKind_Base);
    Opnd* disp = getMemOpndSubOpnd(MemOpndSubOpndKind_Displacement);
    if (base != NULL && base->isPlacedIn(OpndKind_Imm)) {
        assert(disp == NULL || !disp->isPlacedIn(OpndKind_Imm) || base->getType()->isNullObject());
        setMemOpndSubOpnd(MemOpndSubOpndKind_Displacement, base);
        // can't call setMemOpndSubOpnd() as it fights against zero opnd.
        memOpndSubOpnds[MemOpndSubOpndKind_Base] = disp; //==setMemOpndSubOpnd(MemOpndSubOpndKind_Base, disp);
    }
}

void IpfCfgCodeSelector::genSwitchEdges(U_32  tailNodeId, 
                                        U_32  numTargets, 
                                        U_32 *targets, 
                                        double *probs, 
                                        U_32  defaultTarget) {

    BbNode         *tailNode       = (BbNode *)nodes[tailNodeId];
    InstVector     &insts          = tailNode->getInsts();
    Inst           *switchInst     = insts.back();
    Opnd           *defTargetImm   =                   switchInst->getOpnd(POS_SWITCH_DEFAULT);
    ConstantRef    *constantRef    = (ConstantRef *)   switchInst->getOpnd(POS_SWITCH_TABLE);
    SwitchConstant *switchConstant = (SwitchConstant *)constantRef->getConstant();
    Edge           *defedge        = NULL;
    Edge           *edge           = NULL;

    bool   defadded = false;
    U_32 i        = 0;

    IPF_LOG << "    Generate Switch     tailNodeId=" << tailNodeId 
        << "; defaultTarget=" << defaultTarget << endl;

    defedge = new(mm) Edge(nodes[tailNodeId], nodes[defaultTarget], probs[defaultTarget], EDGE_BRANCH);
    defedge->insert();

    for(i=0; i<numTargets; i++) {
        if(targets[i] == defaultTarget) {
            defTargetImm->setValue(i);
            switchConstant->addEdge(defedge);
            defadded = true;
            IPF_LOG << "        default: " << i << endl;
            continue;
        }
        IPF_LOG << "        case " << i << ": " << targets[i] << endl;
        edge = new(mm) Edge(nodes[tailNodeId], nodes[targets[i]], probs[i], EDGE_BRANCH);
        edge->insert();
        switchConstant->addEdge(edge);
    }

    if (!defadded) {
        defTargetImm->setValue(i);
        switchConstant->addEdge(defedge);
        defadded = true;
        IPF_LOG << "        default: " << i << endl;
    }
}

const void* OpndUtils::extractAddrOfConst(const Opnd* op)
{
    if (op->getMemOpndKind() != MemOpndKind_ConstantArea) {
        return NULL;
    }
    // Actually, it's currently only works for IA-32 - I expect 
    // the address of constant completely in the displacement.
    // On Intel64, the address already get loaded into a register, 
    // so more complicated analysis needed to find the proper constant
    Opnd* disp = op->getMemOpndSubOpnd(MemOpndSubOpndKind_Displacement);
    if (disp == NULL) {
        // Perhaps, it's IA-32?
        return NULL;
    }
    
    Opnd::RuntimeInfo* rtInfo = disp->getRuntimeInfo();
    assert(rtInfo != NULL);
    assert(rtInfo->getKind() == Opnd::RuntimeInfo::Kind_ConstantAreaItem);
    ConstantAreaItem* item = (ConstantAreaItem*)rtInfo->getValue(0);
    // At this point we must have the address...
    assert(item->getValue()!= NULL);
    return item->getValue();
}

//All CALL insts except some special helpers that never cause stacktrace printing
bool InstUtils::instMustHaveBCMapping(Inst* inst) {
    if (!inst->hasKind(Inst::Kind_CallInst)) {
        return false;
    }
    CallInst* callInst = (CallInst*)inst;
    Opnd * targetOpnd=callInst->getOpnd(callInst->getTargetOpndIndex());
    Opnd* immOpnd = OpndUtils::findImmediateSource(targetOpnd);
    Opnd::RuntimeInfo * ri = immOpnd ? immOpnd->getRuntimeInfo() : NULL;
    if(!ri) {
        return true;
    } else if (ri->getKind() == Opnd::RuntimeInfo::Kind_InternalHelperAddress) { 
        return false;
    } else if (ri->getKind() == Opnd::RuntimeInfo::Kind_HelperAddress) { 
        VM_RT_SUPPORT helperId = (VM_RT_SUPPORT)(POINTER_SIZE_INT)ri->getValue(0);
        switch (helperId) {
            case VM_RT_GC_GET_TLS_BASE:
            case VM_RT_GC_SAFE_POINT:
                return false;
            default:
                break;
        }
    }
    return true;
}

 void applyToInst(Inst *inst) {
     if (inst->getOpcode() == Op_Phi) {
         // we should just delete the whole thing.
         Opnd *dstOpnd = inst->getDst();
         
         if (dstOpnd->isSsaVarOpnd()) {
             SsaVarOpnd *ssaOpnd = dstOpnd->asSsaVarOpnd();
             VarOpnd *var = ssaOpnd->getVar();
             if (usedOutOfSsa.has(var)) {
                 // remove instruction
                 inst->unlink();
                 return;
             }
         } else if (dstOpnd->isVarOpnd()) {
             VarOpnd *var = dstOpnd->asVarOpnd();
             if (usedOutOfSsa.has(var)) {
                 // remove instruction
                 inst->unlink();
                 return;
             }
         }
     }
     U_32 numSrcs = inst->getNumSrcOperands();
     for (U_32 i=0; i<numSrcs; ++i) {
         Opnd *thisOpnd = inst->getSrc(i);
         VarOpnd *varOpnd = needToDeSsaOpnd(thisOpnd);
         if (varOpnd) {
             inst->setSrc(i, varOpnd);
         }
     }
     Opnd *dstOpnd = inst->getDst();
     VarOpnd *varDstOpnd = needToDeSsaOpnd(dstOpnd);
     if (varDstOpnd) {
         inst->setDst(varDstOpnd);
     }
 }

PeepHoleOpt::Changed PeepHoleOpt::handleInst(Inst* inst)
{
    PeepHoleOpt::Changed temp;

    // Local propagation
    Inst::Opnds opnds(inst, Inst::OpndRole_All);
    
    for (Inst::Opnds::iterator it=opnds.begin();it != opnds.end();it = opnds.next(it)) {
        Opnd * opnd=inst->getOpnd(it);
        U_32 roles=inst->getOpndRoles(it);
                
        if (roles & Inst::OpndRole_Use) {
            if ((roles & Inst::OpndRole_All & Inst::OpndRole_FromEncoder) 
                && (roles & Inst::OpndRole_All & Inst::OpndRole_ForIterator)
                && (roles & Inst::OpndRole_Changeable) && ((roles & Inst::OpndRole_Def) == 0)
                && copyMap->has(opnd)) {
                if (opnd->getType()->isUnmanagedPtr() && (*copyMap)[opnd]->getType()->isInteger())
                    (*copyMap)[opnd]->setType(opnd->getType());
                inst->setOpnd(it, (*copyMap)[opnd]);
            }
        }
    }

    for (Inst::Opnds::iterator it = opnds.begin();it != opnds.end();it = opnds.next(it)) {
        Opnd * opnd=inst->getOpnd(it);
        U_32 roles=inst->getOpndRoles(it);

        if (roles & Inst::OpndRole_Def) {
            if (copyMap->has(opnd)) {
            	if (Log::isEnabled()) Log::out()<<"copy relation DELETED: " << opnd->getFirstId() << "<=" << (*copyMap)[opnd]->getFirstId() <<std::endl;
                copyMap->erase(opnd);
            }

            tempSet->clear();
            for(StlHashMap<Opnd*, Opnd*>::iterator iter=copyMap->begin();
                iter!=copyMap->end();++iter)
                if (iter->second == opnd) {
                    if (Log::isEnabled()) Log::out()<<"copy relation DELETED: " << iter->first->getFirstId() << "<=" << iter->second->getFirstId() <<std::endl;
                    tempSet->insert(iter->first);
                }
            for(StlSet<Opnd*>::iterator iter=tempSet->begin();
                iter!=tempSet->end();++iter)
                copyMap->erase(*iter);
        }
    }

    if (inst->getMnemonic() == Mnemonic_MOV) {
        Inst::Opnds opnds(inst, Inst::OpndRole_All);
        Opnd * dst = NULL;
        Opnd * src = NULL;
        U_32 counterDef = 0;
        U_32 counterUse = 0;

        for (Inst::Opnds::iterator it=opnds.begin();it!=opnds.end();it=opnds.next(it)) {
            Opnd * opnd = inst->getOpnd(it);
            U_32 roles = inst->getOpndRoles(it);
                    
            if (roles & Inst::OpndRole_Def) {
                counterDef++;
                dst = opnd;
            } else if (roles & Inst::OpndRole_Use) {
                counterUse++;
                src = opnd;
            }
        }

        if ((counterDef == 1) && (counterUse == 1) && (!dst->hasAssignedPhysicalLocation())) {
            bool kindsAreOk = true;
            if(src->canBePlacedIn(OpndKind_FPReg) || dst->canBePlacedIn(OpndKind_FPReg)) {
                Constraint srcConstr = src->getConstraint(Opnd::ConstraintKind_Calculated);
                Constraint dstConstr = dst->getConstraint(Opnd::ConstraintKind_Calculated);
                kindsAreOk = ! (srcConstr&dstConstr).isNull();
            }
            bool typeConvOk = src->getSize() == dst->getSize() && isTypeConversionAllowed(src, dst);
            if (typeConvOk && kindsAreOk && ! src->isPlacedIn(OpndKind_Reg)) {
                if (copyMap->has(src)) {
                    (*copyMap)[dst] = (*copyMap)[src];
                    if (Log::isEnabled()) Log::out()<<"copy relation INSERTED: " << dst->getFirstId() << "<=" << (*copyMap)[src]->getFirstId() <<std::endl;
                } else {
                    (*copyMap)[dst] = src;
                    if (Log::isEnabled()) Log::out()<<"copy relation INSERTED: " << dst->getFirstId() << "<=" << src->getFirstId() <<std::endl;
                }
            }
        }
    }
            
    if (inst->hasKind(Inst::Kind_PseudoInst) && inst->getKind() != Inst::Kind_CopyPseudoInst) {
        return Changed_Nothing;
    }

    Mnemonic mnemonic = inst->getMnemonic();
    switch(mnemonic) {
    case Mnemonic_MOV:
        return handleInst_MOV(inst);
    case Mnemonic_CALL:
        return handleInst_Call(inst);
    case Mnemonic_ADD:
    case Mnemonic_ADC:
    case Mnemonic_SUB:
    case Mnemonic_SBB:
//.........这里部分代码省略.........

static void doUnroll(MemoryManager& mm, IRManager& irm, const LoopUnrollInfo* info, const UnrollFlags& flags) {
    //unroll algorithm does the following
    //before:
    // loopOrig {
    //    bodyA
    //    check(idxOpnd,limitOpnd)
    //    bodyB
    // }
    //after:
    // unrolledIncOpnd = unrollCount * idx->increment
    // unrolledLimitOpnd = limitOpnd-unrolledIncOpnd;
    // bodyA 
    // loopUnrolled {
    //     check(idxOpnd,unrolledLimitOpnd)
    //     bodyB
    //     bodyA
    //     bodyB
    //     ...
    //     bodyA
    // }
    // loopEpilogue {
    //    check(idxOpnd,limitOpnd)
    //    bodyB
    //    bodyA
    // }
    //
    //where:
    // bodyA - all nodes of the same loop accessible from checkNode via incoming edges
    // bodyB - all nodes except bodyA and checkNode

    ControlFlowGraph& cfg = irm.getFlowGraph();
    LoopTree* lt = cfg.getLoopTree();
    InstFactory& instFactory = irm.getInstFactory();
    OpndManager& opndManager = irm.getOpndManager();
    Type* opType = info->getLimitOpnd()->getType();
    
 //   printf("UNROLL\n");

    //STEP 0: cache all data needed
    assert(info->unrollCount >= 1);
    Node* origHeader = info->header;
    assert(origHeader->getInDegree() == 2); //loop is normalized

    OptPass::computeLoops(irm);//recompute loop info if needed
    LoopNode* loopNode = lt->getLoopNode(origHeader, false); 
    
    Edge* entryEdge = origHeader->getInEdges().front();
    if (lt->isBackEdge(entryEdge)) {
        entryEdge = origHeader->getInEdges().back();
    }
    Node* origCheckNode = info->branchInst->getNode();
    Edge* origLoopExitEdge = info->branchTargetIsExit ? origCheckNode->getTrueEdge() : origCheckNode->getFalseEdge();
    
    U_32 maxNodeId = cfg.getMaxNodeId()+1; //+1 for a split check node
    StlBitVector nodesInLoop(mm, maxNodeId);
    {
        const Nodes& loopNodes = loopNode->getNodesInLoop();
        for (Nodes::const_iterator it = loopNodes.begin(), end = loopNodes.end(); it!=end; ++it) {
            Node* node = *it;
            nodesInLoop.setBit(node->getId());
        }
    }
    
    
    //STEP 1: calculate bodyA nodes
    BitSet aFlags(mm, maxNodeId);
    calculateReachableNodesInLoop(loopNode, origHeader, origCheckNode, aFlags);
    StlBitVector bodyANodes(mm, maxNodeId);
    for (U_32 i=0;i<maxNodeId;i++) bodyANodes.setBit(i, aFlags.getBit(i));
    
    //STEP 2: make checkNode a separate node, prepare loop region
    bodyANodes.setBit(origCheckNode->getId(), true);
    Node* checkNode = cfg.splitNodeAtInstruction(info->branchInst->prev(), true, false, instFactory.makeLabel());
    nodesInLoop.setBit(checkNode->getId(), true);
    Node* preCheckNode = origCheckNode;
    bodyANodes.setBit(preCheckNode->getId(), true);
    
    //STEP 3: rotate original loop
    // before: {bodyA1, check , bodyB}
    // after:  bodyA2 {check, bodyB, bodyA1}
    Edge* bodyA2ToCheckEdge = NULL;
    Opnd* limitOpndInBodyA2 = NULL;
    {
        //WARN: info->limitOpnd and info->indexOpnd can be replaced after code duplication if promoted to vars
        Opnd* limitOpndBefore = info->getLimitOpnd();

        assert(preCheckNode->getOutDegree()==1 && preCheckNode->getUnconditionalEdgeTarget() == checkNode);
        DefUseBuilder defUses(mm);
        defUses.initialize(cfg);
        OpndRenameTable opndRenameTable(mm, maxNodeId); //todo: maxNodeId is overkill estimate here
        NodeRenameTable nodeRenameTable(mm, maxNodeId);
        Node* bodyA2 = FlowGraph::duplicateRegion(irm, origHeader, bodyANodes, defUses, nodeRenameTable, opndRenameTable);
        cfg.replaceEdgeTarget(entryEdge, bodyA2, true);
        
        // while duplicating a region new nodes could be created and 'nodesInRegion' bitvector param is updated. 
        // BodyA is part of the loop -> if new nodes were created in the loop we must track them.
        nodesInLoop.resize(bodyANodes.size());
        for (U_32 i=0;i<bodyANodes.size();i++) nodesInLoop.setBit(i, bodyANodes.getBit(i) || nodesInLoop.getBit(i));

        Node* bodyA2PreCheckNode = nodeRenameTable.getMapping(preCheckNode);
//.........这里部分代码省略.........