C++ MemoryMap类代码示例

    TEST_FIXTURE(MemoryMapTestFixture, CreateWriteRead)
    {
        if (!fileName.isEmpty()) {

            fs::remove(fileName.getString());

            {
                vector<uint8_t> data(length);
                for (size_t i = 0; i < length; ++i) {
                    data[i] = uint8_t(i%256);
                }
            
                File fwrite(fileName.getString(), File::Write|File::Create);
                CHECK(fwrite.isOk());
                CHECK(fwrite.write(&data[0], length));
            }
        
            {
                File file(fileName.getString(), File::Read);
                MemoryMap mread;
                CHECK(mread.map(file.getDescriptor(), length, MemoryMap::Read, MemoryMap::Private));
                uint8_t *data = static_cast<uint8_t *>(mread.getMemory());
                for (size_t i = 0; i < length; ++i) {
                    CHECK_EQUAL(uint8_t(i%256), data[i]);
                }
            }
        }
    }

Partitioner::RegionStats *
Partitioner::region_statistics()
{
    MemoryMap mymap = *map;
    mymap.prune(MemoryMap::MM_PROT_EXEC);
    return region_statistics(mymap.va_extents());
}

int main(int argc, char *argv[]) {
    Diagnostics::initialize();
    mlog = Sawyer::Message::Facility("tool", Diagnostics::destination);
    Diagnostics::mfacilities.insertAndAdjust(mlog);

    // Parse command line
    Settings settings;
    std::vector<std::string> args = parseCommandLine(argc, argv, settings).unreachedArgs();
    if (args.size()!=2)
        throw std::runtime_error("invalid usage; see --help");

    // Load the CSV files
    FunctionByAddress code1, data1, code2, data2;
    readCsvFile(args[0], code1 /*out*/, data1 /*out*/);
    readCsvFile(args[1], code2 /*out*/, data2 /*out*/);

    showStats(FileSystem::Path(args[0]).filename().string(), code1, data1,
              FileSystem::Path(args[1]).filename().string(), code2, data2);
    std::cout <<"\n";

    // Parse the specimen
    if (!settings.specimenName.empty()) {
        P2::Engine engine;
        MemoryMap map = engine.loadSpecimens(settings.specimenName);
        InstructionProvider::Ptr insns = InstructionProvider::instance(engine.obtainDisassembler(), map);
        map.dump(std::cout);
        listInstructions(insns, map, code1, code2);
    }
}

int main(int argc, char *argv[]) {
    Diagnostics::initialize();
    ::mlog = Diagnostics::Facility("tool", Diagnostics::destination);
    Diagnostics::mfacilities.insertAndAdjust(::mlog);

    // Parse the command-line
    Partitioner2::Engine engine;
    std::vector<std::string> specimenNames = parseCommandLine(argc, argv, engine);
    if (specimenNames.empty())
        throw std::runtime_error("no specimen specified; see --help");

    // Load specimen into memory
    MemoryMap map = engine.loadSpecimens(specimenNames);

    // Configure instruction semantics
    Partitioner2::Partitioner partitioner = engine.createPartitioner();
    Disassembler *disassembler = engine.obtainDisassembler();
    const RegisterDictionary *regdict = disassembler->get_registers();
    if (disassembler->dispatcher() == NULL)
        throw std::runtime_error("no instruction semantics for this architecture");    
    BaseSemantics::RiscOperatorsPtr ops = InstructionSemantics2::ConcreteSemantics::RiscOperators::instance(regdict);
    BaseSemantics::DispatcherPtr cpu = disassembler->dispatcher()->create(ops);
    ConcreteSemantics::MemoryState::promote(ops->currentState()->memoryState())->memoryMap(map);

    // Find starting address
    rose_addr_t va = 0;
    if (settings.startVa) {
        va = *settings.startVa;
    } else if (engine.isaName() == "coldfire") {
        // Use the interrupt vector to initialize the stack pointer and instruction pointer.
        uint32_t sp, ip;
        if (4 != map.at(0).limit(4).read((uint8_t*)&sp).size())
            throw std::runtime_error("cannot read stack pointer at address 0x00000000");
        ops->writeRegister(disassembler->stackPointerRegister(), ops->number_(32, ByteOrder::be_to_host(sp)));
        if (4 != map.at(4).limit(4).read((uint8_t*)&ip).size())
            throw std::runtime_error("cannot read instruction pointer at address 0x00000004");
        va = ByteOrder::be_to_host(ip);
    } else if (!map.atOrAfter(0).require(MemoryMap::EXECUTABLE).next().assignTo(va)) {
        throw std::runtime_error("no starting address specified and none marked executable");
    }
    ops->writeRegister(disassembler->instructionPointerRegister(), ops->number_(32, va));

    // Execute
    map.dump(::mlog[INFO]);
    while (1) {
        va = ops->readRegister(disassembler->instructionPointerRegister())->get_number();
        SgAsmInstruction *insn = partitioner.instructionProvider()[va];
        SAWYER_MESG(::mlog[TRACE]) <<unparseInstructionWithAddress(insn, NULL, regdict) <<"\n";
        try {
            cpu->processInstruction(insn);
        } catch (const BaseSemantics::Exception &e) {
            ::mlog[WARN] <<e <<"\n";
        }
    }

    // std::cout <<"Final state:\n";
    // std::cout <<*ops->currentState();
}

static void
listInstructions(const InstructionProvider::Ptr &insns, const MemoryMap &map,
                 const FunctionByAddress &code1, FunctionByAddress &code2) {
    std::ostream &out = std::cout;
    static const size_t insnWidth = 110;
    rose_addr_t va1 = code1.hull().least();
    rose_addr_t va2 = code2.hull().least();
    rose_addr_t va = std::min(va1, va2);
    rose_addr_t expectedVa = va;
    AsmUnparser unparser;

    while (va<=code1.hull().greatest() || va<=code2.hull().greatest()) {
        // Address and contents
        if (va != expectedVa)
            out <<"\n";                                 // visual cue that addresses are not sequential here
        std::ostringstream ss;
        size_t size;
        if (!map.at(va).require(MemoryMap::EXECUTABLE).exists()) {
            ss <<StringUtility::addrToString(va) <<": " <<(map.at(va).exists() ? "not executable" : "not mapped");
            size = 1;
        } else if (SgAsmInstruction *insn = (*insns)[va]) {
            unparser.unparse(ss, insn);
            size = insn->get_size();
        } else {
            ss <<StringUtility::addrToString(va) <<": bad instruction";
            size = 1;
        }
        std::vector<std::string> lines = StringUtility::split('\n', ss.str());
        while (lines.size()>0 && lines[lines.size()-1]=="")
            lines.pop_back();
        for (size_t i=0; i<lines.size(); ++i) {
            if (i+1 < lines.size()) {
                out <<lines[i] <<"\n";
            } else {
                out <<std::setw(insnWidth) <<std::left <<lines[i];
            }
        }
        
        // Functions owning
        Sawyer::Optional<rose_addr_t> f1 = code1.getOptional(va);
        Sawyer::Optional<rose_addr_t> f2 = code2.getOptional(va);
        out <<"\t" <<std::setw(10) <<std::left <<(f1 ? StringUtility::addrToString(*f1) : std::string("none"));
        out <<"\t" <<std::setw(10) <<std::left <<(f2 ? StringUtility::addrToString(*f2) : std::string("none"));
        out <<" " <<(f1.isEqual(f2) ? "" : "<---") <<"\n";

        // Advance address pointer
        rose_addr_t next = va + size;
        expectedVa = next;
        FunctionByAddress::ConstIntervalIterator i1 = code1.upperBound(va);
        if (i1!=code1.nodes().end() && i1->least() < next)
            next = i1->least();
        FunctionByAddress::ConstIntervalIterator i2 = code2.upperBound(va);
        if (i2!=code2.nodes().end() && i2->least() < next)
            next = i2->least();
        if (!map.atOrAfter(next).next().assignTo(va))
            break;
    }
}

int
main(int argc, char *argv[])
{
    // Parse command-line
    int argno=1;
    for (/*void*/; argno<argc && '-'==argv[argno][0]; ++argno) {
        if (!strcmp(argv[argno], "--")) {
            ++argno;
            break;
        } else {
            std::cerr <<argv[0] <<": unrecognized switch: " <<argv[argno] <<"\n";
            exit(1);
        }
    }
    if (argno+1!=argc) {
        std::cerr <<"usage: " <<argv[0] <<" [SWITCHES] [--] SPECIMEN\n";
        exit(1);
    }
    std::string specimen_name = argv[argno++];

    // Open the file
    rose_addr_t start_va = 0;
    MemoryMap map;
    size_t file_size = map.insertFile(specimen_name, start_va);
    map.at(start_va).limit(file_size).changeAccess(MemoryMap::EXECUTABLE, 0);

    // Try to disassemble every byte, and print the CALL/FARCALL targets
    InstructionMap insns;
    size_t nerrors=0;
    Disassembler *disassembler = new DisassemblerX86(4);
    for (rose_addr_t offset=0; offset<file_size; ++offset) {
        try {
            rose_addr_t insn_va = start_va + offset;
            if (SgAsmX86Instruction *insn = isSgAsmX86Instruction(disassembler->disassembleOne(&map, insn_va)))
                insns[insn_va] = insn;
        } catch (const Disassembler::Exception &e) {
            ++nerrors;
        }
    }

    // Partition those instructions into basic blocks and functions
    Partitioner partitioner;
    SgAsmBlock *gblock = partitioner.partition(NULL, insns, &map);

    // Print addresses of functions
    struct T1: AstSimpleProcessing {
        void visit(SgNode *node) {
            if (SgAsmFunction *func = isSgAsmFunction(node))
                std::cout <<StringUtility::addrToString(func->get_entry_va()) <<"\n";
        }
    };
    T1().traverse(gblock, preorder);

    std::cerr <<specimen_name <<": " <<insns.size() <<" instructions; " <<nerrors <<" errors\n";
    return 0;
}

TEST(MemoryMap, Values)
{
    const size_t NUM_BANKS = 11;
    const size_t BANK_SIZE = 17;
    MemoryMap<uint8_t> memMap;
    for (size_t ii = 0; ii < NUM_BANKS; ++ii)
    {
        std::shared_ptr<RAM<uint8_t> > bank(new RAM<uint8_t>(BANK_SIZE));
        memMap.setMemoryBank(ii * BANK_SIZE, bank);
    }
    memMap.lockLookUpTable();

    for (size_t ii = 0; ii < NUM_BANKS * BANK_SIZE; ++ii)
    {
        memMap.writeWord(ii, ii);
    }

    for (size_t ii = 0; ii < NUM_BANKS * BANK_SIZE; ++ii)
    {
        EXPECT_EQ(ii, memMap.readWord(ii));
    }

    // Test a few long values
    EXPECT_EQ(static_cast<uint16_t>(0x0201), memMap.readLong(1));
    EXPECT_EQ(static_cast<uint16_t>(0x0302), memMap.readLong(2));
    EXPECT_EQ(static_cast<uint16_t>(0x0908), memMap.readLong(8));
    EXPECT_EQ(static_cast<uint16_t>(0x0B0A), memMap.readLong(10));
    EXPECT_EQ(static_cast<uint16_t>(0x0C0B), memMap.readLong(11));
    EXPECT_EQ(static_cast<uint16_t>(0x0D0C), memMap.readLong(12));
    EXPECT_EQ(static_cast<uint16_t>(0x0E0D), memMap.readLong(13));
}

// class method
rose_addr_t
SRecord::load(const std::vector<SRecord> &srecs, MemoryMap &map, bool createSegments, unsigned accessPerms)
{
    if (createSegments) {
        // We want to minimize the number of buffers in the map, so the first step is to discover what addresses are covered by
        // the data S-records
        Sawyer::Container::IntervalSet<AddressInterval> addressesUsed;
        BOOST_FOREACH (const SRecord &srec, srecs) {
            switch (srec.type()) {
                case SREC_DATA16:
                case SREC_DATA24:
                case SREC_DATA32:
                    addressesUsed.insert(AddressInterval::baseSize(srec.address(), srec.data().size()));
                    break;
                default:
                    break;
            }
        }

        // Create buffers for the data and insert them into the memory map
        BOOST_FOREACH (const AddressInterval &interval, addressesUsed.intervals()) {
            ASSERT_forbid(interval.isWhole());              // not practically possible since S-Record file would be >2^65 bytes
            map.insert(interval, MemoryMap::Segment::anonymousInstance(interval.size(), accessPerms, "S-Records"));
        }
    }

    // Populate the map by writing the S-Record data into it.
    rose_addr_t startingAddr = 0;
    BOOST_FOREACH (const SRecord &srec, srecs) {
        switch (srec.type()) {
            case SREC_DATA16:
            case SREC_DATA24:
            case SREC_DATA32: {
                if (!srec.data().empty()) {
                    size_t nwritten = map.at(srec.address()).write(srec.data()).size();
                    if (nwritten != srec.data().size())
                        throw MemoryMap::NotMapped("S-Record destination is not mapped for " +
                                                   StringUtility::plural(srec.data().size(), "bytes"),
                                                   &map, srec.address());
                }
                break;
            }
            case SREC_START16:
            case SREC_START24:
            case SREC_START32:
                startingAddr = srec.address();
                break;
            default:
                break;
        }
    }
    return startingAddr;
}

VirtualAddressRange
findFreeVirtualAddressInRange(VirtualAddressRange range,
                              uint32_t size,
                              uint32_t align)
{
   return sMemoryMap.findFreeVirtualAddressInRange(range, size, align);
}

std::string
MagicNumber::identify(const MemoryMap &map, rose_addr_t va) const {
    uint8_t buf[256];
    size_t nBytes = map.at(va).limit(std::min(maxBytes_, sizeof buf)).read(buf).size();
    if (0==nBytes)
        return "empty";
#ifdef ROSE_HAVE_LIBMAGIC
    return magic_buffer(details_->cookie, buf, nBytes);
#elif defined(BOOST_WINDOWS)
    throw std::runtime_error("magic number identification is not supported on Microsoft Windows");
#elif BOOST_FILESYSTEM_VERSION == 2
    throw std::runtime_error("MagicNumber::identify must have either libmagic or boost::filesystem version 3");
#else
    // We can maybe still do it, but this will be much, much slower.  We copy some specimen memory into a temporary file, then
    // run the unix file(1) command on it, then delete the temp file.
    static int ncalls = 0;
    if (1 == ++ncalls)
        mlog[WARN] <<"libmagic is not available on this system; using slow method instead\n";
    FileSystem::Path tmpFile = boost::filesystem::unique_path("/tmp/ROSE-%%%%-%%%%-%%%%-%%%%");
    std::ofstream(tmpFile.c_str()).write((const char*)buf, nBytes);
    std::string cmd = "file " + tmpFile.string();
    std::string magic;
    if (FILE *f = popen(cmd.c_str(), "r")) {
        char line[1024];
        if (fgets(line, sizeof line, f))
            magic = boost::trim_right_copy(std::string(line).substr(tmpFile.string().size()+2)); // filename + ": "
        pclose(f);
    } else {
        boost::filesystem::remove(tmpFile);
        throw std::runtime_error("command file: " + tmpFile.string());
    }
    boost::filesystem::remove(tmpFile);
    return magic;
#endif
}

	virtual void populateCache(const Fingerprint &fileId, const DenseDataPtr &respondData) {
		{
			MemoryMap::write_iterator writer(mData);
			if (mData.alloc(respondData->length(), writer)) {
				bool newentry = writer.insert(fileId, respondData->length());
				if (newentry) {
					SILOG(transfer,debug,fileId << " created " << *respondData);
					CacheData *cdata = new CacheData;
					*writer = cdata;
					cdata->mSparse.addValidData(respondData);
					writer.use();
				} else {
					CacheData *cdata = static_cast<CacheData*>(*writer);
					cdata->mSparse.addValidData(respondData);
                    if (SILOGP(transfer,debug)) {
                        SILOGNOCR(transfer,debug,fileId << " already exists: ");
                        std::stringstream rangeListStream;
                        Range::printRangeList(rangeListStream,cdata->mSparse, (Range)(*respondData));
                        SILOGNOCR(transfer,debug,rangeListStream.str());
                    }
					writer.update(cdata->mSparse.getSpaceUsed());
				}

			}
		}
		CacheLayer::populateParentCaches(fileId, respondData);
	}

int
main(int argc, char *argv[])
{
    // Parse command-line
    int argno=1;
    for (/*void*/; argno<argc && '-'==argv[argno][0]; ++argno) {
        if (!strcmp(argv[argno], "--")) {
            ++argno;
            break;
        } else {
            std::cerr <<argv[0] <<": unrecognized switch: " <<argv[argno] <<"\n";
            exit(1);
        }
    }
    if (argno+1!=argc) {
        std::cerr <<"usage: " <<argv[0] <<" [SWITCHES] [--] SPECIMEN\n";
        exit(1);
    }
    std::string specimen_name = argv[argno++];
            
    // Open the file
    rose_addr_t start_va = 0;
    MemoryMap map;
    size_t file_size = map.insertFile(specimen_name, start_va);
    map.at(start_va).limit(file_size).changeAccess(MemoryMap::EXECUTABLE, 0);

    // Try to disassemble every byte, and print the CALL/FARCALL targets
    size_t ninsns=0, nerrors=0;
    Disassembler *disassembler = new DisassemblerX86(4);
    for (rose_addr_t offset=0; offset<file_size; ++offset) {
        try {
            rose_addr_t insn_va = start_va + offset;
            SgAsmX86Instruction *insn = isSgAsmX86Instruction(disassembler->disassembleOne(&map, insn_va));
            if (insn && (x86_call==insn->get_kind() || x86_farcall==insn->get_kind())) {
                ++ninsns;
                rose_addr_t target_va;
                if (insn->getBranchTarget(&target_va))
                    std::cout <<StringUtility::addrToString(insn_va) <<": " <<StringUtility::addrToString(target_va) <<"\n";
            }
        } catch (const Disassembler::Exception &e) {
            ++nerrors;
        }
    }

    std::cerr <<specimen_name <<": " <<ninsns <<" instructions; " <<nerrors <<" errors\n";
    return 0;
}

bool
mapMemory(VirtualAddress virtualAddress,
          PhysicalAddress physicalAddress,
          uint32_t size,
          MapPermission permission)
{
   return sMemoryMap.mapMemory(virtualAddress, physicalAddress, size, permission);
}

    // Get all the functions defined for this process image.  We do this by disassembling the entire process executable memory
    // and using CFG analysis to figure out where the functions are located.
    Functions find_functions(RTS_Message *m, RSIM_Process *proc) {
        m->mesg("%s triggered; disassembling entire specimen image...\n", name);
        MemoryMap *map = disassembly_map(proc);
        std::ostringstream ss;
        map->dump(ss, "  ");
        m->mesg("%s: using this memory map for disassembly:\n%s", name, ss.str().c_str());
        SgAsmBlock *gblk = proc->disassemble(false/*take no shortcuts*/, map);
        delete map; map=NULL;
        std::vector<SgAsmFunction*> functions = SageInterface::querySubTree<SgAsmFunction>(gblk);
#if 0 /*DEBUGGING [Robb P. Matzke 2013-02-12]*/
        // Prune the function list to contain only what we want.
        for (std::vector<SgAsmFunction*>::iterator fi=functions.begin(); fi!=functions.end(); ++fi) {
            if ((*fi)->get_name().compare("_Z1fRi")!=0)
                *fi = NULL;
        }
        functions.erase(std::remove(functions.begin(), functions.end(), (SgAsmFunction*)NULL), functions.end());
#endif
        return Functions(functions.begin(), functions.end());
    }

int
main(int argc, char *argv[]) {
    ROSE_INITIALIZE;
    Diagnostics::initAndRegister(mlog, "tool");
    Sawyer::ProgressBarSettings::minimumUpdateInterval(0.2); // more fluid spinner

    // Parse command-line
    P2::Engine engine;
    Settings settings;
    std::vector<std::string> args = parseCommandLine(argc, argv, engine, settings);
    ASSERT_always_require2(args.size() >= 2, "incorrect usage; see --help");

    // Parse file containing instruction addresses
    std::string addrFileName = args[0];
    std::set<rose_addr_t> knownVas = parseAddressFile(addrFileName);
    mlog[INFO] <<"parsed " <<plural(knownVas.size(), "unique addresses") <<"\n";

    // Load specimen natively and attach debugger
    std::vector<std::string> specimen_cmd(args.begin()+1, args.end());
    BinaryDebugger debugger(specimen_cmd);
    debugger.setBreakpoint(AddressInterval::whole());
    ASSERT_always_require(debugger.isAttached());
    ASSERT_always_forbid(debugger.isTerminated());
    pid_t pid = debugger.isAttached();
    mlog[INFO] <<"child PID " <<pid <<"\n";

    // Get memory map.
    MemoryMap map;
    if (MAP_ROSE==settings.mapSource) {
        map = engine.loadSpecimens(specimen_cmd[0]);
    } else {
        map.insertProcess(":noattach:" + numberToString(pid));
    }
    map.dump(mlog[INFO]);

    // The addresses specified in the instruction address file must all be in memory that is mapped.
    BOOST_FOREACH (rose_addr_t va, knownVas) {
        ASSERT_always_require2(map.at(va).require(MemoryMap::EXECUTABLE).exists(),
                               "given address " + addrToString(va) + " is not mapped or lacks execute permission");
    }