本文整理汇总了C++中HardwareTimer::attachCompare2Interrupt方法的典型用法代码示例。如果您正苦于以下问题：C++ HardwareTimer::attachCompare2Interrupt方法的具体用法？C++ HardwareTimer::attachCompare2Interrupt怎么用？C++ HardwareTimer::attachCompare2Interrupt使用的例子？那么, 这里精选的方法代码示例或许可以为您提供帮助。您也可以进一步了解该方法所在类HardwareTimer的用法示例。
在下文中一共展示了HardwareTimer::attachCompare2Interrupt方法的1个代码示例，这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞，您的评价将有助于系统推荐出更棒的C++代码示例。
示例1: init_ppm_timer
void init_ppm_timer()
{
timer4.pause();
timer4.setPrescaleFactor(TIMER_PRESCALE);
timer4.setOverflow(65535);
timer4.setCount(0);
// use channel 2 to detect when we stop receiving
// a ppm signal from the encoder.
timer4.setMode(TIMER_CH2, TIMER_OUTPUT_COMPARE);
timer4.setCompare(TIMER_CH2, 65535);
timer4.attachCompare2Interrupt(ppm_timeout_isr);
timer4.refresh();
//capture compare regs TIMx_CCRx used to hold val after a transition on corresponding ICx
//when cap occurs, flag CCXIF (TIMx_SR register) is set,
//and interrupt, or dma req can be sent if they are enabled.
//if cap occurs while flag is already high CCxOF (overcapture) flag is set..
//CCIX can be cleared by writing 0, or by reading the capped data from TIMx_CCRx
//CCxOF is cleared by writing 0 to it.
//Clear the CC1E bit to disable capture from the counter as we set it up.
//CC1S bits aren't writeable when CC1E is set.
//CC1E is bit 0 of CCER (page 401)
bitClear(r.gen->CCER,0);
//Capture/Compare 1 Selection
// set CC1S bits to 01 in the capture compare mode register 1.
// 01 selects TI1 as the input to use. (page 399 stm32 reference)
// (assuming here that TI1 is D16, according to maple master pin map)
//CC1S bits are bits 1,0
bitClear(r.gen->CCMR1, 1);
bitSet(r.gen->CCMR1, 0);
//Input Capture 1 Filter.
// need to set IC1F bits according to a table saying how long
// we should wait for a signal to be 'stable' to validate a transition
// on the input.
// (page 401 stm32 reference)
//IC1F bits are bits 7,6,5,4
bitClear(r.gen->CCMR1, 7);
bitClear(r.gen->CCMR1, 6);
bitSet(r.gen->CCMR1, 5);
bitSet(r.gen->CCMR1, 4);
//sort out the input capture prescaler IC1PSC..
//00 no prescaler.. capture is done at every edge detected
bitClear(r.gen->CCMR1, 3);
bitClear(r.gen->CCMR1, 2);
//select the edge for the transition on TI1 channel using CC1P in CCER
//CC1P is bit 1 of CCER (page 401)
// 0 = rising (non-inverted. capture is done on a rising edge of IC1)
// 1 = falling (inverted. capture is done on a falling edge of IC1)
bitClear(r.gen->CCER,1);
//set the CC1E bit to enable capture from the counter.
//CC1E is bit 0 of CCER (page 401)
bitSet(r.gen->CCER,0);
//enable dma for this timer..
//sets the Capture/Compare 1 DMA request enable bit on the DMA/interrupt enable register.
//bit 9 is CC1DE as defined on page 393.
bitSet(r.gen->DIER,9);
}