C++ ExtentMap::end方法代码示例

/** Write just the specified regions back to the file */
void
SgAsmGenericSection::unparse(std::ostream &f, const ExtentMap &map) const
{
    for (ExtentMap::const_iterator i=map.begin(); i!=map.end(); ++i) {
        Extent e = i->first;
        assert(e.first()+e.size() <= get_size());
        const unsigned char *extent_data;
        if (e.first() >= p_data.size()) {
            extent_data = NULL;
        } else if (e.first() + e.size() > p_data.size()) {
            extent_data = &p_data[e.first()];
        } else {
            extent_data = &p_data[e.first()];
        }
        if (extent_data)
            write(f, e.first(), e.size(), extent_data);
    }
}

void
SgAsmGenericFile::shift_extend(SgAsmGenericSection *s, rose_addr_t sa, rose_addr_t sn, AddressSpace space, Elasticity elasticity)
{
    ROSE_ASSERT(s!=NULL);
    ROSE_ASSERT(s->get_file()==this);
    ROSE_ASSERT((space & (ADDRSP_FILE|ADDRSP_MEMORY)) != 0);

    const bool debug = false;
    static size_t ncalls=0;
    char p[256];

    if (debug) {
        const char *space_s="unknown";
        if (space & ADDRSP_FILE) {
            space_s = "file";
        } else if (space & ADDRSP_MEMORY) {
            space_s = "memory";
        }
        sprintf(p, "SgAsmGenericFile::shift_extend[%" PRIuPTR "]: ", ncalls++);
        fprintf(stderr, "%s    -- START --\n", p);
        fprintf(stderr, "%s    S = [%d] \"%s\"\n", p, s->get_id(), s->get_name()->get_string(true).c_str());
        fprintf(stderr, "%s    %s Sa=0x%08" PRIx64 " (%" PRIu64 "), Sn=0x%08" PRIx64 " (%" PRIu64 ")\n",
                p, space_s, sa, sa, sn, sn);
        fprintf(stderr, "%s    elasticity = %s\n", p, (ELASTIC_NONE==elasticity ? "none" :
                                                       ELASTIC_UNREF==elasticity ? "unref" :
                                                       ELASTIC_HOLE==elasticity ? "unref+holes" :
                                                       "unknown"));
    }

    /* No-op case */
    if (0==sa && 0==sn) {
        if (debug) {
            fprintf(stderr, "%s    No change necessary.\n", p);
            fprintf(stderr, "%s    -- END --\n", p);
        }
        return;
    }

    bool filespace = (space & ADDRSP_FILE)!=0;
    bool memspace = (space & ADDRSP_MEMORY)!=0;
    rose_addr_t align=1, aligned_sa, aligned_sasn;
    SgAsmGenericSectionPtrList neighbors, villagers;
    ExtentMap amap; /* address mappings for all extents */
    Extent sp;

    /* Get a list of all sections that may need to be adjusted. */
    SgAsmGenericSectionPtrList all;
    switch (elasticity) {
      case ELASTIC_NONE:
      case ELASTIC_UNREF:
        all = filespace ? get_sections() : get_mapped_sections();
        break;
      case ELASTIC_HOLE:
        all = filespace ? get_sections(false) : get_mapped_sections();
        break;
    }
    if (debug) {
        fprintf(stderr, "%s    Following sections are in 'all' set:\n", p);
        for (size_t i=0; i<all.size(); i++) {
            Extent ep;
            if (filespace) {
                ep = all[i]->get_file_extent();
            } else {
                ROSE_ASSERT(all[i]->is_mapped());
                ep = all[i]->get_mapped_preferred_extent();
            }
            fprintf(stderr, "%s        0x%08" PRIx64 " 0x%08" PRIx64 " 0x%08" PRIx64 " [%d] \"%s\"\n",
                    p, ep.relaxed_first(), ep.size(), ep.relaxed_first()+ep.size(), all[i]->get_id(),
                    all[i]->get_name()->get_string(true).c_str());
        }
    }

    for (size_t pass=0; pass<2; pass++) {
        if (debug) {
            fprintf(stderr, "%s    -- %s --\n",
                    p, 0==pass?"FIRST PASS":"SECOND PASS (after making a larger hole)");
        }

        /* S offset and size in file or memory address space */
        if (filespace) {
            sp = s->get_file_extent();
        } else if (!memspace || !s->is_mapped()) {
            return; /*nothing to do*/
        } else {
            sp = s->get_mapped_preferred_extent();
        }

        /* Build address map */
        for (size_t i=0; i<all.size(); i++) {
            if (filespace) {
                amap.insert(all[i]->get_file_extent());
            } else {
                ROSE_ASSERT(all[i]->is_mapped());
                amap.insert(all[i]->get_mapped_preferred_extent());
            }
        }
        if (debug) {
            fprintf(stderr, "%s    Address map:\n", p);
            amap.dump_extents(stderr, (std::string(p)+"        ").c_str(), "amap");
            fprintf(stderr, "%s    Extent of S:\n", p);
//.........这里部分代码省略.........

AddressIntervalSet toAddressIntervalSet(const ExtentMap &x) {
    AddressIntervalSet retval;
    for (ExtentMap::const_iterator iter=x.begin(); iter!=x.end(); ++iter)
        retval.insert(toAddressInterval(iter->first));
    return retval;
}

Partitioner::RegionStats *
Partitioner::region_statistics(const ExtentMap &addresses)
{
    RegionStats *stats = new_region_stats();
    assert(stats!=NULL);
    size_t nbytes = addresses.size();
    if (0==nbytes)
        return stats;
    stats->add_sample(RegionStats::RA_NBYTES, nbytes);
    ExtentMap not_addresses = addresses.invert<ExtentMap>();

    Disassembler::AddressSet worklist;          // addresses waiting to be disassembled recursively
    InstructionMap insns_found;                 // all the instructions we found herein
    ExtentMap insns_extent;                     // memory used by the instructions we've found
    ExtentMap pending = addresses;              // addresses we haven't looked at yet

    /* Undirected local control flow graph used to count connected components */
    typedef boost::adjacency_list<boost::vecS, boost::vecS, boost::undirectedS> CFG;
    typedef boost::graph_traits<CFG>::vertex_descriptor CFGVertex;
    typedef std::map<rose_addr_t, CFGVertex> Addr2Vertex;
    CFG cfg;
    Addr2Vertex va2id;

    /* Statistics */
    size_t nstarts=0;                           // number of times the recursive disassembler was started
    size_t nfails=0;                            // number of disassembler failures
    size_t noverlaps=0;                         // instructions overlapping with a previously found instruction
    size_t nincomplete=0;                       // number of instructions with unknown successors
    size_t nfallthrough=0;                      // number of branches to fall-through address within our "addresses"
    size_t ncalls=0;                            // number of function calls outside our "addresses"
    size_t nnoncalls=0;                         // number of branches to non-functions outside our "addresses"
    size_t ninternal=0;                         // number of non-fallthrough internal branches

    while (!pending.empty()) {
        rose_addr_t start_va = pending.min();
        worklist.insert(start_va);
        ++nstarts;

        while (!worklist.empty()) {
            rose_addr_t va = *worklist.begin();
            worklist.erase(worklist.begin());

            /* Obtain (disassemble) the instruction and make sure it falls entirely within the "addresses" */
            Instruction *insn = find_instruction(va);
            if (!insn) {
                ++nfails;
                pending.erase(Extent(va));
                continue;
            }
            Extent ie(va, insn->get_size());
            if (not_addresses.overlaps(ie)) {
                ++nfails;
                pending.erase(Extent(va));
                continue;
            }

            /* The disassembler can also return an "unknown" instruction when failing, depending on how it is invoked. */
            if (insn->node->is_unknown()) {
                ++nfails;
                pending.erase(Extent(va, insn->get_size()));
                continue;
            }

            insns_found.insert(std::make_pair(va, insn));
            rose_addr_t fall_through_va = va + insn->get_size();

            /* Does this instruction overlap with any we've already found? */
            if (insns_extent.overlaps(ie))
                ++noverlaps;
            pending.erase(Extent(va, insn->get_size()));
            insns_extent.insert(ie);

            /* Find instruction successors by looking only at the instruction itself.  This is simpler, but less rigorous
             * method than finding successors a basic block at a time.  For instance, we'll find both sides of a branch
             * instruction even if the more rigorous method determined that one side or the other is always taken.  But this is
             * probably what we want here anyway for determining whether something looks like code. */
            bool complete;
            Disassembler::AddressSet succs = insn->get_successors(&complete);
            if (!complete)
                ++nincomplete;

            /* Add instruction as vertex to CFG */
            std::pair<Addr2Vertex::iterator, bool> inserted = va2id.insert(std::make_pair(va, va2id.size()));
            if (inserted.second) {
                CFGVertex vertex __attribute__((unused)) = add_vertex(cfg);
                assert(vertex==inserted.first->second);
            }

            /* Classify the various successors. */
            for (Disassembler::AddressSet::const_iterator si=succs.begin(); si!=succs.end(); ++si) {
                rose_addr_t succ_va = *si;


                if (succ_va==fall_through_va) {
                    ++nfallthrough;
                    if (pending.find(succ_va)!=pending.end())
                        worklist.insert(succ_va);
                    /* Add edge to CFG graph */
                    va2id.insert(std::make_pair(succ_va, va2id.size()));
                    add_edge(va2id[va], va2id[succ_va], cfg);
//.........这里部分代码省略.........