本文整理汇总了C++中ExpressionNode::GenCode方法的典型用法代码示例。如果您正苦于以下问题：C++ ExpressionNode::GenCode方法的具体用法？C++ ExpressionNode::GenCode怎么用？C++ ExpressionNode::GenCode使用的例子？那么, 这里精选的方法代码示例或许可以为您提供帮助。您也可以进一步了解该方法所在类ExpressionNode的用法示例。
在下文中一共展示了ExpressionNode::GenCode方法的1个代码示例，这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞，您的评价将有助于系统推荐出更棒的C++代码示例。
示例1: GenCode
void ExpressionNode::GenCode(CodeEmitter &e, bool travSib, int virtualRegister, int toff) {
DeclarationNode *dPtr;
ExpressionNode *argPtr;
int localToff, boolSkipLoc, currentLoc, currentReg;
bool isUnary = true;
// Assign virtual register to 'real' register
int actualRegister = virtualRegister%MAX_EXP_REGISTERS+FIRST_REG_OFFSET;
int nextRegister = (virtualRegister+1)%MAX_EXP_REGISTERS+FIRST_REG_OFFSET;
localToff = toff;
switch (subKind) {
case OpK:
// process left child
if (child[0] != NULL)
child[0]->GenCode(e, true, virtualRegister, toff);
// mark location for short circuit jump
if (op == "&&" || op == "||")
boolSkipLoc = e.emitSkip(1);
if (child[1] != NULL) {
isUnary = false;
// see if all of our registers are full...
if (virtualRegister+1 >= MAX_EXP_REGISTERS) {
// push value from "next" register
e.emitRM("ST", nextRegister, toff--, fp, "dump register"); // push
}
else
e.emitComment("Left side will remain in register");
/*
// save left side
localToff = toff--;
e.emitRM("ST", ac, localToff, fp, "save left side");
*/
// process right child
child[1]->GenCode(e, true, virtualRegister+1, toff);
/*
// load left back into the accumulator
toff = localToff;
e.emitRM("LD", ac1, localToff, fp, "load left into ac1");
*/
}
// process operators
// arithmetic operators
if (op == "+")
e.emitRO("ADD", actualRegister, actualRegister, nextRegister, "op +");
else if (op == "-" && !isUnary)
e.emitRO("SUB", actualRegister, actualRegister, nextRegister, "op -");
else if (op == "*")
e.emitRO("MUL", actualRegister, actualRegister, nextRegister, "op *");
else if (op == "/")
e.emitRO("DIV", actualRegister, actualRegister, nextRegister, "op /");
else if (op == "%") {
e.emitRO("DIV", rt, actualRegister, nextRegister, "begin op %");
e.emitRO("MUL", nextRegister, rt, nextRegister, "");
e.emitRO("SUB", actualRegister, actualRegister, nextRegister, "end op %");
}
else if (op == "&&") {
/**** Code for the non short circuit case ****
e.emitRO("ADD", actualRegister, actualRegister, nextRegister, "prepare for && op");
e.emitRM("LDC", nextRegister, 2, 0, "load constant for &&");
e.emitRO("SUB", actualRegister, nextRegister, actualRegister, "compute value");
e.emitRM("JEQ", actualRegister, 2, pc, "op &&");
e.emitRM("LDC", actualRegister, 0, 0, "load false into ac");
e.emitRM("LDA", pc, 1, pc, "jump past true case");
e.emitRM("LDC", actualRegister, 1, 0, "load true into ac");
**** Code for the non short circuit case *****/
e.emitRM("JGT", nextRegister, 2, pc, "op && (right side)");
// special case: If left side of && is false then whole expression is false
currentLoc = e.emitSkip(0);
e.emitBackup(boolSkipLoc);
e.emitRMAbs("JEQ", actualRegister, currentLoc, "Skip right child of && if left is false");
e.emitRestore();
e.emitRM("LDC", actualRegister, 0, 0, "load false into ac");
e.emitRM("LDA", pc, 1, pc, "jump past true case");
e.emitRM("LDC", actualRegister, 1, 0, "load true into ac");
}
else if (op == "||") {
/**** Code for the non short circuit case ****
e.emitRO("ADD", actualRegister, actualRegister, nextRegister, "prepare for || op");
e.emitRM("JGT", actualRegister, 2, pc, "op ||");
e.emitRM("LDC", actualRegister, 0, 0, "load false into ac");
e.emitRM("LDA", pc, 1, pc, "jump past true case");
e.emitRM("LDC", actualRegister, 1, 0, "load true into ac");
**** Code for the non short circuit case *****/
//e.emitRM("JEQ", nextRegister, 2, pc, "op || (right side)");
/* Since the left side is short circuited the right side alone will determine
//.........这里部分代码省略.........