C++ DmaManager类代码示例

int main(int argc, char **argv) {
    EncoderTestRequestProxy *device = new EncoderTestRequestProxy(IfcNames_EncoderTestRequestS2H);
    EncoderTestIndication deviceIndication(IfcNames_EncoderTestIndicationH2S);
    MemServerRequestProxy *hostMemServerRequest = new MemServerRequestProxy(IfcNames_MemServerRequestS2H);
    MMURequestProxy *dmap = new MMURequestProxy(IfcNames_MMURequestS2H);
    DmaManager *dma = new DmaManager(dmap);
    MemServerIndication hostMemServerIndication(hostMemServerRequest, IfcNames_MemServerIndicationH2S);
    MMUIndication hostMMUIndication(dma, IfcNames_MMUIndicationH2S);

    const std::string path="../../data/xgmii.data";
    std::ifstream traceinfo(path.c_str());
    std::string line;

    int srcAlloc;
    srcAlloc = portalAlloc(alloc_sz, 0);
    unsigned long int *srcBuffer = (unsigned long int *)portalMmap(srcAlloc, alloc_sz);

    for (int i = 0; i < numWords; /*NONE*/ ) {
        std::getline(traceinfo, line);
        std::istringstream iss(line);
        std::string first_64;
        iss >> first_64;
        std::string second_64;
        iss >> second_64;
        srcBuffer[i++] = strtoul(second_64.c_str(), NULL, 16); /*second_64 is LSB*/
        srcBuffer[i++] = strtoul(first_64.c_str(), NULL, 16);
    }

    portalCacheFlush(srcAlloc, srcBuffer, alloc_sz, 1);
    unsigned int ref_srcAlloc = dma->reference(srcAlloc);
    printf( "Main::starting read %08x\n", numWords);
    device->startEncoder(ref_srcAlloc, numWords, burstLen, 1);
    sem_wait(&test_sem);
    return 0;
}

int main(int argc, const char **argv)
{
  int srcAlloc;
  unsigned int *srcBuffer = 0;

  MemreadRequestProxy *device = 0;
  DmaConfigProxy *dmap = 0;
  
  MemreadIndication *deviceIndication = 0;
  DmaIndication *dmaIndication = 0;

  fprintf(stderr, "Main::%s %s\n", __DATE__, __TIME__);

  device = new MemreadRequestProxy(IfcNames_MemreadRequest);
  dmap = new DmaConfigProxy(IfcNames_DmaConfig);
  DmaManager *dma = new DmaManager(dmap);

  deviceIndication = new MemreadIndication(IfcNames_MemreadIndication);
  dmaIndication = new DmaIndication(dma, IfcNames_DmaIndication);

  fprintf(stderr, "Main::allocating memory...\n");
  srcAlloc = portalAlloc(alloc_sz);
  srcBuffer = (unsigned int *)portalMmap(srcAlloc, alloc_sz);

  portalExec_start();

  for (int i = 0; i < numWords; i++){
    srcBuffer[i] = i;
  }
    
  portalDCacheFlushInval(srcAlloc, alloc_sz, srcBuffer);
  fprintf(stderr, "Main::flush and invalidate complete\n");

  unsigned int ref_srcAlloc = dma->reference(srcAlloc);
  fprintf(stderr, "ref_srcAlloc=%d\n", ref_srcAlloc);

  fprintf(stderr, "Main::starting read %08x\n", numWords);
  portalTimerStart(0);
  int burstLen = 16;
#ifndef BSIM
  int iterCnt = 64;
#else
  int iterCnt = 2;
#endif
  device->startRead(ref_srcAlloc, numWords, burstLen, iterCnt);
  sem_wait(&test_sem);
  uint64_t cycles = portalTimerLap(0);
  uint64_t beats = dma->show_mem_stats(ChannelType_Read);
  float read_util = (float)beats/(float)cycles;
  fprintf(stderr, "memory read utilization (beats/cycle): %f\n", read_util);

  MonkitFile("perf.monkit")
    .setHwCycles(cycles)
    .setReadBwUtil(read_util)
    .writeFile();

  exit(mismatchCount ? 1 : 0);
}

int main(int argc, const char **argv)
{
  unsigned int srcGen = 0;
  NandSimRequestProxy *device = 0;
  DmaConfigProxy *dmap = 0;
  NandSimIndication *deviceIndication = 0;
  DmaIndication *dmaIndication = 0;

  fprintf(stderr, "Main::%s %s\n", __DATE__, __TIME__);

  device = new NandSimRequestProxy(IfcNames_NandSimRequest);
  dmap = new DmaConfigProxy(IfcNames_DmaConfig);
  DmaManager *dma = new DmaManager(dmap);

  deviceIndication = new NandSimIndication(IfcNames_NandSimIndication);
  dmaIndication = new DmaIndication(dma, IfcNames_DmaIndication);

  fprintf(stderr, "Main::allocating memory...\n");

  srcAlloc = portalAlloc(numBytes);
  srcBuffer = (unsigned int *)portalMmap(srcAlloc, numBytes);
  fprintf(stderr, "fd=%d, srcBuffer=%p\n", srcAlloc, srcBuffer);

  portalExec_start();

  for (int i = 0; i < numBytes/sizeof(srcBuffer[0]); i++)
    srcBuffer[i] = srcGen++;
    
  portalDCacheFlushInval(srcAlloc, numBytes, srcBuffer);
  fprintf(stderr, "Main::flush and invalidate complete\n");
  sleep(1);

  unsigned int ref_srcAlloc = dma->reference(srcAlloc);

  nandAlloc = portalAlloc(nandBytes);
  int ref_nandAlloc = dma->reference(nandAlloc);
  fprintf(stderr, "NAND alloc fd=%d ref=%d\n", nandAlloc, ref_nandAlloc);
  device->configureNand(ref_nandAlloc, nandBytes);
  deviceIndication->wait();

  fprintf(stderr, "Main::starting write ref=%d, len=%08zx\n", ref_srcAlloc, numBytes);
  device->startWrite(ref_srcAlloc, 0, 0, numBytes, 16);
  deviceIndication->wait();

  fprintf(stderr, "Main::starting read %08zx\n", numBytes);
  device->startRead(ref_srcAlloc, 0, 0, numBytes, 16);
  deviceIndication->wait();

  fprintf(stderr, "Main::starting erase %08zx\n", numBytes);
  device->startErase(0, numBytes);
  deviceIndication->wait();

  fprintf(stderr, "Main::starting read %08zx\n", numBytes);
  device->startRead(ref_srcAlloc, 0, 0, numBytes, 16);
  deviceIndication->wait();
  return 0;
}

int main(int argc, const char **argv)
{
    int test_result = 0;
    int srcAlloc;
    unsigned int *srcBuffer = 0;

    fprintf(stderr, "Main::%s %s\n", __DATE__, __TIME__);
    DmaManager *dma = platformInit();
    ReadTestRequestProxy *device = new ReadTestRequestProxy(IfcNames_ReadTestRequestS2H,TILE_NUMBER);
    ReadTestIndication memReadIndication(IfcNames_ReadTestIndicationH2S,TILE_NUMBER);

    fprintf(stderr, "Main::allocating memory...\n");
    srcAlloc = portalAlloc(alloc_sz, 0);
    srcBuffer = (unsigned int *)portalMmap(srcAlloc, alloc_sz);
    for (int i = 0; i < numWords; i++)
        srcBuffer[i] = i;
    portalCacheFlush(srcAlloc, srcBuffer, alloc_sz, 1);
    fprintf(stderr, "Main::flush and invalidate complete\n");

    /* Test 1: check that match is ok */
    unsigned int ref_srcAlloc = dma->reference(srcAlloc);
    fprintf(stderr, "ref_srcAlloc=%d\n", ref_srcAlloc);
    fprintf(stderr, "Main::orig_test read numWords=%d burstLen=%d iterCnt=%d\n", numWords, burstLen, iterCnt);
    portalTimerStart(0);
    device->startRead(ref_srcAlloc, numWords * 4, burstLen * 4, iterCnt);
    sem_wait(&test_sem);
    if (mismatchCount) {
        fprintf(stderr, "Main::first test failed to match %d.\n", mismatchCount);
        test_result++;     // failed
    }
    platformStatistics();

    /* Test 2: check that mismatch is detected */
    srcBuffer[0] = -1;
    srcBuffer[numWords/2] = -1;
    srcBuffer[numWords-1] = -1;
    portalCacheFlush(srcAlloc, srcBuffer, alloc_sz, 1);

    fprintf(stderr, "Starting second read, mismatches expected\n");
    mismatchCount = 0;
    device->startRead(ref_srcAlloc, numWords * 4, burstLen * 4, iterCnt);
    sem_wait(&test_sem);
    if (mismatchCount != 3/*number of errors introduced above*/ * iterCnt) {
        fprintf(stderr, "Main::second test failed to match mismatchCount=%d (expected %d) iterCnt=%d numWords=%d.\n",
            mismatchCount, 3*iterCnt,
            iterCnt, numWords);
        test_result++;     // failed
    }
#if 0
    MonkitFile pmf("perf.monkit");
    pmf.setHwCycles(cycles)
        .setReadBwUtil(read_util)
        .writeFile();
#endif
    return test_result;
}

int main(int argc, const char **argv)
{
  unsigned int srcGen = 0;
  unsigned repeatCount = 0;

  fprintf(stderr, "%s %s\n", __DATE__, __TIME__);

  device = new PerfRequestProxy(IfcNames_PerfRequest);
  DmaDebugRequestProxy *hostDmaDebugRequest = new DmaDebugRequestProxy(IfcNames_HostDmaDebugRequest);
  dmap = new MMUConfigRequestProxy(IfcNames_HostMMUConfigRequest);
  DmaManager *dma = new DmaManager(hostDmaDebugRequest, dmap);
  DmaDebugIndication *hostDmaDebugIndication = new DmaDebugIndication(dma, IfcNames_HostDmaDebugIndication);
  MMUConfigIndication *hostMMUConfigIndication = new MMUConfigIndication(dma, IfcNames_HostMMUConfigIndication);

  deviceIndication = new PerfIndication(IfcNames_PerfIndication);

  fprintf(stderr, "Main::allocating memory...\n");

  srcAlloc = portalAlloc(alloc_sz);
  dstAlloc = portalAlloc(alloc_sz);

  srcBuffer = (unsigned int *)portalMmap(srcAlloc, alloc_sz);
  dstBuffer = (unsigned int *)portalMmap(dstAlloc, alloc_sz);

  portalExec_start();


  portalDCacheFlushInval(srcAlloc, alloc_sz, srcBuffer);
  portalDCacheFlushInval(dstAlloc, alloc_sz, dstBuffer);
  fprintf(stderr, "Main::flush and invalidate complete\n");

  ref_srcAlloc = dma->reference(srcAlloc);
  ref_dstAlloc = dma->reference(dstAlloc);
  fprintf(stderr, "ref_srcAlloc %d\n", ref_srcAlloc);
  fprintf(stderr, "ref_dstAlloc %d\n", ref_dstAlloc);
  //fprintf(stderr, "Main::starting mempcy numWords:%d\n", 0);
  
  //dotest(0);
  for (repeatCount = 1; repeatCount <= 16; repeatCount <<= 1) {
    fprintf(stderr, "Main::starting mempcy repeatCount:%d\n", repeatCount);
    for (numWords = 16; numWords < (1 << 16); numWords <<= 1){
    
      //fprintf(stderr, "Main::starting mempcy numWords:%d\n", numWords);
      
      dotest(numWords, repeatCount);
    }
  }

  device->getStateDbg();
  fprintf(stderr, "Main::exiting\n");
}

int main(int argc, const char **argv)
{
  unsigned int srcGen = 0;

  Memread2RequestProxy *device = 0;
  Memread2Indication *deviceIndication = 0;

  fprintf(stderr, "Main::%s %s\n", __DATE__, __TIME__);

  device = new Memread2RequestProxy(IfcNames_Memread2Request);
  DmaDebugRequestProxy *hostDmaDebugRequest = new DmaDebugRequestProxy(IfcNames_HostDmaDebugRequest);
  MMUConfigRequestProxy *dmap = new MMUConfigRequestProxy(IfcNames_HostMMUConfigRequest);
  DmaManager *dma = new DmaManager(hostDmaDebugRequest, dmap);
  DmaDebugIndication *hostDmaDebugIndication = new DmaDebugIndication(dma, IfcNames_HostDmaDebugIndication);
  MMUConfigIndication *hostMMUConfigIndication = new MMUConfigIndication(dma, IfcNames_HostMMUConfigIndication);

  deviceIndication = new Memread2Indication(IfcNames_Memread2Indication);

  fprintf(stderr, "Main::allocating memory...\n");
  srcAlloc = portalAlloc(alloc_sz);
  srcBuffer = (unsigned int *)portalMmap(srcAlloc, alloc_sz);
  srcAlloc2 = portalAlloc(alloc_sz);
  srcBuffer2 = (unsigned int *)portalMmap(srcAlloc2, alloc_sz);

  portalExec_start();

  for (int i = 0; i < numWords; i++){
    int v = srcGen++;
    srcBuffer[i] = v;
    srcBuffer2[i] = v*3;
  }
    
  portalDCacheFlushInval(srcAlloc, alloc_sz, srcBuffer);
  fprintf(stderr, "Main::flush and invalidate complete\n");

  unsigned int ref_srcAlloc = dma->reference(srcAlloc);
  fprintf(stderr, "ref_srcAlloc=%d\n", ref_srcAlloc);
  unsigned int ref_srcAlloc2 = dma->reference(srcAlloc2);
  fprintf(stderr, "ref_srcAlloc2=%d\n", ref_srcAlloc2);

  fprintf(stderr, "Main::starting read %08x\n", numWords);
  device->startRead(ref_srcAlloc, ref_srcAlloc2, 32, 16);
  fprintf(stderr, "Main::sleeping\n");
  while(true){
    sleep(3);
    device->getStateDbg();
    uint64_t beats = dma->show_mem_stats(ChannelType_Read);
    fprintf(stderr, "   beats: %"PRIx64"\n", beats);
    hostDmaDebugRequest->getStateDbg(ChannelType_Read);
  }
}

int main(int argc, const char **argv)
{
  DmaManager *dma = platformInit();
  Ddr3TestRequestProxy *testRequest = new Ddr3TestRequestProxy(IfcNames_Ddr3TestRequestS2H);
  Ddr3TestIndication testIndication(IfcNames_Ddr3TestIndicationH2S);

  if(sem_init(&write_sem, 1, 0)){
    fprintf(stderr, "failed to init write_sem\n");
    return -1;
  }
  if(sem_init(&read_sem, 1, 0)){
    fprintf(stderr, "failed to init read_sem\n");
    return -1;
  }
  int srcAlloc = portalAlloc(alloc_sz, 0);
  int dstAlloc = portalAlloc(alloc_sz, 0);
  int *srcBuffer = (int *)portalMmap(srcAlloc, alloc_sz);
  int *dstBuffer = (int *)portalMmap(dstAlloc, alloc_sz);
  for (int i = 0; i < 1024/4; i++) {
      srcBuffer[i] = i;
      fprintf(stderr, "src dram[%04x]=%08x\n", i*4, srcBuffer[i]);
  }
  int ref_srcAlloc = dma->reference(srcAlloc);
  int ref_dstAlloc = dma->reference(dstAlloc);

  if (1) {
      int transferLen = 1024;
      testRequest->startWriteDram(ref_srcAlloc, transferLen);
      fprintf(stderr, "Started writing dram\n");
      for (int i = 0; i < transferLen; i += DataBusWidth)
	  sem_wait(&write_sem);

      testRequest->startReadDram(ref_dstAlloc, transferLen);
      sem_wait(&read_sem);
  }
  for (int i = 0; i < 1024/4; i++) {
      fprintf(stderr, "dst dram[%04x]=%08x\n", i*4, dstBuffer[i]);
  }
  int mismatches = 0;
  for (int i = 0; i < 1024/4; i++) {
      if (i != dstBuffer[i]) {
	  mismatches++;
	  fprintf(stderr, "mismatch dram[%04x]=%08x expected %08x\n", i*4, dstBuffer[i], i);
      }
  }
  fprintf(stderr, "%d mismatches\n", mismatches);
  return mismatches ? 1 : 0;
}

int main(int argc, const char **argv)
{
    int mismatch = 0;
    uint32_t sg = 0;
    int max_error = 10;

    if (sem_init(&test_sem, 1, 0)) {
        fprintf(stderr, "error: failed to init test_sem\n");
        exit(1);
    }
    fprintf(stderr, "testmemwrite: start %s %s\n", __DATE__, __TIME__);
    DmaManager *dma = platformInit();
    MemwriteRequestProxy *device = new MemwriteRequestProxy(IfcNames_MemwriteRequestS2H);
    MemwriteIndication deviceIndication(IfcNames_MemwriteIndicationH2S);

    fprintf(stderr, "main::allocating memory...\n");
    int dstAlloc = portalAlloc(alloc_sz, 0);
    unsigned int *dstBuffer = (unsigned int *)portalMmap(dstAlloc, alloc_sz);
#ifdef FPGA0_CLOCK_FREQ
    long req_freq = FPGA0_CLOCK_FREQ, freq = 0;
    setClockFrequency(0, req_freq, &freq);
    fprintf(stderr, "Requested FCLK[0]=%ld actually %ld\n", req_freq, freq);
#endif
    unsigned int ref_dstAlloc = dma->reference(dstAlloc);
    for (int i = 0; i < numWords; i++)
        dstBuffer[i] = 0xDEADBEEF;
    portalCacheFlush(dstAlloc, dstBuffer, alloc_sz, 1);
    fprintf(stderr, "testmemwrite: flush and invalidate complete\n");
    fprintf(stderr, "testmemwrite: starting write %08x\n", numWords);
    portalTimerStart(0);
    device->startWrite(ref_dstAlloc, 0, numWords, burstLen, iterCnt);
    sem_wait(&test_sem);
    for (int i = 0; i < numWords; i++) {
        if (dstBuffer[i] != sg) {
            mismatch++;
            if (max_error-- > 0)
                fprintf(stderr, "testmemwrite: [%d] actual %08x expected %08x\n", i, dstBuffer[i], sg);
        }
        sg++;
    }
    platformStatistics();
    fprintf(stderr, "testmemwrite: mismatch count %d.\n", mismatch);
    exit(mismatch);
}

int main(int argc, const char **argv)
{
  ReadTestRequestProxy *device = new ReadTestRequestProxy(IfcNames_ReadTestRequestS2H);
  ReadTestIndication deviceIndication(IfcNames_ReadTestIndicationH2S);
  DmaManager *dma = platformInit();

  int srcAlloc;
  srcAlloc = portalAlloc(test_sz, 0);
  unsigned int *srcBuffer = (unsigned int *)portalMmap(srcAlloc, test_sz);

  for (unsigned int i = 0; i < test_sz/sizeof(unsigned int); i++)
    srcBuffer[i] = i;
  portalCacheFlush(srcAlloc, srcBuffer, test_sz, 1);
  unsigned int ref_srcAlloc = dma->reference(srcAlloc);
  printf( "Main::starting read %lx\n", test_sz);
  device->startRead(ref_srcAlloc, test_sz, burstLen, 1);
  sem_wait(&test_sem);
  return 0;
}

int main(int argc, char **argv) {
    DtpTestRequestProxy *device = new DtpTestRequestProxy(IfcNames_DtpTestRequest);
    DtpTestIndication *deviceIndication = new DtpTestIndication(IfcNames_DtpTestIndication);
    MemServerRequestProxy *hostMemServerRequest = new MemServerRequestProxy(IfcNames_HostMemServerRequest);
    MMURequestProxy *dmap = new MMURequestProxy(IfcNames_HostMMURequest);
    DmaManager *dma = new DmaManager(dmap);
    MemServerIndication *hostMemServerIndication = new MemServerIndication(hostMemServerRequest, IfcNames_HostMemServerIndication);
    MMUIndication *hostMMUIndication = new MMUIndication(dma, IfcNames_HostMMUIndication);

    const std::string path="../data/encoded.data2";
    std::ifstream traceinfo(path.c_str());
    std::string line;

    int srcAlloc;
    srcAlloc = portalAlloc(alloc_sz);
    unsigned long int *srcBuffer = (unsigned long int *)portalMmap(srcAlloc, alloc_sz);

    portalExec_start();

    for (int i = 0; i < numWords; /*NONE*/ ) {
        std::getline(traceinfo, line);
        std::istringstream iss(line);
        std::string ignored_first_64;
        iss >> ignored_first_64;
        std::string first_64;
        iss >> first_64;
        std::string ignored_second_64;
        iss >> ignored_second_64;
        std::string second_64;
        iss >> second_64;
        srcBuffer[i++] = strtoul(second_64.c_str(), NULL, 16); /*second_64 is LSB*/
        srcBuffer[i++] = strtoul(first_64.c_str(), NULL, 16);
        //std::cout << first_64 << second_64 << std::endl;
    }

    portalDCacheFlushInval(srcAlloc, alloc_sz, srcBuffer);
    unsigned int ref_srcAlloc = dma->reference(srcAlloc);
    printf( "Main::starting read %08x\n", numWords);
    device->startDtp(ref_srcAlloc, numWords, burstLen, 1);
    sem_wait(&test_sem);
    return 0;
}

int main(int argc, const char **argv)
{
  size_t alloc_sz = 1024*1024;
  MemwriteRequestProxy *device = new MemwriteRequestProxy(IfcNames_MemwriteRequestS2H);
  MemwriteIndication deviceIndication(IfcNames_MemwriteIndicationH2S);
  DmaManager *dma = platformInit();

  sem_init(&done_sem, 1, 0);
  int dstAlloc = portalAlloc(alloc_sz, 0);
  unsigned int *dstBuffer = (unsigned int *)portalMmap(dstAlloc, alloc_sz);

  for (unsigned int i = 0; i < alloc_sz/sizeof(uint32_t); i++)
    dstBuffer[i] = 0xDEADBEEF;

  portalCacheFlush(dstAlloc, dstBuffer, alloc_sz, 1);

  fprintf(stderr, "parent::starting write\n");
  unsigned int ref_dstAlloc = dma->reference(dstAlloc);
  device->startWrite(ref_dstAlloc, alloc_sz, 2 * sizeof(uint32_t));

  sem_wait(&done_sem);
  memdump((unsigned char *)dstBuffer, 32, "MEM");
  fprintf(stderr, "%s: done\n", __FUNCTION__);
}

int main(int argc, const char **argv)
{
    if(sem_init(&done_sem, 1, 0)) {
        fprintf(stderr, "failed to init done_sem\n");
        exit(1);
    }
    if(sem_init(&memcmp_sem, 1, 0)) {
        fprintf(stderr, "failed to init memcmp_sem\n");
        exit(1);
    }

    fprintf(stderr, "%s %s\n", __DATE__, __TIME__);

    MemcpyRequestProxy *device = new MemcpyRequestProxy(IfcNames_MemcpyRequestS2H);
    deviceIndication = new MemcpyIndication(IfcNames_MemcpyIndicationH2S);
    DmaManager *dma = platformInit();

    fprintf(stderr, "Main::allocating memory...\n");

    srcAlloc = portalAlloc(alloc_sz, 0);
    dstAlloc = portalAlloc(alloc_sz, 0);

    // for(int i = 0; i < srcAlloc->header.numEntries; i++)
    //   fprintf(stderr, "%lx %lx\n", srcAlloc->entries[i].dma_address, srcAlloc->entries[i].length);
    // for(int i = 0; i < dstAlloc->header.numEntries; i++)
    //   fprintf(stderr, "%lx %lx\n", dstAlloc->entries[i].dma_address, dstAlloc->entries[i].length);

    srcBuffer = (unsigned int *)portalMmap(srcAlloc, alloc_sz);
    dstBuffer = (unsigned int *)portalMmap(dstAlloc, alloc_sz);

    for (int i = 0; i < numWords; i++) {
        srcBuffer[i] = i;
        dstBuffer[i] = 0x5a5abeef;
    }

    portalCacheFlush(srcAlloc, srcBuffer, alloc_sz, 1);
    portalCacheFlush(dstAlloc, dstBuffer, alloc_sz, 1);
    fprintf(stderr, "Main::flush and invalidate complete\n");

    unsigned int ref_srcAlloc = dma->reference(srcAlloc);
    unsigned int ref_dstAlloc = dma->reference(dstAlloc);

    fprintf(stderr, "ref_srcAlloc=%d\n", ref_srcAlloc);
    fprintf(stderr, "ref_dstAlloc=%d\n", ref_dstAlloc);


    // unsigned int refs[2] = {ref_srcAlloc, ref_dstAlloc};
    // for(int j = 0; j < 2; j++){
    //   unsigned int ref = refs[j];
    //   for(int i = 0; i < numWords; i = i+(numWords/4)){
    //     dmap->addrRequest(ref, i*sizeof(unsigned int));
    //     sleep(1);
    //   }
    //   dmap->addrRequest(ref, (1<<16)*sizeof(unsigned int));
    //   sleep(1);
    // }

    fprintf(stderr, "Main::starting memcpy numWords:%d\n", numWords);
    int burstLen = 32;
#ifndef SIMULATION
    int iterCnt = 128;
#else
    int iterCnt = 2;
#endif
    portalTimerStart(0);
    device->startCopy(ref_dstAlloc, ref_srcAlloc, numWords, burstLen, iterCnt);
    sem_wait(&done_sem);
    platformStatistics();
    //float read_util = (float)read_beats/(float)cycles;
    //float write_util = (float)write_beats/(float)cycles;
    //fprintf(stderr, "   iters: %d\n", iterCnt);
    //fprintf(stderr, "wr_beats: %"PRIx64" %08lx\n", write_beats, (long)write_beats);
    //fprintf(stderr, "rd_beats: %"PRIx64" %08lx\n", read_beats, (long)read_beats);
    //fprintf(stderr, "numWords: %x\n", numWords);
    //fprintf(stderr, "  wr_est: %"PRIx64"\n", (write_beats*2)/iterCnt);
    //fprintf(stderr, "  rd_est: %"PRIx64"\n", (read_beats*2)/iterCnt);
    //fprintf(stderr, "memory read utilization (beats/cycle): %f\n", read_util);
    //fprintf(stderr, "memory write utilization (beats/cycle): %f\n", write_util);

#if 0
    MonkitFile pmf("perf.monkit");
    pmf.setHwCycles(cycles)
    .setReadBwUtil(read_util)
    .setWriteBwUtil(write_util)
    .writeFile();
    fprintf(stderr, "After updating perf.monkit\n");
#endif
    sem_wait(&memcmp_sem);
    fprintf(stderr, "after memcmp_sem memcmp_fail=%d\n", memcmp_fail);
    return memcmp_fail;
}

int main(int argc, const char **argv)
{
  MaxcommonsubseqRequestProxy *device = 0;
  DmaConfigProxy *dmap = 0;
  
  MaxcommonsubseqIndication *deviceIndication = 0;
  DmaIndication *dmaIndication = 0;

  fprintf(stderr, "%s %s\n", __DATE__, __TIME__);
  device = new MaxcommonsubseqRequestProxy(IfcNames_MaxcommonsubseqRequest);
  dmap = new DmaConfigProxy(IfcNames_DmaConfig);
  DmaManager *dma = new DmaManager(dmap);

  deviceIndication = new MaxcommonsubseqIndication(IfcNames_MaxcommonsubseqIndication);
  dmaIndication = new DmaIndication(dma, IfcNames_DmaIndication);

  if(sem_init(&test_sem, 1, 0)){
    fprintf(stderr, "failed to init test_sem\n");
    return -1;
  }

  pthread_t tid;
  fprintf(stderr, "creating exec thread\n");
  if(pthread_create(&tid, NULL,  portalExec, NULL)){
   fprintf(stderr, "error creating exec thread\n");
   exit(1);
  }

    fprintf(stderr, "simple tests\n");
    PortalAlloc *strAAlloc;
    PortalAlloc *strBAlloc;
    PortalAlloc *fetchAlloc;
    unsigned int alloc_len = 128;
    unsigned int fetch_len = alloc_len * alloc_len;
    int rcA, rcB, rcFetch;
    struct stat statAbuf, statBbuf, statFetchbuf;
    
    dma->alloc(fetch_len*sizeof(uint16_t), &fetchAlloc);
    rcFetch = fstat(fetchAlloc->header.fd, &statFetchbuf);
    if (rcA < 0) perror("fstatFetch");
    int *fetch = (int *)mmap(0, fetch_len * sizeof(uint16_t), PROT_READ|PROT_WRITE, MAP_SHARED, fetchAlloc->header.fd, 0);
    if (fetch == MAP_FAILED) perror("fetch mmap failed");
    assert(fetch != MAP_FAILED);

    dma->alloc(alloc_len, &strAAlloc);
    rcA = fstat(strAAlloc->header.fd, &statAbuf);
    if (rcA < 0) perror("fstatA");
    char *strA = (char *)mmap(0, alloc_len, PROT_READ|PROT_WRITE, MAP_SHARED, strAAlloc->header.fd, 0);
    if (strA == MAP_FAILED) perror("strA mmap failed");
    assert(strA != MAP_FAILED);

    dma->alloc(alloc_len, &strBAlloc);
    rcB = fstat(strBAlloc->header.fd, &statBbuf);
    if (rcA < 0) perror("fstatB");
    char *strB = (char *)mmap(0, alloc_len, PROT_READ|PROT_WRITE, MAP_SHARED, strBAlloc->header.fd, 0);
    if (strB == MAP_FAILED) perror("strB mmap failed");
    assert(strB != MAP_FAILED);

/*
    const char *strA_text = "___a_____b______c____";
    const char *strB_text = "..a........b.c....";
*/
    const char *strA_text = "012a45678b012345c7890";
    const char *strB_text = "ABaDEFGHIJKbMcOPQR";
    
    assert(strlen(strA_text) < alloc_len);
    assert(strlen(strB_text) < alloc_len);

    strncpy(strA, strA_text, alloc_len);
    strncpy(strB, strB_text, alloc_len);

    int strA_len = strlen(strA);
    int strB_len = strlen(strB);
    uint16_t swFetch[fetch_len];

    init_timer();
    start_timer(0);


    fprintf(stderr, "elapsed time (hw cycles): %zd\n", lap_timer(0));
    
    dma->dCacheFlushInval(strAAlloc, strA);
    dma->dCacheFlushInval(strBAlloc, strB);
    dma->dCacheFlushInval(fetchAlloc, fetch);

    unsigned int ref_strAAlloc = dma->reference(strAAlloc);
    unsigned int ref_strBAlloc = dma->reference(strBAlloc);
    unsigned int ref_fetchAlloc = dma->reference(fetchAlloc);

    device->setupA(ref_strAAlloc, 0, strA_len);
    sem_wait(&test_sem);

    device->setupB(ref_strBAlloc, 0, strB_len);
    sem_wait(&test_sem);

    uint64_t cycles;
    uint64_t beats;

    fprintf(stderr, "starting algorithm A\n");

//.........这里部分代码省略.........

int main(int argc, const char **argv)
{
	FlashRequestProxy *device = 0;
	DmaConfigProxy *dmap = 0;

	FlashIndication *deviceIndication = 0;
	DmaIndication *dmaIndication = 0;

	if(sem_init(&done_sem, 1, 0)){
		fprintf(stderr, "failed to init done_sem\n");
		exit(1);
	}

	fprintf(stderr, "%s %s\n", __DATE__, __TIME__);

	device = new FlashRequestProxy(IfcNames_FlashRequest);
	dmap = new DmaConfigProxy(IfcNames_DmaConfig);
	DmaManager *dma = new DmaManager(dmap);

	deviceIndication = new FlashIndication(IfcNames_FlashIndication);
	dmaIndication = new DmaIndication(dma, IfcNames_DmaIndication);

	fprintf(stderr, "Main::allocating memory...\n");

	for ( int i = 0; i < DMA_BUFFER_COUNT; i++ ) {
		srcAllocs[i] = portalAlloc(walloc_sz);
		dstAllocs[i] = portalAlloc(ralloc_sz);
		srcBuffers[i] = (unsigned int *)portalMmap(srcAllocs[i], walloc_sz);
		dstBuffers[i] = (unsigned int *)portalMmap(dstAllocs[i], ralloc_sz);
	}
	portalExec_start();
	for ( int i = 0; i < DMA_BUFFER_COUNT; i++ ) {
		portalDCacheFlushInval(srcAllocs[i], walloc_sz, srcBuffers[i]);
		portalDCacheFlushInval(dstAllocs[i], ralloc_sz, dstBuffers[i]);
		ref_srcAllocs[i] = dma->reference(srcAllocs[i]);
		ref_dstAllocs[i] = dma->reference(dstAllocs[i]);
	}

	// Storage system init /////////////////////////////////
	curWritesInFlight = 0;
	curCmdCountBudget = 0;
	pthread_mutex_init(&freeListMutex, NULL);
	pthread_cond_init(&freeListCond, NULL);
	pthread_mutex_init(&flashReqMutex, NULL);
	pthread_mutex_init(&cmdReqMutex, NULL);
	pthread_cond_init(&flashReqCond, NULL);
	pthread_cond_init(&cmdReqCond, NULL);

	for ( int i = 0; i < DMA_BUFFER_COUNT; i++ ) {
		for ( int j = 0; j < WRITE_BUFFER_WAYS; j++ ) {
			int idx = i*WRITE_BUFFER_WAYS+j;
			srcBufferBusy[idx] = false;

			int offset = j*1024*16;
			device->addWriteHostBuffer(ref_srcAllocs[i], offset, idx);
			writeBuffers[idx] = srcBuffers[i] + (offset/sizeof(unsigned int));
		}
	}
	for ( int i = 0; i < DMA_BUFFER_COUNT; i++ ) {
		for ( int j = 0; j < READ_BUFFER_WAYS; j++ ) {
			int idx = i*READ_BUFFER_WAYS+j;

			int offset = j*1024*16;
			device->addReadHostBuffer(ref_dstAllocs[i], offset, idx);
			readBuffers[idx] = dstBuffers[i] + (offset/sizeof(unsigned int));
		}
	}
	for ( int i = 0; i > TAG_COUNT; i++ ) {
		readTagBusy[i] = false;
	}

	pthread_t ftid;
	pthread_create(&ftid, NULL, return_finished_readbuffer, (void*)device);
	/////////////////////////////////////////////////////////

	fprintf(stderr, "Main::flush and invalidate complete\n");
  
	clock_gettime(CLOCK_REALTIME, & deviceIndication->aurorastart);
	device->sendTest(LARGE_NUMBER*1024);

	for ( int j = 0; j < WRITE_BUFFER_COUNT; j++ ) {
		for ( int i = 0; i < (8192+64)/4; i++ ) {
			writeBuffers[j][i] = i;
		}
	}
	for ( int j = 0; j < READ_BUFFER_COUNT; j++ ) {
		for ( int i = 0; i < (8192+64)/4; i++ ) {
			readBuffers[j][i] = 8192/4-i;
		}
	}
	device->start(0);

	timespec start, now;


	printf( "writing pages to flash!\n" );
	clock_gettime(CLOCK_REALTIME, & start);
	for ( int i = 0; i < LARGE_NUMBER/4; i++ ) {
		for ( int j = 0; j < 4; j++ ) {
			if ( i % 1024 == 0 ) 
//.........这里部分代码省略.........

int main(int argc, const char **argv)
{
	testPassed=true;

	fprintf(stderr, "Initializing Connectal & DMA...\n");

	device = new FlashRequestProxy(IfcNames_FlashRequestS2H);
	FlashIndication deviceIndication(IfcNames_FlashIndicationH2S);
    DmaManager *dma = platformInit();

	fprintf(stderr, "Main::allocating memory...\n");
	
	// Memory for DMA
	srcAlloc = portalAlloc(srcAlloc_sz, 0);
	dstAlloc = portalAlloc(dstAlloc_sz, 0);
	srcBuffer = (unsigned int *)portalMmap(srcAlloc, srcAlloc_sz); // Host->Flash Write
	dstBuffer = (unsigned int *)portalMmap(dstAlloc, dstAlloc_sz); // Flash->Host Read

	// Memory for FTL
	blkmapAlloc = portalAlloc(blkmapAlloc_sz * 2, 0);
	char *ftlPtr = (char*)portalMmap(blkmapAlloc, blkmapAlloc_sz * 2);
	blkmap      = (uint16_t(*)[NUM_LOGBLKS]) (ftlPtr);  // blkmap[Seg#][LogBlk#]
	blkmgr      = (uint16_t(*)[NUM_CHIPS][NUM_BLOCKS])  (ftlPtr+blkmapAlloc_sz); // blkmgr[Bus][Chip][Block]

	fprintf(stderr, "dstAlloc = %x\n", dstAlloc); 
	fprintf(stderr, "srcAlloc = %x\n", srcAlloc); 
	fprintf(stderr, "blkmapAlloc = %x\n", blkmapAlloc); 
	
	pthread_mutex_init(&flashReqMutex, NULL);
	pthread_cond_init(&flashFreeTagCond, NULL);

	printf( "Done initializing hw interfaces\n" ); fflush(stdout);

	portalCacheFlush(dstAlloc, dstBuffer, dstAlloc_sz, 1);
	portalCacheFlush(srcAlloc, srcBuffer, srcAlloc_sz, 1);
	portalCacheFlush(blkmapAlloc, blkmap, blkmapAlloc_sz*2, 1);

	ref_dstAlloc = dma->reference(dstAlloc);
	ref_srcAlloc = dma->reference(srcAlloc);
	ref_blkmapAlloc = dma->reference(blkmapAlloc);

	device->setDmaWriteRef(ref_dstAlloc);
	device->setDmaReadRef(ref_srcAlloc);
	device->setDmaMapRef(ref_blkmapAlloc);

	for (int t = 0; t < NUM_TAGS; t++) {
		readTagTable[t].busy = false;
		writeTagTable[t].busy = false;
		eraseTagTable[t].busy = false;

		int byteOffset = t * FPAGE_SIZE;
		readBuffers[t] = dstBuffer + byteOffset/sizeof(unsigned int);
		writeBuffers[t] = srcBuffer + byteOffset/sizeof(unsigned int);
	}

	for (int lpa=0; lpa < NUM_SEGMENTS*NUM_LOGBLKS*NUM_PAGES_PER_BLK; lpa++) {
		flashStatus[lpa] = UNINIT;
	}

	for (int t = 0; t < NUM_TAGS; t++) {
		for ( unsigned int i = 0; i < FPAGE_SIZE/sizeof(unsigned int); i++ ) {
			readBuffers[t][i] = 0xDEADBEEF;
			writeBuffers[t][i] = 0xBEEFDEAD;
		}
	}

	long actualFrequency=0;
	long requestedFrequency=1e9/MainClockPeriod;
	int status = setClockFrequency(0, requestedFrequency, &actualFrequency);
	fprintf(stderr, "Requested Freq: %5.2f, Actual Freq: %5.2f, status=%d\n"
			,(double)requestedFrequency*1.0e-6
			,(double)actualFrequency*1.0e-6,status);

	printf( "Start!\n" ); fflush(stdout);
	device->start(0);
	device->setDebugVals(0,0); //flag, delay

	device->debugDumpReq(0);
	sleep(1);

	printf( "Read initial FTL table from table.dump.0\n" ); fflush(stdout);
	// Read Initial FTL table
	if (readFTLfromFile("table.dump.0", ftlPtr) != 0) {
		fprintf(stderr, "Read Failure\n");
		return -1;
	}
	printf( "Done reading table.dump.0\n" ); fflush(stdout);

	printf( "MAP Upload to HW!\n" ); fflush(stdout);
	device->uploadMap();

	timespec start, now;
	clock_gettime(CLOCK_REALTIME, & start);

	printf( "Test Write!\n" ); fflush(stdout);

	for (int logblk = 0; logblk < NUM_LOGBLKS; logblk++){
		// test only 1024 segments due to some bad blocks (cannot allocate full 4096 segments)
		for (int segnum = 0; segnum < 1024; segnum++) {
			// assuming page_ofs = 0
//.........这里部分代码省略.........