本文整理汇总了C++中CPU_SPECIFIC_SERVICES::GetCacheInfo方法的典型用法代码示例。如果您正苦于以下问题:C++ CPU_SPECIFIC_SERVICES::GetCacheInfo方法的具体用法?C++ CPU_SPECIFIC_SERVICES::GetCacheInfo怎么用?C++ CPU_SPECIFIC_SERVICES::GetCacheInfo使用的例子?那么, 这里精选的方法代码示例或许可以为您提供帮助。您也可以进一步了解该方法所在类CPU_SPECIFIC_SERVICES
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示例1: GetLogicalIdOfCurrentCore
/**
* This function initializes the heap for each CPU core.
*
* Check for already initialized. If not, determine offset of local heap in CAS and
* setup initial heap markers and bookkeeping status. Also create an initial event log.
*
* @param[in] StdHeader Handle of Header for calling lib functions and services.
*
* @retval AGESA_SUCCESS This core's heap is initialized
* @retval AGESA_FATAL This core's heap cannot be initialized due to any reasons below:
* - current processor family cannot be identified.
*
*/
AGESA_STATUS
HeapManagerInit (
IN AMD_CONFIG_PARAMS *StdHeader
)
{
// First Time Initialization
// Note: First 16 bytes of buffer is reserved for Heap Manager use
UINT16 HeapAlreadyInitSizeDword;
UINT32 HeapAlreadyRead;
UINT8 L2LineSize;
UINT8 *HeapBufferPtr;
UINT8 *HeapInitPtr;
UINT32 *HeapDataPtr;
UINT64 MsrData;
UINT64 MsrMask;
UINT8 Ignored;
CPUID_DATA CpuId;
BUFFER_NODE *FreeSpaceNode;
CACHE_INFO *CacheInfoPtr;
CPU_SPECIFIC_SERVICES *FamilySpecificServices;
CPU_LOGICAL_ID CpuFamilyRevision;
// Check whether this is a known processor family.
GetLogicalIdOfCurrentCore (&CpuFamilyRevision, StdHeader);
if ((CpuFamilyRevision.Family == 0) && (CpuFamilyRevision.Revision == 0)) {
IDS_ERROR_TRAP;
return AGESA_FATAL;
}
GetCpuServicesOfCurrentCore (&FamilySpecificServices, StdHeader);
FamilySpecificServices->GetCacheInfo (FamilySpecificServices, (CONST VOID **) &CacheInfoPtr, &Ignored, StdHeader);
HeapBufferPtr = (UINT8 *) StdHeader->HeapBasePtr;
// Check whether the heap manager is already initialized
LibAmdMsrRead (AMD_MTRR_VARIABLE_HEAP_MASK, &MsrData, StdHeader);
if (!IsSecureS3 (StdHeader)) {
if (MsrData == (CacheInfoPtr->VariableMtrrMask & AMD_HEAP_MTRR_MASK)) {
LibAmdMsrRead (AMD_MTRR_VARIABLE_HEAP_BASE, &MsrData, StdHeader);
if ((MsrData & CacheInfoPtr->HeapBaseMask) == ((UINT64) (UINTN) HeapBufferPtr & CacheInfoPtr->HeapBaseMask)) {
if (((HEAP_MANAGER *) HeapBufferPtr)->Signature == HEAP_SIGNATURE_VALID) {
// This is not a bug, there are multiple premem basic entry points,
// and each will call heap init to make sure create struct will succeed.
// If that is later deemed a problem, there needs to be a reasonable test
// for the calling code to make to determine if it needs to init heap or not.
// In the mean time, add this to the event log
PutEventLog (AGESA_SUCCESS,
CPU_ERROR_HEAP_IS_ALREADY_INITIALIZED,
0, 0, 0, 0, StdHeader);
return AGESA_SUCCESS;
}
}
}
// Set variable MTRR base and mask
MsrData = ((UINT64) (UINTN) HeapBufferPtr & CacheInfoPtr->HeapBaseMask);
MsrMask = CacheInfoPtr->VariableMtrrHeapMask & AMD_HEAP_MTRR_MASK;
MsrData |= 0x06;
LibAmdMsrWrite (AMD_MTRR_VARIABLE_HEAP_BASE, &MsrData, StdHeader);
LibAmdMsrWrite (AMD_MTRR_VARIABLE_HEAP_MASK, &MsrMask, StdHeader);
// Set top of memory to a temp value
LibAmdMsrRead (TOP_MEM, &MsrData, StdHeader);
if (AMD_TEMP_TOM > MsrData) {
MsrData = (UINT64) (AMD_TEMP_TOM);
LibAmdMsrWrite (TOP_MEM, &MsrData, StdHeader);
}
}
// Enable variable MTTRs
LibAmdMsrRead (SYS_CFG, &MsrData, StdHeader);
MsrData |= AMD_VAR_MTRR_ENABLE_BIT;
LibAmdMsrWrite (SYS_CFG, &MsrData, StdHeader);
// Initialize Heap Space
// BIOS may store to a line only after it has been allocated by a load
LibAmdCpuidRead (AMD_CPUID_L2L3Cache_L2TLB, &CpuId, StdHeader);
L2LineSize = (UINT8) (CpuId.ECX_Reg);
HeapInitPtr = HeapBufferPtr ;
for (HeapAlreadyRead = 0; HeapAlreadyRead < AMD_HEAP_SIZE_PER_CORE;
(HeapAlreadyRead = HeapAlreadyRead + L2LineSize)) {
Ignored = *HeapInitPtr;
HeapInitPtr += L2LineSize;
}
HeapDataPtr = (UINT32 *) HeapBufferPtr;
//.........这里部分代码省略.........