本文整理汇总了C++中ARMSubtarget::isThumb方法的典型用法代码示例。如果您正苦于以下问题:C++ ARMSubtarget::isThumb方法的具体用法?C++ ARMSubtarget::isThumb怎么用?C++ ARMSubtarget::isThumb使用的例子?那么, 这里精选的方法代码示例或许可以为您提供帮助。您也可以进一步了解该方法所在类ARMSubtarget
的用法示例。
在下文中一共展示了ARMSubtarget::isThumb方法的3个代码示例,这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞,您的评价将有助于系统推荐出更棒的C++代码示例。
示例1: if
static std::string computeDataLayout(ARMSubtarget &ST) {
std::string Ret = "";
if (ST.isLittle())
// Little endian.
Ret += "e";
else
// Big endian.
Ret += "E";
Ret += DataLayout::getManglingComponent(ST.getTargetTriple());
// Pointers are 32 bits and aligned to 32 bits.
Ret += "-p:32:32";
// On thumb, i16,i18 and i1 have natural aligment requirements, but we try to
// align to 32.
if (ST.isThumb())
Ret += "-i1:8:32-i8:8:32-i16:16:32";
// ABIs other than APCS have 64 bit integers with natural alignment.
if (!ST.isAPCS_ABI())
Ret += "-i64:64";
// We have 64 bits floats. The APCS ABI requires them to be aligned to 32
// bits, others to 64 bits. We always try to align to 64 bits.
if (ST.isAPCS_ABI())
Ret += "-f64:32:64";
// We have 128 and 64 bit vectors. The APCS ABI aligns them to 32 bits, others
// to 64. We always ty to give them natural alignment.
if (ST.isAPCS_ABI())
Ret += "-v64:32:64-v128:32:128";
else
Ret += "-v128:64:128";
// On thumb and APCS, only try to align aggregates to 32 bits (the default is
// 64 bits).
if (ST.isThumb() || ST.isAPCS_ABI())
Ret += "-a:0:32";
// Integer registers are 32 bits.
Ret += "-n32";
// The stack is 128 bit aligned on NaCl, 64 bit aligned on AAPCS and 32 bit
// aligned everywhere else.
if (ST.isTargetNaCl())
Ret += "-S128";
else if (ST.isAAPCS_ABI())
Ret += "-S64";
else
Ret += "-S32";
return Ret;
}
示例2:
ARMInstructionSelector::OpcodeCache::OpcodeCache(const ARMSubtarget &STI) {
bool isThumb = STI.isThumb();
using namespace TargetOpcode;
#define STORE_OPCODE(VAR, OPC) VAR = isThumb ? ARM::t2##OPC : ARM::OPC
STORE_OPCODE(SEXT16, SXTH);
STORE_OPCODE(ZEXT16, UXTH);
STORE_OPCODE(SEXT8, SXTB);
STORE_OPCODE(ZEXT8, UXTB);
STORE_OPCODE(AND, ANDri);
STORE_OPCODE(RSB, RSBri);
STORE_OPCODE(STORE32, STRi12);
STORE_OPCODE(LOAD32, LDRi12);
// LDRH/STRH are special...
STORE16 = isThumb ? ARM::t2STRHi12 : ARM::STRH;
LOAD16 = isThumb ? ARM::t2LDRHi12 : ARM::LDRH;
STORE_OPCODE(STORE8, STRBi12);
STORE_OPCODE(LOAD8, LDRBi12);
#undef MAP_OPCODE
}
示例3: getFramePointerReg
static unsigned getFramePointerReg(const ARMSubtarget &STI) {
if (STI.isTargetMachO())
return ARM::R7;
else if (STI.isTargetWindows())
return ARM::R11;
else // ARM EABI
return STI.isThumb() ? ARM::R7 : ARM::R11;
}