C++ xSecondTimerHandler函数代码示例

	void vIntQTimerISR1( void )
	{
		/* Enable interrupts to allow interrupt nesting. */
		__asm volatile( "setpsw	i" );

		portYIELD_FROM_ISR( xSecondTimerHandler() );
	}

static void prvTC0_Handler( void )
{
uint32_t ulDidSomething;

	do
	{
		ulDidSomething = pdFALSE;

		/* Read will clear the status bit. */
		if( ( TC0->TC_CHANNEL[ tmrTC0_CHANNEL_0 ].TC_SR & tmrRC_COMPARE ) != 0 )
		{
			/* Call the IntQ test function for this channel. */
			portYIELD_FROM_ISR( xFirstTimerHandler() );
			ulDidSomething = pdTRUE;
		}

		if( ( TC0->TC_CHANNEL[ tmrTC0_CHANNEL_1 ].TC_SR & tmrRC_COMPARE ) != 0 )
		{
			/* Call the IntQ test function for this channel. */
			portYIELD_FROM_ISR( xSecondTimerHandler() );
			ulDidSomething = pdTRUE;
		}

	} while( ulDidSomething == pdTRUE );
}

void TIMER16_1_IRQHandler(void)
{
	/* Clear the interrupt. */
	LPC_TMR16B1->IR = LPC_TMR16B1->IR;

	/* Call the standard demo int queue timer function for this second timer. */
	portEND_SWITCHING_ISR( xSecondTimerHandler() );
}

void vT2_3_ISR_Handler( void )
{
	/* Re-enabled interrupts. */
	__asm volatile( "SETPSW	I" );

	/* Call the handler that is part of the common code - this is where the
	non-portable code ends and the actual test is performed. */
	portYIELD_FROM_ISR( xSecondTimerHandler() );	
}

void vCMT_1_Channel_1_ISR( void )
{
	/* Clear the interrupt. */
	VIC.PIC0.LONG = ( 1UL << 24UL );

	/* Call the handler that is part of the common code - this is where the
	non-portable code ends and the actual test is performed. */
	portYIELD_FROM_ISR( xSecondTimerHandler() );
}

void TC1_Handler( void )
{
	/* Handler for the second timer in the IntQueue test.  Was the interrupt
	caused by a compare on RC? */
	if( ( tc_get_status( TC0, tmrTIMER_1_CHANNEL ) & ~TC_SR_CPCS ) != 0 )
	{
		portYIELD_FROM_ISR( xSecondTimerHandler() );
	}
}

void vT1InterruptHandler( void )
{
	/* Disable all interrupts because the source bit is shared with a bit used
	by the other timer and the high frequency timer test. */
	__asm volatile( "di" );
	/* Clear the timer interrupt. */
	jtvic_clr_source( MEC14xx_GIRQ23_ID, 1 );
	__asm volatile( "ei" );

	portEND_SWITCHING_ISR( xSecondTimerHandler() );
}

void NVIC_Handler_TMR1( void )
{
	tmrRECORD_NESTING_DEPTH();

	/* Just testing the xPortIsInsideInterrupt() functionality. */
	configASSERT( xPortIsInsideInterrupt() == pdTRUE );

	/* Call the IntQ test function for this channel. */
	portYIELD_FROM_ISR( xSecondTimerHandler() );

	ulNestingDepth--;
}

static void prvTC0_Handler( void )
{
    /* Read will clear the status bit. */
	if( ( TC0->TC_CHANNEL[ tmrTC0_CHANNEL_0 ].TC_SR & tmrRC_COMPARE ) != 0 )
	{
		portYIELD_FROM_ISR( xFirstTimerHandler() );
	}

	if( ( TC0->TC_CHANNEL[ tmrTC0_CHANNEL_1 ].TC_SR & tmrRC_COMPARE ) != 0 )
	{
		portYIELD_FROM_ISR( xSecondTimerHandler() );
	}
}

void vApplicationHPETTimer1Handler( void )
{
BaseType_t xHigherPriorityTaskWoken;

	if( xSchedulerRunning != pdFALSE )
	{
		if( ulInterruptNesting > ulMaxInterruptNesting )
		{
			ulMaxInterruptNesting = ulInterruptNesting;
		}

		xHigherPriorityTaskWoken = xSecondTimerHandler();
		portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
	}
}

void TC0_Handler( void )
{
    /* Read will clear the status bit. */
    if( ( TC0->TC_CHANNEL[ tmrTC0_CHANNEL_0 ].TC_SR & tmrRC_COMPARE ) != 0 )
    {
        /* Call the IntQ test function for this channel. */
        portYIELD_FROM_ISR( xFirstTimerHandler() );
    }

    if( ( TC0->TC_CHANNEL[ tmrTC0_CHANNEL_1 ].TC_SR & tmrRC_COMPARE ) != 0 )
    {
        /* Call the IntQ test function for this channel. */
        portYIELD_FROM_ISR( xSecondTimerHandler() );
    }
}

static void prvTimerHandler( void *pvCallBackRef )
{
uint32_t ulInterruptStatus;
XTtcPs *pxTimer = ( XTtcPs * ) pvCallBackRef;
BaseType_t xYieldRequired;

	/* Read the interrupt status, then write it back to clear the interrupt. */
	ulInterruptStatus = XTtcPs_GetInterruptStatus( pxTimer );
	XTtcPs_ClearInterruptStatus( pxTimer, ulInterruptStatus );

	/* Only one interrupt event type is expected. */
	configASSERT( ( XTTCPS_IXR_INTERVAL_MASK & ulInterruptStatus ) != 0 );

	/* Check the device ID to know which IntQueue demo to call. */
	if( pxTimer->Config.DeviceId == xDeviceIDs[ 0 ] )
	{
		xYieldRequired = xFirstTimerHandler();
	}
	else if( pxTimer->Config.DeviceId == xDeviceIDs[ 1 ] )
	{
		xYieldRequired = xSecondTimerHandler();
	}
	else
	{
		/* The high frequency timer is also used to generate the time base for
		the run time state. */
		ulHighFrequencyTimerCounts++;

		/* Latch the highest interrupt nesting count detected. */
		if( ulPortInterruptNesting > ulMaxRecordedNesting )
		{
			ulMaxRecordedNesting = ulPortInterruptNesting;
		}

		xYieldRequired = pdFALSE;
	}

	/* If xYieldRequired is not pdFALSE then calling either xFirstTimerHandler()
	or xSecondTimerHandler() resulted in a task leaving the blocked state and
	the task that left the blocked state had a priority higher than the currently
	running task (the task this interrupt interrupted) - so a context switch
	should be performed so the interrupt returns directly to the higher priority
	task.  xYieldRequired is tested inside the following macro. */
	portYIELD_FROM_ISR( xYieldRequired );
}

void Excep_PERIB_INTB129( void )
{
	portYIELD_FROM_ISR( xSecondTimerHandler() );
}

void r_tmr_cmia2_interrupt( void )
{
	portYIELD_FROM_ISR( xSecondTimerHandler() );
}

void vT2_3InterruptHandler( void )
{
	portYIELD_FROM_ISR( xSecondTimerHandler() );
}