本文整理汇总了C++中write_nic_byte函数的典型用法代码示例。如果您正苦于以下问题:C++ write_nic_byte函数的具体用法?C++ write_nic_byte怎么用?C++ write_nic_byte使用的例子?那么, 这里精选的函数代码示例或许可以为您提供帮助。
在下文中一共展示了write_nic_byte函数的15个代码示例,这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞,您的评价将有助于系统推荐出更棒的C++代码示例。
示例1: rtl8225_host_usb_init
void rtl8225_host_usb_init(struct net_device *dev)
{
#if 0
write_nic_byte(dev,RFPinsSelect+1,0);
write_nic_byte(dev,GPIO,0);
write_nic_byte_E(dev,0x53,read_nic_byte_E(dev,0x53) | (1<<7));
write_nic_byte(dev,RFPinsSelect+1,4);
write_nic_byte(dev,GPIO,0x20);
write_nic_byte(dev,GP_ENABLE,0);
/* Config BB & RF */
write_nic_word(dev, RFPinsOutput, 0x80);
write_nic_word(dev, RFPinsSelect, 0x80);
write_nic_word(dev, RFPinsEnable, 0x80);
mdelay(100);
mdelay(1000);
#endif
}
示例2: SwLedOn
void SwLedOn( struct net_device *dev , PLED_8190 pLed)
{
u8 LedCfg;
LedCfg = read_nic_byte(dev, LEDCFG);
switch(pLed->LedPin)
{
case LED_PIN_GPIO0:
break;
case LED_PIN_LED0:
write_nic_byte(dev, LEDCFG, LedCfg&0xf0);
break;
case LED_PIN_LED1:
write_nic_byte(dev, LEDCFG, LedCfg&0x0f);
break;
default:
break;
}
pLed->bLedOn = true;
}
示例3: SwLedOff
void SwLedOff(struct net_device *dev, PLED_8190 pLed)
{
struct r8192_priv *priv = rtllib_priv(dev);
u8 LedCfg;
LedCfg = read_nic_byte(dev, LEDCFG);
switch(pLed->LedPin)
{
case LED_PIN_GPIO0:
break;
case LED_PIN_LED0:
LedCfg &= 0xf0;
if(priv->bLedOpenDrain == true)
write_nic_byte(dev, LEDCFG, (LedCfg|BIT1));
else
write_nic_byte(dev, LEDCFG, (LedCfg|BIT3));
break;
case LED_PIN_LED1:
LedCfg &= 0x0f;
write_nic_byte(dev, LEDCFG, (LedCfg|BIT7));
break;
default:
break;
}
pLed->bLedOn = false;
}
示例4: eprom_read
u32 eprom_read(struct net_device *dev, u32 addr)
{
struct r8180_priv *priv = ieee80211_priv(dev);
short read_cmd[]={1,1,0};
short addr_str[8];
int i;
int addr_len;
u32 ret;
ret=0;
//enable EPROM programming
write_nic_byte(dev, EPROM_CMD,
(EPROM_CMD_PROGRAM<<EPROM_CMD_OPERATING_MODE_SHIFT));
force_pci_posting(dev);
udelay(EPROM_DELAY);
if (priv->epromtype==EPROM_93c56){
addr_str[7]=addr & 1;
addr_str[6]=addr & (1<<1);
addr_str[5]=addr & (1<<2);
addr_str[4]=addr & (1<<3);
addr_str[3]=addr & (1<<4);
addr_str[2]=addr & (1<<5);
addr_str[1]=addr & (1<<6);
addr_str[0]=addr & (1<<7);
addr_len=8;
}else{
addr_str[5]=addr & 1;
addr_str[4]=addr & (1<<1);
addr_str[3]=addr & (1<<2);
addr_str[2]=addr & (1<<3);
addr_str[1]=addr & (1<<4);
addr_str[0]=addr & (1<<5);
addr_len=6;
}
eprom_cs(dev, 1);
eprom_ck_cycle(dev);
eprom_send_bits_string(dev, read_cmd, 3);
eprom_send_bits_string(dev, addr_str, addr_len);
//keep chip pin D to low state while reading.
//I'm unsure if it is necessary, but anyway shouldn't hurt
eprom_w(dev, 0);
for(i=0;i<16;i++){
//eeprom needs a clk cycle between writing opcode&adr
//and reading data. (eeprom outs a dummy 0)
eprom_ck_cycle(dev);
ret |= (eprom_r(dev)<<(15-i));
}
eprom_cs(dev, 0);
eprom_ck_cycle(dev);
//disable EPROM programming
write_nic_byte(dev, EPROM_CMD,
(EPROM_CMD_NORMAL<<EPROM_CMD_OPERATING_MODE_SHIFT));
return ret;
}
示例5: eprom_ck_cycle
static void eprom_ck_cycle(struct net_device *dev)
{
write_nic_byte(dev, EPROM_CMD,
(1<<EPROM_CK_SHIFT) | read_nic_byte(dev, EPROM_CMD));
udelay(EPROM_DELAY);
write_nic_byte(dev, EPROM_CMD,
read_nic_byte(dev, EPROM_CMD) & ~(1<<EPROM_CK_SHIFT));
udelay(EPROM_DELAY);
}
示例6: DoTxHighPower
void DoTxHighPower(struct net_device *dev)
{
struct r8180_priv *priv = ieee80211_priv(dev);
u16 HiPwrUpperTh = 0;
u16 HiPwrLowerTh = 0;
u8 RSSIHiPwrUpperTh;
u8 RSSIHiPwrLowerTh;
u8 u1bTmp;
char OfdmTxPwrIdx, CckTxPwrIdx;
HiPwrUpperTh = priv->RegHiPwrUpperTh;
HiPwrLowerTh = priv->RegHiPwrLowerTh;
HiPwrUpperTh = HiPwrUpperTh * 10;
HiPwrLowerTh = HiPwrLowerTh * 10;
RSSIHiPwrUpperTh = priv->RegRSSIHiPwrUpperTh;
RSSIHiPwrLowerTh = priv->RegRSSIHiPwrLowerTh;
OfdmTxPwrIdx = priv->chtxpwr_ofdm[priv->ieee80211->current_network.channel];
CckTxPwrIdx = priv->chtxpwr[priv->ieee80211->current_network.channel];
if ((priv->UndecoratedSmoothedSS > HiPwrUpperTh) ||
(priv->bCurCCKPkt && (priv->CurCCKRSSI > RSSIHiPwrUpperTh))) {
priv->bToUpdateTxPwr = true;
u1bTmp= read_nic_byte(dev, CCK_TXAGC);
if (CckTxPwrIdx == u1bTmp) {
u1bTmp = (u1bTmp > 16) ? (u1bTmp -16): 0;
write_nic_byte(dev, CCK_TXAGC, u1bTmp);
u1bTmp= read_nic_byte(dev, OFDM_TXAGC);
u1bTmp = (u1bTmp > 16) ? (u1bTmp -16): 0;
write_nic_byte(dev, OFDM_TXAGC, u1bTmp);
}
} else if ((priv->UndecoratedSmoothedSS < HiPwrLowerTh) &&
(!priv->bCurCCKPkt || priv->CurCCKRSSI < RSSIHiPwrLowerTh)) {
if (priv->bToUpdateTxPwr) {
priv->bToUpdateTxPwr = false;
u1bTmp= read_nic_byte(dev, CCK_TXAGC);
if (u1bTmp < CckTxPwrIdx) {
write_nic_byte(dev, CCK_TXAGC, CckTxPwrIdx);
}
u1bTmp= read_nic_byte(dev, OFDM_TXAGC);
if (u1bTmp < OfdmTxPwrIdx) {
write_nic_byte(dev, OFDM_TXAGC, OfdmTxPwrIdx);
}
}
}
}
示例7: fw_SetRQPN
static void fw_SetRQPN(struct net_device *dev)
{
write_nic_dword(dev, RQPN, 0xffffffff);
write_nic_dword(dev, RQPN+4, 0xffffffff);
write_nic_byte(dev, RQPN+8, 0xff);
write_nic_byte(dev, RQPN+0xB, 0x80);
} /* fw_SetRQPN */
示例8: eprom_w
static void eprom_w(struct net_device *dev, short bit)
{
if (bit)
write_nic_byte(dev, EPROM_CMD, (1<<EPROM_W_SHIFT) |
read_nic_byte(dev, EPROM_CMD));
else
write_nic_byte(dev, EPROM_CMD, read_nic_byte(dev, EPROM_CMD)
& ~(1<<EPROM_W_SHIFT));
udelay(EPROM_DELAY);
}
示例9: eprom_w
void eprom_w(struct net_device *dev,short bit)
{
if(bit)
write_nic_byte(dev, EPROM_CMD, (1<<EPROM_W_SHIFT) | \
read_nic_byte(dev,EPROM_CMD));
else
write_nic_byte(dev, EPROM_CMD, read_nic_byte(dev,EPROM_CMD)\
&~(1<<EPROM_W_SHIFT));
force_pci_posting(dev);
udelay(EPROM_DELAY);
}
示例10: eprom_read
u32 eprom_read(struct net_device *dev, u32 addr)
{
struct r8192_priv *priv = rtllib_priv(dev);
short read_cmd[] = {1, 1, 0};
short addr_str[8];
int i;
int addr_len;
u32 ret;
ret = 0;
write_nic_byte(dev, EPROM_CMD,
(EPROM_CMD_PROGRAM << EPROM_CMD_OPERATING_MODE_SHIFT));
udelay(EPROM_DELAY);
if (priv->epromtype == EEPROM_93C56) {
addr_str[7] = addr & 1;
addr_str[6] = addr & (1<<1);
addr_str[5] = addr & (1<<2);
addr_str[4] = addr & (1<<3);
addr_str[3] = addr & (1<<4);
addr_str[2] = addr & (1<<5);
addr_str[1] = addr & (1<<6);
addr_str[0] = addr & (1<<7);
addr_len = 8;
} else {
addr_str[5] = addr & 1;
addr_str[4] = addr & (1<<1);
addr_str[3] = addr & (1<<2);
addr_str[2] = addr & (1<<3);
addr_str[1] = addr & (1<<4);
addr_str[0] = addr & (1<<5);
addr_len = 6;
}
eprom_cs(dev, 1);
eprom_ck_cycle(dev);
eprom_send_bits_string(dev, read_cmd, 3);
eprom_send_bits_string(dev, addr_str, addr_len);
eprom_w(dev, 0);
for (i = 0; i < 16; i++) {
eprom_ck_cycle(dev);
ret |= (eprom_r(dev)<<(15-i));
}
eprom_cs(dev, 0);
eprom_ck_cycle(dev);
write_nic_byte(dev, EPROM_CMD,
(EPROM_CMD_NORMAL<<EPROM_CMD_OPERATING_MODE_SHIFT));
return ret;
}
示例11: eprom_cs
void eprom_cs(struct net_device *dev, short bit)
{
if(bit)
write_nic_byte(dev, EPROM_CMD,
(1<<EPROM_CS_SHIFT) | \
read_nic_byte(dev, EPROM_CMD)); //enable EPROM
else
write_nic_byte(dev, EPROM_CMD, read_nic_byte(dev, EPROM_CMD)\
&~(1<<EPROM_CS_SHIFT)); //disable EPROM
force_pci_posting(dev);
udelay(EPROM_DELAY);
}
示例12: PHY_SetRF0222DBandwidth
//just in phy
void PHY_SetRF0222DBandwidth(struct net_device* dev , HT_CHANNEL_WIDTH Bandwidth) //20M or 40M
{
u8 eRFPath;
struct r8192_priv *priv = ieee80211_priv(dev);
//if (IS_HARDWARE_TYPE_8192S(dev))
if (1)
{
#ifndef RTL92SE_FPGA_VERIFY
switch(Bandwidth)
{
case HT_CHANNEL_WIDTH_20:
#ifdef FIB_MODIFICATION
write_nic_byte(dev, rFPGA0_AnalogParameter2, 0x58);
#endif
rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, RF_CHNLBW, BIT10|BIT11, 0x01);
break;
case HT_CHANNEL_WIDTH_20_40:
#ifdef FIB_MODIFICATION
write_nic_byte(dev, rFPGA0_AnalogParameter2, 0x18);
#endif
rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, RF_CHNLBW, BIT10|BIT11, 0x00);
break;
default:
;//RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetRF8225Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth ));
break;
}
#endif
}
else
{
for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++)
{
switch(Bandwidth)
{
case HT_CHANNEL_WIDTH_20:
//rtl8192_phy_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, RF_CHNLBW, (BIT10|BIT11), 0x01);
break;
case HT_CHANNEL_WIDTH_20_40:
//rtl8192_phy_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, RF_CHNLBW, (BIT10|BIT11), 0x00);
break;
default:
;//RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetRF8225Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth ));
break;
}
}
}
}
示例13: EnableHWSecurityConfig8192
void EnableHWSecurityConfig8192(struct net_device *dev)
{
u8 SECR_value = 0x0;
struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
struct rtllib_device* ieee = priv->rtllib;
SECR_value = SCR_TxEncEnable | SCR_RxDecEnable;
#ifdef _RTL8192_EXT_PATCH_
if ((((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type)) && (priv->rtllib->auth_mode != 2))
&&(ieee->iw_mode != IW_MODE_MESH))
#else
if (((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type)) && (priv->rtllib->auth_mode != 2))
#endif
{
SECR_value |= SCR_RxUseDK;
SECR_value |= SCR_TxUseDK;
}
else if ((ieee->iw_mode == IW_MODE_ADHOC) && (ieee->pairwise_key_type & (KEY_TYPE_CCMP | KEY_TYPE_TKIP)))
{
SECR_value |= SCR_RxUseDK;
SECR_value |= SCR_TxUseDK;
}
ieee->hwsec_active = 1;
#ifdef _RTL8192_EXT_PATCH_
if ((ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE) || !hwwep )
{
ieee->hwsec_active = 0;
SECR_value &= ~SCR_RxDecEnable;
SECR_value &= ~SCR_TxUseDK;
SECR_value &= ~SCR_RxUseDK;
SECR_value &= ~SCR_TxEncEnable;
}
#else
if ((ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE) || !hwwep)
{
ieee->hwsec_active = 0;
SECR_value &= ~SCR_RxDecEnable;
}
#endif
#ifdef RTL8192CE
write_nic_byte(dev, REG_CR+1,0x02);
#endif
RT_TRACE(COMP_SEC,"%s:, hwsec:%d, pairwise_key:%d, SECR_value:%x\n", __FUNCTION__, \
ieee->hwsec_active, ieee->pairwise_key_type, SECR_value);
{
write_nic_byte(dev, SECR, SECR_value);
}
}
示例14: PlatformIOWrite4Byte
static void PlatformIOWrite4Byte(struct net_device *dev, u32 offset, u32 data)
{
if (offset == PhyAddr) {
/* For Base Band configuration. */
unsigned char cmdByte;
unsigned long dataBytes;
unsigned char idx;
u8 u1bTmp;
cmdByte = (u8)(data & 0x000000ff);
dataBytes = data>>8;
/* NdisAcquireSpinLock( &(pDevice->IoSpinLock) ); */
for (idx = 0; idx < 30; idx++) {
/* Make sure command bit is clear before access it. */
u1bTmp = PlatformIORead1Byte(dev, PhyAddr);
if ((u1bTmp & BIT7) == 0)
break;
else
mdelay(10);
}
for (idx = 0; idx < 3; idx++)
PlatformIOWrite1Byte(dev, offset+1+idx, ((u8 *)&dataBytes)[idx]);
write_nic_byte(dev, offset, cmdByte);
/* NdisReleaseSpinLock( &(pDevice->IoSpinLock) ); */
} else {
示例15: FirmwareEnableCPU
bool FirmwareEnableCPU(struct net_device *dev)
{
bool rtStatus = true;
u8 tmpU1b, CPUStatus = 0;
u16 tmpU2b;
u32 iCheckTime = 200;
/* Enable CPU. */
tmpU1b = read_nic_byte(dev, SYS_CLKR);
/* AFE source */
write_nic_byte(dev, SYS_CLKR, (tmpU1b|SYS_CPU_CLKSEL));
tmpU2b = read_nic_word(dev, SYS_FUNC_EN);
write_nic_word(dev, SYS_FUNC_EN, (tmpU2b|FEN_CPUEN));
/* Poll IMEM Ready after CPU has refilled. */
do {
CPUStatus = read_nic_byte(dev, TCR);
if (CPUStatus & IMEM_RDY)
/* success */
break;
udelay(100);
} while (iCheckTime--);
if (!(CPUStatus & IMEM_RDY)) {
RT_TRACE(COMP_ERR, "%s(): failed to enable CPU", __func__);
rtStatus = false;
}
return rtStatus;
}