本文整理汇总了C++中socle_scu_write函数的典型用法代码示例。如果您正苦于以下问题:C++ socle_scu_write函数的具体用法?C++ socle_scu_write怎么用?C++ socle_scu_write使用的例子?那么恭喜您, 这里精选的函数代码示例或许可以为您提供帮助。
在下文中一共展示了socle_scu_write函数的15个代码示例,这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞,您的评价将有助于系统推荐出更棒的C++代码示例。
示例1: socle_scu_slow_mode_disable
/* slow mode -- systen clock */
extern void
socle_scu_slow_mode_disable (int i)
{
u32 tmp;
tmp = socle_scu_read(SOCLE_SCU_PWMCON);
if(i == 1)
socle_scu_write(tmp & ~SCU_PWMCON_PWR_NOR, SOCLE_SCU_PWMCON);
else
socle_scu_write(tmp | SCU_PWMCON_PWR_NOR, SOCLE_SCU_PWMCON);
return ;
}
示例2: socle_scu_pw_standbywfi_enable
/* Stand by wait for interrupt */
extern void
socle_scu_pw_standbywfi_enable (int i)
{
u32 tmp;
tmp = socle_scu_read(SOCLE_SCU_PWMCON);
if(i ==1)
socle_scu_write(tmp | SCU_PWMCON_STANDBYWFI , SOCLE_SCU_PWMCON);
else
socle_scu_write(tmp & ~SCU_PWMCON_STANDBYWFI , SOCLE_SCU_PWMCON);
return ;
}
示例3: socle_scu_stop_mode_enable
/* stop mode -- systen clock */
extern void
socle_scu_stop_mode_enable (int i)
{
u32 tmp;
tmp = socle_scu_read(SOCLE_SCU_PWMCON);
if(i == 1)
socle_scu_write(tmp | SCU_PWMCON_PWR_STOP , SOCLE_SCU_PWMCON);
else
socle_scu_write(tmp & ~SCU_PWMCON_PWR_STOP , SOCLE_SCU_PWMCON);
return ;
}
示例4: socle_scu_upll_power_status_set
/* UPLL power down/normal */
extern void
socle_scu_upll_power_status_set (int act)
{
u32 tmp;
tmp = socle_scu_read(SOCLE_SCU_UPLLCON);
if(act)
socle_scu_write(tmp & (~SCU_UPLLCON_PLL_PWR_DN) , SOCLE_SCU_UPLLCON);
else
socle_scu_write(tmp | SCU_UPLLCON_PLL_PWR_DN , SOCLE_SCU_UPLLCON);
return ;
}
示例5: socle_scu_mpll_power_status_set
/* MPLL power down/normal */
extern void
socle_scu_mpll_power_status_set (int act)
{
u32 tmp;
tmp = socle_scu_read(SOCLE_SCU_PWMCON);
if(act)
socle_scu_write(tmp | SCU_PWMCON_PWR_NOR , SOCLE_SCU_PWMCON);
else
socle_scu_write(tmp & ~SCU_PWMCON_PWR_NOR , SOCLE_SCU_PWMCON);
return ;
}
示例6: socle_scu_info3_set
/* User defined information register */
extern void
socle_scu_info3_set (u32 inf)
{
socle_scu_write(inf, SOCLE_SCU_INFORM3);
return ;
}
示例7: socle_scu_uart_clk_upll_4_set
extern int
socle_scu_uart_clk_upll_4_set (int uart)
{
u32 tmp;
tmp = socle_scu_read(SOCLE_SCU_MCLKDIV);
switch(uart){
case 0 :
tmp = (tmp & ~SCU_MCLKDIV_UART0_CLK_M) | (SCU_MCLKDIV_UART_CLK_UPLL_4 << SCU_MCLKDIV_UART0_CLK_S);
break;
case 1:
tmp = (tmp & ~SCU_MCLKDIV_UART1_CLK_M) | (SCU_MCLKDIV_UART_CLK_UPLL_4 << SCU_MCLKDIV_UART1_CLK_S);
break;
case 2:
tmp = (tmp & ~SCU_MCLKDIV_UART2_CLK_M) | (SCU_MCLKDIV_UART_CLK_UPLL_4 << SCU_MCLKDIV_UART2_CLK_S);
break;
default :
socle_scu_show("unknow UART index\n");
return -1;
break;
}
socle_scu_write(tmp, SOCLE_SCU_MCLKDIV);
return 0;
}
示例8: socle_scu_info_set
/* User defined information register */
extern void
socle_scu_info_set (int index, u32 info)
{
socle_scu_write(info, SOCLE_SCU_INFORM0 + index*4);
return ;
}
示例9: socle_scu_hdma_req23_uart
extern int
socle_scu_hdma_req23_uart(int uart)
{
u32 tmp;
tmp = socle_scu_read(SOCLE_SCU_DEVCON) ;
tmp &= ~SCU_DEVCON_UART_HDMA23_M;
switch(uart){
case 0:
tmp |= (UART0_WITH_HDMA << SCU_DEVCON_UART_HDMA23_S);
break;
case 1:
tmp |= (UART1_WITH_HDMA << SCU_DEVCON_UART_HDMA23_S);
break;
case 2:
tmp |= (UART2_WITH_HDMA << SCU_DEVCON_UART_HDMA23_S);
break;
default :
socle_scu_show("unknow uart number\n");
return -1;
break;
}
socle_scu_write(tmp, SOCLE_SCU_DEVCON);
return 0;
}
示例10: socle_scu_clock_ratio_set
/* CPU/AHB clock ratio */
extern int
socle_scu_clock_ratio_set (int ratio)
{
u32 tmp;
tmp = socle_scu_read(SOCLE_SCU_MCLKDIV) & ~SCU_MCLKDIV_CLK_RATIO_MASK;
switch(ratio){
case SOCLE_SCU_CLOCK_RATIO_1_1 :
tmp = tmp |SCU_MCLKDIV_CLK_RATIO_1_1;
break;
case SOCLE_SCU_CLOCK_RATIO_2_1 :
tmp = tmp |SCU_MCLKDIV_CLK_RATIO_2_1;
break;
case SOCLE_SCU_CLOCK_RATIO_3_1 :
tmp = tmp |SCU_MCLKDIV_CLK_RATIO_3_1;
break;
case SOCLE_SCU_CLOCK_RATIO_4_1 :
tmp = tmp |SCU_MCLKDIV_CLK_RATIO_4_1;
break;
default :
socle_scu_show("unknow ratio value\n");
return -1;
break;
}
socle_scu_write(tmp, SOCLE_SCU_MCLKDIV);
return 0;
}
示例11: socle_scu_upll_normal
/* UPLL power down/normal */
extern void
socle_scu_upll_normal (void)
{
u32 tmp;
tmp = socle_scu_read(SOCLE_SCU_UPLLCON);
socle_scu_write(tmp & (~SCU_UPLLCON_PLL_PWR_DN) , SOCLE_SCU_UPLLCON);
return ;
}
示例12: socle_scu_mpll_normal
/* MPLL power down/normal */
extern void
socle_scu_mpll_normal (void)
{
u32 tmp;
tmp = socle_scu_read(SOCLE_SCU_PWMCON);
socle_scu_write(tmp | SCU_PWMCON_PWR_NOR , SOCLE_SCU_PWMCON);
return ;
}
示例13: socle_scu_mpll_power_down
extern void
socle_scu_mpll_power_down (void)
{
u32 tmp;
tmp = socle_scu_read(SOCLE_SCU_PWMCON);
socle_scu_write(tmp & ~SCU_PWMCON_PWR_NOR , SOCLE_SCU_PWMCON);
return ;
}
示例14: socle_scu_upll_power_down
extern void
socle_scu_upll_power_down (void)
{
u32 tmp;
tmp = socle_scu_read(SOCLE_SCU_UPLLCON);
socle_scu_write(tmp | SCU_UPLLCON_PLL_PWR_DN , SOCLE_SCU_UPLLCON);
return ;
}
示例15: socle_scu_uhc0_48clock_input_upll
extern void
socle_scu_uhc0_48clock_input_upll(void)
{
u32 tmp;
tmp = socle_scu_read(SOCLE_SCU_DEVCON) ;
tmp |= SCU_DEVCON_UHC0_48CLK_UPLL;
socle_scu_write(tmp, SOCLE_SCU_DEVCON);
}