本文整理汇总了C++中soc_is_exynos5250函数的典型用法代码示例。如果您正苦于以下问题:C++ soc_is_exynos5250函数的具体用法?C++ soc_is_exynos5250怎么用?C++ soc_is_exynos5250使用的例子?那么恭喜您, 这里精选的函数代码示例或许可以为您提供帮助。
在下文中一共展示了soc_is_exynos5250函数的15个代码示例,这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞,您的评价将有助于系统推荐出更棒的C++代码示例。
示例1: combiner_init
static void __init combiner_init(void __iomem *combiner_base,
struct device_node *np)
{
int i, irq, irq_base;
unsigned int nr_irq, soc_max_nr;
soc_max_nr = (soc_is_exynos5250() || soc_is_exynos542x())
? EXYNOS5_MAX_COMBINER_NR : EXYNOS4_MAX_COMBINER_NR;
if (np) {
if (of_property_read_u32(np, "samsung,combiner-nr", &max_nr)) {
pr_warning("%s: number of combiners not specified, "
"setting default as %d.\n",
__func__, EXYNOS4_MAX_COMBINER_NR);
max_nr = EXYNOS4_MAX_COMBINER_NR;
}
} else {
max_nr = soc_is_exynos5250() ? EXYNOS5_MAX_COMBINER_NR :
EXYNOS4_MAX_COMBINER_NR;
}
nr_irq = max_nr * MAX_IRQ_IN_COMBINER;
irq_base = irq_alloc_descs(COMBINER_IRQ(0, 0), 1, nr_irq, 0);
if (IS_ERR_VALUE(irq_base)) {
irq_base = COMBINER_IRQ(0, 0);
pr_warning("%s: irq desc alloc failed. Continuing with %d as linux irq base\n", __func__, irq_base);
}
combiner_irq_domain = irq_domain_add_legacy(np, nr_irq, irq_base, 0,
&combiner_irq_domain_ops, &combiner_data);
if (WARN_ON(!combiner_irq_domain)) {
pr_warning("%s: irq domain init failed\n", __func__);
return;
}
for (i = 0; i < max_nr; i++) {
combiner_init_one(i, combiner_base + (i >> 2) * 0x10);
irq = IRQ_SPI(i);
#ifdef CONFIG_OF
if (np)
irq = irq_of_parse_and_map(np, i);
#endif
combiner_cascade_irq(i, irq);
}
#ifdef CONFIG_PM
/* Setup suspend/resume combiner saving */
cpu_pm_register_notifier(&combiner_notifier_block);
#endif
}
示例2: exynos_dwmci_set_platdata
void __init exynos_dwmci_set_platdata(struct dw_mci_board *pd, u32 slot_id)
{
struct dw_mci_board *npd = NULL;
if ((soc_is_exynos4210()) || soc_is_exynos4212() ||
soc_is_exynos4412()) {
npd = s3c_set_platdata(pd, sizeof(struct dw_mci_board),
&exynos4_device_dwmci);
} else if (soc_is_exynos5250()) {
if (slot_id < ARRAY_SIZE(exynos5_dwmci_devs))
npd = s3c_set_platdata(pd, sizeof(struct dw_mci_board),
exynos5_dwmci_devs[slot_id]);
else
pr_err("%s: slot %d is not supported\n", __func__,
slot_id);
}
if (!npd)
return;
if (!npd->init)
npd->init = exynos_dwmci_init;
if (!npd->get_bus_wd)
npd->get_bus_wd = exynos_dwmci_get_bus_wd;
if (!npd->set_io_timing)
npd->set_io_timing = exynos_dwmci_set_io_timing;
if (!npd->get_ocr)
npd->get_ocr = exynos_dwmci_get_ocr;
}
示例3: s3c64xx_spi0_cfg_gpio
int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
{
int gpio;
if (soc_is_exynos5410()) {
s3c_gpio_cfgpin(EXYNOS5410_GPA2(0), S3C_GPIO_SFN(2));
s3c_gpio_setpull(EXYNOS5410_GPA2(0), S3C_GPIO_PULL_UP);
s3c_gpio_cfgall_range(EXYNOS5410_GPA2(2), 2,
S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
for (gpio = EXYNOS5410_GPA2(0);
gpio < EXYNOS5410_GPA2(4); gpio++)
s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV3);
} else if (soc_is_exynos5250()) {
s3c_gpio_cfgpin(EXYNOS5_GPA2(0), S3C_GPIO_SFN(2));
s3c_gpio_setpull(EXYNOS5_GPA2(0), S3C_GPIO_PULL_UP);
s3c_gpio_cfgall_range(EXYNOS5_GPA2(2), 2,
S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
for (gpio = EXYNOS5_GPA2(0); gpio < EXYNOS5_GPA2(4); gpio++)
s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV3);
} else {
s3c_gpio_cfgpin(EXYNOS4_GPB(0), S3C_GPIO_SFN(2));
s3c_gpio_setpull(EXYNOS4_GPB(0), S3C_GPIO_PULL_UP);
s3c_gpio_cfgall_range(EXYNOS4_GPB(2), 2,
S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
for (gpio = EXYNOS4_GPB(0); gpio < EXYNOS4_GPB(4); gpio++)
s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV3);
}
return 0;
}
示例4: s3c_i2c4_cfg_gpio
void s3c_i2c4_cfg_gpio(struct platform_device *dev)
{
if (soc_is_exynos4210())
s3c_gpio_cfgall_range(EXYNOS4_GPB(2), 2,
S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
else if (soc_is_exynos4212() || soc_is_exynos4412() || soc_is_exynos4415())
s3c_gpio_cfgall_range(EXYNOS4_GPB(0), 2,
S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
else if (soc_is_exynos5250())
s3c_gpio_cfgall_range(EXYNOS5_GPA2(0), 2,
S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
else if (soc_is_exynos5260())
s3c_gpio_cfgall_range(EXYNOS5260_GPB5(0), 2,
S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
else if (soc_is_exynos3250())
s3c_gpio_cfgall_range(EXYNOS3_GPB(0), 2,
S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
else
pr_err("failed to configure gpio for i2c4\n");
}
示例5: exynos_pmu_init
static int __init exynos_pmu_init(void)
{
unsigned int value;
exynos_pmu_config = exynos4210_pmu_config;
if (soc_is_exynos4210()) {
exynos_pmu_config = exynos4210_pmu_config;
pr_info("EXYNOS4210 PMU Initialize\n");
} else if (soc_is_exynos4212() || soc_is_exynos4412()) {
exynos_pmu_config = exynos4x12_pmu_config;
pr_info("EXYNOS4x12 PMU Initialize\n");
} else if (soc_is_exynos5250()) {
/*
* When SYS_WDTRESET is set, watchdog timer reset request
* is ignored by power management unit.
*/
value = __raw_readl(EXYNOS5_AUTO_WDTRESET_DISABLE);
value &= ~EXYNOS5_SYS_WDTRESET;
__raw_writel(value, EXYNOS5_AUTO_WDTRESET_DISABLE);
value = __raw_readl(EXYNOS5_MASK_WDTRESET_REQUEST);
value &= ~EXYNOS5_SYS_WDTRESET;
__raw_writel(value, EXYNOS5_MASK_WDTRESET_REQUEST);
exynos_pmu_config = exynos5250_pmu_config;
pr_info("EXYNOS5250 PMU Initialize\n");
} else {
pr_info("EXYNOS: PMU not supported\n");
}
return 0;
}
示例6: exynos_pmu_init
static int __init exynos_pmu_init(void)
{
unsigned int value;
exynos_pmu_config = exynos4210_pmu_config;
if (soc_is_exynos3250()) {
/*
* To prevent form issuing new bus request form L2 memory system
* If core status is power down, should be set '1' to L2 power down
*/
value = __raw_readl(EXYNOS3_ARM_COMMON_OPTION);
value |= EXYNOS3_OPTION_SKIP_DEACTIVATE_ACEACP_IN_PWDN;
__raw_writel(value, EXYNOS3_ARM_COMMON_OPTION);
/* Enable USE_STANDBY_WFI for all CORE */
__raw_writel(S5P_USE_STANDBY_WFI_ALL, S5P_CENTRAL_SEQ_OPTION);
/*
* Set PSHOLD port for ouput high
*/
value = __raw_readl(S5P_PS_HOLD_CONTROL);
value |= S5P_PS_HOLD_OUTPUT_HIGH;
__raw_writel(value, S5P_PS_HOLD_CONTROL);
/*
* Enable signal for PSHOLD port
*/
value = __raw_readl(S5P_PS_HOLD_CONTROL);
value |= S5P_PS_HOLD_EN;
__raw_writel(value, S5P_PS_HOLD_CONTROL);
exynos_pmu_config = exynos3250_pmu_config;
pr_info("EXYNOS3250 PMU Initialize\n");
} else if (soc_is_exynos4210()) {
exynos_pmu_config = exynos4210_pmu_config;
pr_info("EXYNOS4210 PMU Initialize\n");
} else if (soc_is_exynos4212() || soc_is_exynos4412()) {
exynos_pmu_config = exynos4x12_pmu_config;
pr_info("EXYNOS4x12 PMU Initialize\n");
} else if (soc_is_exynos5250()) {
/*
* When SYS_WDTRESET is set, watchdog timer reset request
* is ignored by power management unit.
*/
value = __raw_readl(EXYNOS5_AUTO_WDTRESET_DISABLE);
value &= ~EXYNOS5_SYS_WDTRESET;
__raw_writel(value, EXYNOS5_AUTO_WDTRESET_DISABLE);
value = __raw_readl(EXYNOS5_MASK_WDTRESET_REQUEST);
value &= ~EXYNOS5_SYS_WDTRESET;
__raw_writel(value, EXYNOS5_MASK_WDTRESET_REQUEST);
exynos_pmu_config = exynos5250_pmu_config;
pr_info("EXYNOS5250 PMU Initialize\n");
} else {
pr_info("EXYNOS: PMU not supported\n");
}
return 0;
}
示例7: s5p_tv_setup
void s5p_tv_setup(void)
{
int ret;
/* direct HPD to HDMI chip */
if (soc_is_exynos4412()) {
gpio_request(GPIO_HDMI_HPD, "hpd-plug");
gpio_direction_input(GPIO_HDMI_HPD);
s3c_gpio_cfgpin(GPIO_HDMI_HPD, S3C_GPIO_SFN(0x3));
s3c_gpio_setpull(GPIO_HDMI_HPD, S3C_GPIO_PULL_NONE);
} else if (soc_is_exynos5250()) {
gpio_request(GPIO_HDMI_HPD, "hpd-plug");
gpio_direction_input(GPIO_HDMI_HPD);
s3c_gpio_cfgpin(GPIO_HDMI_HPD, S3C_GPIO_SFN(0x3));
s3c_gpio_setpull(GPIO_HDMI_HPD, S3C_GPIO_PULL_NONE);
/* HDMI CEC */
gpio_request(GPIO_HDMI_CEC, "hdmi-cec");
gpio_direction_input(GPIO_HDMI_CEC);
s3c_gpio_cfgpin(GPIO_HDMI_CEC, S3C_GPIO_SFN(0x3));
s3c_gpio_setpull(GPIO_HDMI_CEC, S3C_GPIO_PULL_NONE);
} else {
printk(KERN_ERR "HPD GPIOs are not defined!\n");
}
}
示例8: s3c_i2c1_cfg_gpio
void s3c_i2c1_cfg_gpio(struct platform_device *dev)
{
if (soc_is_exynos5250())
s3c_gpio_cfgall_range(EXYNOS5_GPB3(2), 2,
S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
else if (soc_is_exynos5260())
s3c_gpio_cfgall_range(EXYNOS5260_GPB4(2), 2,
S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
else if (soc_is_exynos5410())
s3c_gpio_cfgall_range(EXYNOS5410_GPB3(2), 2,
S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
else if (soc_is_exynos5420())
s3c_gpio_cfgall_range(EXYNOS5420_GPB3(2), 2,
S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
else if (soc_is_exynos3250())
s3c_gpio_cfgall_range(EXYNOS3_GPD1(2), 2,
S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
else /* EXYNOS4210, EXYNOS4212, and EXYNOS4412 */
s3c_gpio_cfgall_range(EXYNOS4_GPD1(2), 2,
S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
}
示例9: s3c_adc_phy_init
void s3c_adc_phy_init(void)
{
u32 reg;
if (soc_is_exynos5250() || soc_is_exynos4415() ||
soc_is_exynos3470() || soc_is_exynos3250()) {
reg = __raw_readl(EXYNOS5250_ADC_PHY_CONTROL);
reg |= EXYNOS5_ADC_PHY_ENABLE;
__raw_writel(reg, EXYNOS5250_ADC_PHY_CONTROL);
} else if (soc_is_exynos5410() || soc_is_exynos5420()) {
reg = __raw_readl(EXYNOS5410_ADC_PHY_CONTROL);
reg |= EXYNOS5_ADC_PHY_ENABLE;
__raw_writel(reg, EXYNOS5410_ADC_PHY_CONTROL);
} else if (soc_is_exynos5260()) {
/* ADC phy select */
reg = readl(EXYNOS5260_SYSCON_PERI_PHY_SELECT);
if (reg & EXYNOS5260_SYSCON_PERI_PHY_SELECT_ISP_ONLY)
reg &= ~(EXYNOS5260_SYSCON_PERI_PHY_SELECT_ISP_ONLY);
writel(reg, EXYNOS5260_SYSCON_PERI_PHY_SELECT);
reg = __raw_readl(EXYNOS5260_ADC_PHY_CONTROL);
reg |= EXYNOS5_ADC_PHY_ENABLE;
__raw_writel(reg, EXYNOS5260_ADC_PHY_CONTROL);
}
}
示例10: s3c_irq_wake
int s3c_irq_wake(struct irq_data *data, unsigned int state)
{
unsigned long irqbit;
unsigned int irq_rtc_tic, irq_rtc_alarm;
#ifdef CONFIG_ARCH_EXYNOS
if (soc_is_exynos5250()) {
irq_rtc_tic = EXYNOS5_IRQ_RTC_TIC;
irq_rtc_alarm = EXYNOS5_IRQ_RTC_ALARM;
} else {
irq_rtc_tic = EXYNOS4_IRQ_RTC_TIC;
irq_rtc_alarm = EXYNOS4_IRQ_RTC_ALARM;
}
#else
irq_rtc_tic = IRQ_RTC_TIC;
irq_rtc_alarm = IRQ_RTC_ALARM;
#endif
if (data->irq == irq_rtc_tic || data->irq == irq_rtc_alarm) {
irqbit = 1 << (data->irq + 1 - irq_rtc_alarm);
if (!state)
s3c_irqwake_intmask |= irqbit;
else
s3c_irqwake_intmask &= ~irqbit;
} else {
return -ENOENT;
}
return 0;
}
示例11: smp_init_cpus
void __init smp_init_cpus(void)
{
void __iomem *scu_base = scu_base_addr();
unsigned int i, ncores;
if (soc_is_exynos4210() || soc_is_exynos4212() ||
soc_is_exynos5250())
ncores = 2;
else if (soc_is_exynos4412() || soc_is_exynos5410())
ncores = 4;
else
ncores = scu_base ? scu_get_core_count(scu_base) : 1;
/* sanity check */
if (ncores > nr_cpu_ids) {
pr_warn("SMP: %u cores greater than maximum (%u), clipping\n",
ncores, nr_cpu_ids);
ncores = nr_cpu_ids;
}
for (i = 0; i < ncores; i++)
set_cpu_possible(i, true);
set_smp_cross_call(gic_raise_softirq);
}
示例12: exynos_cfg_i2s_gpio
static int exynos_cfg_i2s_gpio(struct platform_device *pdev)
{
/* configure GPIO for i2s port */
struct exynos_gpio_cfg exynos4_cfg[3] = {
{ EXYNOS4_GPZ(0), 7, S3C_GPIO_SFN(2) },
{ EXYNOS4_GPC0(0), 5, S3C_GPIO_SFN(2) },
{ EXYNOS4_GPC1(0), 5, S3C_GPIO_SFN(2) }
};
struct exynos_gpio_cfg exynos5_cfg[3] = {
{ EXYNOS5_GPZ(0), 7, S3C_GPIO_SFN(2) },
{ EXYNOS5_GPB0(0), 5, S3C_GPIO_SFN(2) },
{ EXYNOS5_GPB1(0), 5, S3C_GPIO_SFN(2) }
};
if (pdev->id < 0 || pdev->id > 2) {
printk(KERN_ERR "Invalid Device %d\n", pdev->id);
return -EINVAL;
}
if (soc_is_exynos4210() || soc_is_exynos4212() || soc_is_exynos4412())
s3c_gpio_cfgpin_range(exynos4_cfg[pdev->id].addr,
exynos4_cfg[pdev->id].num, exynos4_cfg[pdev->id].bit);
else if (soc_is_exynos5250())
s3c_gpio_cfgpin_range(exynos5_cfg[pdev->id].addr,
exynos5_cfg[pdev->id].num, exynos5_cfg[pdev->id].bit);
return 0;
}
示例13: exynos_sys_powerdown_conf
void exynos_sys_powerdown_conf(enum sys_powerdown mode)
{
unsigned int i;
if (soc_is_exynos3250()) {
exynos3250_init_pmu();
if (mode == SYS_SLEEP) {
__raw_writel(0x00000BB8, EXYNOS3_XUSBXTI_DURATION);
__raw_writel(0x00000BB8, EXYNOS3_XXTI_DURATION);
__raw_writel(0x00001D4C,
EXYNOS3_EXT_REGULATOR_DURATION);
__raw_writel(0x00001D4C,
EXYNOS3_EXT_REGULATOR_COREBLK_DURATION);
}
}
if (soc_is_exynos5250())
exynos5_init_pmu();
for (i = 0; (exynos_pmu_config[i].reg != PMU_TABLE_END) ; i++)
__raw_writel(exynos_pmu_config[i].val[mode],
exynos_pmu_config[i].reg);
if (soc_is_exynos4412()) {
for (i = 0; exynos4412_pmu_config[i].reg != PMU_TABLE_END ; i++)
__raw_writel(exynos4412_pmu_config[i].val[mode],
exynos4412_pmu_config[i].reg);
}
}
示例14: s3c_i2c0_cfg_gpio
void s3c_i2c0_cfg_gpio(struct platform_device *dev)
{
if (soc_is_exynos5250())
/* will be implemented with gpio function */
return;
s3c_gpio_cfgall_range(EXYNOS4_GPD1(0), 2,
S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
}
示例15: s3c_i2c6_cfg_gpio
void s3c_i2c6_cfg_gpio(struct platform_device *dev)
{
if (soc_is_exynos5210() || soc_is_exynos5250())
s3c_gpio_cfgall_range(EXYNOS5_GPB1(3), 2,
S3C_GPIO_SFN(4), S3C_GPIO_PULL_UP);
else
s3c_gpio_cfgall_range(EXYNOS4_GPC1(3), 2,
S3C_GPIO_SFN(4), S3C_GPIO_PULL_UP);
}