本文整理汇总了C++中sim_is_active函数的典型用法代码示例。如果您正苦于以下问题：C++ sim_is_active函数的具体用法？C++ sim_is_active怎么用？C++ sim_is_active使用的例子？那么恭喜您, 这里精选的函数代码示例或许可以为您提供帮助。
在下文中一共展示了sim_is_active函数的15个代码示例，这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞，您的评价将有助于系统推荐出更棒的C++代码示例。
示例1: mux
t_stat mux (uint32 fnc, uint32 inst, uint32 *dat)
{
uint32 ln;
switch (fnc) {
case IO_CONN: /* connect */
if ((PROJ_GENIE && (inst == 000230001)) || /* set alert */
(!PROJ_GENIE && (inst == 020277777)))
alert = POT_MUX;
else CRETINS;
break;
case IO_SKS: /* skip */
if (PROJ_GENIE && ((inst & 077770077) == 004030001)) {
ln = SKG_CHAN (inst); /* get line */
if (!sim_is_active (&muxl_unit[ln]))
*dat = 1;
}
else if (!PROJ_GENIE && ((inst & 077776000) == 024076000)) {
ln = SKS_CHAN (inst); /* get line */
if (inst & (SKS_XBE|SKS_CRO|SKS_DSR)) *dat = 1;
if (((inst & SKS_XBE) && sim_is_active (&muxl_unit[ln])) ||
((inst & SKS_CRO) && !(mux_sta[ln] & MUX_SCRO)) ||
((inst & SKS_DSR) && !(mux_sta[ln] & MUX_SDSR)))
*dat = 0; /* no skip if fail */
}
else CRETINS;
default:
return SCPE_IERR;
} /* end case */
return SCPE_OK;
}示例2: activate_timer
static int activate_timer (void)
{
uint32 t;
sim_debug (DBG_DEBUG, & clk_dev, "clk_svc: TR has %d time units left\n", t);
sim_debug (DBG_DEBUG, & clk_dev, "activate_timer: TR is %lld %#llo.\n", rTR, rTR);
if (bit_is_neg(rTR, 27)) {
if ((t = sim_is_active(&TR_clk_unit[0])) != 0)
sim_debug (DBG_DEBUG, & clk_dev, "activate_timer: TR cancelled with %d time units left.\n", t);
else
sim_debug (DBG_DEBUG, & clk_dev, "activate_timer: TR loaded with negative value, but it was alread stopped.\n", t);
sim_cancel(&TR_clk_unit[0]);
return 0;
}
if ((t = sim_is_active(&TR_clk_unit[0])) != 0) {
sim_debug (DBG_DEBUG, & clk_dev, "activate_timer: TR was still running with %d time units left.\n", t);
sim_cancel(&TR_clk_unit[0]); // BUG: do we need to cancel?
}
#ifdef USE_IDLE
if (! sim_is_active (& TR_clk_unit [0]))
sim_activate (& TR_clk_unit[ 0], sim_rtcn_init(CLK_TR_HZ, TR_CLK));
#else
(void) sim_rtcn_init(CLK_TR_HZ, TR_CLK);
sim_activate(&TR_clk_unit[0], rTR);
#endif
if ((t = sim_is_active(&TR_clk_unit[0])) == 0)
sim_debug (DBG_DEBUG, & TR_clk_unit, "activate_timer: TR is not running\n", t);
else
sim_debug (DBG_DEBUG, & TR_clk_unit, "activate_timer: TR is now running with %d time units left.\n", t);
return 0;
}示例3: read_card
t_stat read_card (int32 ilnt, int32 mod)
{
int32 i, cbn, c1, c2;
t_stat r;
if (sim_is_active (&cdr_unit)) { /* busy? */
sim_cancel (&cdr_unit); /* cancel */
if (r = cdr_svc (&cdr_unit)) /* process */
return r;
}
if ((cdr_unit.flags & UNIT_ATT) == 0) /* attached? */
return SCPE_UNATT;
ind[IN_READ] = ind[IN_LST] = s1sel = s2sel = 0; /* default stacker */
cbn = ((ilnt == 2) || (ilnt == 5)) && (mod == BCD_C); /* col binary? */
for (i = 0; i < 2 * CBUFSIZE; i++) /* clear extended buf */
rbuf[i] = 0;
fgets (rbuf, (cbn)? 2 * CBUFSIZE: CBUFSIZE, /* rd bin/char card */
cdr_unit.fileref);
if (feof (cdr_unit.fileref)) /* eof? */
return STOP_NOCD;
if (ferror (cdr_unit.fileref)) { /* error? */
ind[IN_READ] = 1;
perror ("Card reader I/O error");
clearerr (cdr_unit.fileref);
if (iochk)
return SCPE_IOERR;
return SCPE_OK;
}
cdr_unit.pos = ftell (cdr_unit.fileref); /* update position */
if (ssa) { /* if last cd on */
getc (cdr_unit.fileref); /* see if more */
if (feof (cdr_unit.fileref)) /* eof? set flag */
ind[IN_LST] = 1;
fseek (cdr_unit.fileref, cdr_unit.pos, SEEK_SET);
}
if (cbn) { /* column binary */
for (i = 0; i < CDR_WIDTH; i++) {
if (conv_old) {
c1 = ascii2bcd (rbuf[i]);
c2 = ascii2bcd (rbuf[CDR_WIDTH + i]);
}
else {
c1 = ascii2bcd (rbuf[2 * i]);
c2 = ascii2bcd (rbuf[(2 * i) + 1]);
}
M[CD_CBUF1 + i] = (M[CD_CBUF1 + i] & WM) | c1;
M[CD_CBUF2 + i] = (M[CD_CBUF2 + i] & WM) | c2;
M[CDR_BUF + i] = colbin_to_bcd ((c1 << 6) | c2);
} /* end for i */
} /* end if col bin */
else { /* normal read */
for (i = 0; i < CDR_WIDTH; i++) { /* cvt to BCD */
rbuf[i] = ascii2bcd (rbuf[i]);
M[CDR_BUF + i] = (M[CDR_BUF + i] & WM) | rbuf[i];
}
}
M[CDR_BUF - 1] = 060; /* mem mark */
sim_activate (&cdr_unit, cdr_unit.wait); /* activate */
return SCPE_OK;
}示例4: iccs_wr
void iccs_wr (int32 val)
{
if ((val & TMR_CSR_RUN) == 0) { /* clearing run? */
sim_cancel (&tmr_unit); /* cancel timer */
tmr_use_100hz = 0;
if (tmr_iccs & TMR_CSR_RUN) /* run 1 -> 0? */
tmr_icr = icr_rd (TRUE); /* update itr */
}
tmr_iccs = tmr_iccs & ~(val & TMR_CSR_W1C); /* W1C csr */
tmr_iccs = (tmr_iccs & ~TMR_CSR_WR) | /* new r/w */
(val & TMR_CSR_WR);
if (val & TMR_CSR_XFR) tmr_icr = tmr_nicr; /* xfr set? */
if (val & TMR_CSR_RUN) { /* run? */
if (val & TMR_CSR_XFR) /* new tir? */
sim_cancel (&tmr_unit); /* stop prev */
if (!sim_is_active (&tmr_unit)) /* not running? */
tmr_sched (); /* activate */
}
else if (val & TMR_CSR_SGL) { /* single step? */
tmr_incr (1); /* incr tmr */
if (tmr_icr == 0) /* if ovflo, */
tmr_icr = tmr_nicr; /* reload tir */
}
if ((tmr_iccs & (TMR_CSR_DON | TMR_CSR_IE)) != /* update int */
(TMR_CSR_DON | TMR_CSR_IE))
tmr_int = 0;
return;
}示例5: ptr
int32 ptr (int32 inst, int32 dev, int32 dat)
{
if (dev == 0030) { /* RRB */
iosta = iosta & ~IOS_PTR; /* clear status */
return ptr_unit.buf; /* return data */
}
if (dev == 0002) /* RPB, mode = binary */
ptr_state = 18;
else if (sim_is_active (&ptr_unit)) { /* RPA, running? */
sim_cancel (&ptr_unit); /* stop reader */
return dat;
}
else ptr_state = 0; /* mode = alpha */
ptr_unit.buf = 0; /* clear buffer */
if (inst & IO_WAIT) /* set ptr wait */
ptr_wait = 1;
else ptr_wait = 0; /* from IR<5> */
if (GEN_CPLS (inst)) { /* comp pulse? */
ios = 0;
cpls = cpls | CPLS_PTR;
}
else cpls = cpls & ~CPLS_PTR;
sim_activate (&ptr_unit, ptr_unit.wait); /* start reader */
return dat;
}示例6: rp64
int32 rp64 (int32 dev, int32 pulse, int32 dat)
{
int32 u, f, c, sb;
UNIT *uptr;
sb = pulse & 060;
if (pulse & 01) {
if (sb == 020) /* DPSN */
dat = IOT_SKP | dat;
}
if (pulse & 02) {
if (sb == 000) { /* DPOU */
u = GET_UNIT (rp_sta);
uptr = rp_dev.units + u; /* select unit */
dat = dat | uptr->CYL | ((uptr->flags & UNIT_RP03)? CCYL_RP03: 0);
}
else if (sb == 020) /* DPOA */
dat = dat | rp_da;
else if (sb == 040) /* DPOC */
dat = dat | rp_ma;
else if (sb == 060) /* DPOW */
dat = dat | rp_wc;
}
if (pulse & 04) {
if (sb == 000) { /* DPCF */
rp_reset (&rp_dev); /* reset dev */
return dat;
}
if (rp_busy != 0) { /* others: busy? */
rp_updsta (0, STB_PGE); /* prog error */
return dat;
}
if (sb == 020) /* DPLZ */
rp_sta = rp_sta & (dat | ~STA_RW);
else if (sb == 040) /* DPLO */
rp_sta = rp_sta | (dat & STA_RW);
else if (sb == 060) /* DPLF */
rp_sta = (rp_sta & ~STA_RW) | (dat & STA_RW);
u = GET_UNIT (rp_sta); /* get unit num */
uptr = rp_dev.units + u; /* select unit */
if ((rp_sta & STA_GO) && !sim_is_active (uptr)) {
f = uptr->FUNC = GET_FUNC (rp_sta); /* get function */
rp_busy = 1; /* set ctrl busy */
rp_sta = rp_sta & ~STA_HNF; /* clear flag */
rp_stb = rp_stb & ~(STB_FME | STB_WPE | STB_LON | STB_WCE |
STB_TME | STB_PGE | STB_EOP | (1 << (STB_V_ATT0 - u)));
if (((uptr->flags & UNIT_ATT) == 0) || (f == FN_IDLE) ||
(f == FN_SEEK) || (f == FN_RECAL))
sim_activate (uptr, RP_MIN); /* short delay */
else {
c = GET_CYL (rp_da, uptr->flags);
c = abs (c - uptr->CYL) * rp_swait; /* seek time */
sim_activate (uptr, MAX (RP_MIN, c + rp_rwait));
rp_sta = rp_sta & ~STA_DON; /* clear done */
}
}
}
rp_updsta (0, 0);
return dat;
}示例7: lpt_chsel
t_stat lpt_chsel (uint32 ch, uint32 sel, uint32 unit)
{
if (sel & CHSL_NDS) /* nds? nop */
return ch6_end_nds (ch);
switch (sel) { /* case on cmd */
case CHSL_RDS: /* read */
case CHSL_WRS: /* write */
if (!(lpt_unit.flags & (UNIT_ATT|UNIT_CONS))) /* not attached? */
return SCPE_UNATT;
if (sim_is_active (&lpt_unit)) /* busy? */
return ERR_STALL;
lpt_cmd = ((unit & 02)? CMD_BIN: 0) | /* save modes */
((sel == CHSL_RDS)? CMD_ECHO: 0);
lpt_sta = LPS_INIT; /* initial state */
sim_activate (&lpt_unit, lpt_tstart); /* start reader */
break;
default: /* other */
return STOP_ILLIOP;
}
return SCPE_OK;
}示例8: clk_cosched
int32 clk_cosched (int32 wait)
{
int32 t;
t = sim_is_active (&clk_unit);
return (t? t - 1: wait);
}示例9: mt_tio_status
uint32 mt_tio_status (uint32 un)
{
uint32 i, st;
UNIT *uptr = &mt_unit[un];
st = (uptr->flags & UNIT_ATT)? DVS_AUTO: 0; /* AUTO */
if (sim_is_active (uptr) || /* unit busy */
sim_is_active (uptr + MT_REW)) /* or rewinding? */
st |= DVS_DBUSY;
for (i = 0; i < MT_NUMDR; i++) { /* loop thru units */
if (sim_is_active (&mt_unit[i])) { /* active? */
st |= (DVS_CBUSY | (CC2 << DVT_V_CC)); /* ctrl is busy */
}
}
return st;
}示例10: rp_updsta
void rp_updsta (int32 newa, int32 newb)
{
int32 f;
UNIT *uptr;
uptr = rp_dev.units + GET_UNIT (rp_sta);
rp_sta = (rp_sta & ~(STA_DYN | STA_ERR)) | newa;
rp_stb = (rp_stb & ~STB_DYN) | newb;
if (uptr->flags & UNIT_WPRT)
rp_sta = rp_sta | STA_SUWP;
if ((uptr->flags & UNIT_ATT) == 0)
rp_stb = rp_stb | STB_SUFU | STB_SUNR;
else if (sim_is_active (uptr)) {
f = (uptr->FUNC) & STA_M_FUNC;
if ((f == FN_SEEK) || (f == FN_RECAL))
rp_stb = rp_stb | STB_SUSU | STB_SUNR;
}
else if (uptr->CYL >= RP_NUMCY)
rp_sta = rp_sta | STA_SUSI;
if ((rp_sta & STA_EFLGS) || (rp_stb & STB_EFLGS))
rp_sta = rp_sta | STA_ERR;
if (((rp_sta & (STA_ERR | STA_DON)) && (rp_sta & STA_IED)) ||
((rp_stb & STB_ATTN) && (rp_sta & STA_IEA)))
SET_INT (RP);
else CLR_INT (RP);
return;
}示例11: lp_tio_status
uint32 lp_tio_status (void)
{
uint32 st;
st = (lp_unit.flags & UNIT_ATT)? DVS_AUTO: 0; /* auto? */
if (sim_is_active (&lp_unit)) /* busy? */
st |= (DVS_CBUSY | DVS_DBUSY | (CC2 << DVT_V_CC));
return st;
}示例12: clk
int32 clk (int32 inst, int32 dev, int32 dat)
{
int32 used, incr;
if (clk_dev.flags & DEV_DIS) /* disabled? */
return (stop_inst << IOT_V_REASON) | dat; /* illegal inst */
used = tmxr_poll - (sim_is_active (&clk_unit) - 1);
incr = (used * CLK_CNTS) / tmxr_poll;
return clk_cntr + incr;
}示例13: rtc_fo
t_stat rtc_fo (int32 op)
{
if (op & RTC_OFF) /* clock off? */
sim_cancel (&rtc_unit);
if ((op & RTC_ON) && !sim_is_active (&rtc_unit)) /* clock on? */
sim_activate (&rtc_unit, sim_rtc_init (rtc_unit.wait));
if (op & RTC_OV) /* clr ovflo? */
dev_done = dev_done & ~INT_RTC;
return SCPE_OK;
}示例14: pt_tio_status
uint32 pt_tio_status (void)
{
uint32 st;
if (((pt_unit[PTR].flags & UNIT_ATT) == 0) || /* rdr not att? */
((pt_unit[PTP].flags & UNIT_ATT) == 0)) /* pun not att? */
st = 0;
else st = DVS_AUTO; /* otherwise ok */
if (sim_is_active (&pt_unit[PTR])) /* dev busy? */
st |= (DVS_CBUSY | DVS_DBUSY | (CC2 << DVT_V_CC));
return st;
}示例15: clk_svc
static t_stat clk_svc (UNUSED UNIT * up)
{
// only valid for TR
#ifdef USE_IDLE
sim_activate (& TR_clk_unit [0], sim_rtcn_init(CLK_TR_HZ, TR_CLK));
#else
(void) sim_rtcn_calb (CLK_TR_HZ, TR_CLK); // calibrate clock
#endif
uint32 t = sim_is_active(&TR_clk_unit[0]);
sim_debug (DBG_INFO, & clk_dev, "clk_svc: TR has %d time units left\n", t);
return 0;
}