本文整理汇总了C++中saa7146_read函数的典型用法代码示例。如果您正苦于以下问题：C++ saa7146_read函数的具体用法？C++ saa7146_read怎么用？C++ saa7146_read使用的例子？那么恭喜您, 这里精选的函数代码示例或许可以为您提供帮助。
在下文中一共展示了saa7146_read函数的15个代码示例，这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞，您的评价将有助于系统推荐出更棒的C++代码示例。
示例1: saa7146_wait_for_debi_done_busyloop
static inline int saa7146_wait_for_debi_done_busyloop(struct saa7146_dev *dev,
unsigned long us1, unsigned long us2)
{
unsigned long loops;
/* wait for registers to be programmed */
loops = us1;
while (1) {
if (saa7146_read(dev, MC2) & 2)
break;
if (!loops--) {
printk(KERN_ERR "%s: %s timed out while waiting for "
"registers getting programmed\n",
dev->name, __func__);
return -ETIMEDOUT;
}
udelay(1);
}
/* wait for transfer to complete */
loops = us2 / 5;
while (1) {
if (!(saa7146_read(dev, PSR) & SPCI_DEBI_S))
break;
saa7146_read(dev, MC2);
if (!loops--) {
DEB_S(("%s: %s timed out while waiting for transfer "
"completion\n", dev->name, __func__));
return -ETIMEDOUT;
}
udelay(5);
}
return 0;
}示例2: interrupt_hw
/* interrupt handler */
static irqreturn_t interrupt_hw(int irq, void *dev_id)
{
struct saa7146_dev *dev = dev_id;
u32 isr;
u32 ack_isr;
/* read out the interrupt status register */
ack_isr = isr = saa7146_read(dev, ISR);
/* is this our interrupt? */
if ( 0 == isr ) {
/* nope, some other device */
return IRQ_NONE;
}
if (dev->ext) {
if (dev->ext->irq_mask & isr) {
if (dev->ext->irq_func)
dev->ext->irq_func(dev, &isr);
isr &= ~dev->ext->irq_mask;
}
}
if (0 != (isr & (MASK_27))) {
DEB_INT(("irq: RPS0 (0x%08x).\n",isr));
if (dev->vv_data && dev->vv_callback)
dev->vv_callback(dev,isr);
isr &= ~MASK_27;
}
if (0 != (isr & (MASK_28))) {
if (dev->vv_data && dev->vv_callback)
dev->vv_callback(dev,isr);
isr &= ~MASK_28;
}
if (0 != (isr & (MASK_16|MASK_17))) {
SAA7146_IER_DISABLE(dev, MASK_16|MASK_17);
/* only wake up if we expect something */
if (0 != dev->i2c_op) {
dev->i2c_op = 0;
wake_up(&dev->i2c_wq);
} else {
u32 psr = saa7146_read(dev, PSR);
u32 ssr = saa7146_read(dev, SSR);
#ifdef CONFIG_DEBUG_PRINTK
printk(KERN_WARNING "%s: unexpected i2c irq: isr %08x psr %08x ssr %08x\n",
dev->name, isr, psr, ssr);
#else
;
#endif
}
isr &= ~(MASK_16|MASK_17);
}
if( 0 != isr ) {
ERR(("warning: interrupt enabled, but not handled properly.(0x%08x)\n",isr));
ERR(("disabling interrupt source(s)!\n"));
SAA7146_IER_DISABLE(dev,isr);
}
saa7146_write(dev, ISR, ack_isr);
return IRQ_HANDLED;
}示例3: saa7146_s_ctrl
int saa7146_s_ctrl(struct v4l2_ctrl *ctrl)
{
struct saa7146_dev *dev = container_of(ctrl->handler,
struct saa7146_dev, ctrl_handler);
struct saa7146_vv *vv = dev->vv_data;
u32 val;
switch (ctrl->id) {
case V4L2_CID_BRIGHTNESS:
val = saa7146_read(dev, BCS_CTRL);
val &= 0x00ffffff;
val |= (ctrl->val << 24);
saa7146_write(dev, BCS_CTRL, val);
saa7146_write(dev, MC2, MASK_22 | MASK_06);
break;
case V4L2_CID_CONTRAST:
val = saa7146_read(dev, BCS_CTRL);
val &= 0xff00ffff;
val |= (ctrl->val << 16);
saa7146_write(dev, BCS_CTRL, val);
saa7146_write(dev, MC2, MASK_22 | MASK_06);
break;
case V4L2_CID_SATURATION:
val = saa7146_read(dev, BCS_CTRL);
val &= 0xffffff00;
val |= (ctrl->val << 0);
saa7146_write(dev, BCS_CTRL, val);
saa7146_write(dev, MC2, MASK_22 | MASK_06);
break;
case V4L2_CID_HFLIP:
/* fixme: we can support changing VFLIP and HFLIP here... */
if ((vv->video_status & STATUS_CAPTURE))
return -EBUSY;
vv->hflip = ctrl->val;
break;
case V4L2_CID_VFLIP:
if ((vv->video_status & STATUS_CAPTURE))
return -EBUSY;
vv->vflip = ctrl->val;
break;
default:
return -EINVAL;
}
if ((vv->video_status & STATUS_OVERLAY) != 0) { /* CHECK: && (vv->video_fh == fh)) */
struct saa7146_fh *fh = vv->video_fh;
saa7146_stop_preview(fh);
saa7146_start_preview(fh);
}
return 0;
}示例4: interrupt_hw
static irqreturn_t interrupt_hw(int irq, void *dev_id)
{
struct saa7146_dev *dev = dev_id;
u32 isr;
u32 ack_isr;
ack_isr = isr = saa7146_read(dev, ISR);
if ( 0 == isr ) {
return IRQ_NONE;
}
if (dev->ext) {
if (dev->ext->irq_mask & isr) {
if (dev->ext->irq_func)
dev->ext->irq_func(dev, &isr);
isr &= ~dev->ext->irq_mask;
}
}
if (0 != (isr & (MASK_27))) {
DEB_INT("irq: RPS0 (0x%08x)\n", isr);
if (dev->vv_data && dev->vv_callback)
dev->vv_callback(dev,isr);
isr &= ~MASK_27;
}
if (0 != (isr & (MASK_28))) {
if (dev->vv_data && dev->vv_callback)
dev->vv_callback(dev,isr);
isr &= ~MASK_28;
}
if (0 != (isr & (MASK_16|MASK_17))) {
SAA7146_IER_DISABLE(dev, MASK_16|MASK_17);
if (0 != dev->i2c_op) {
dev->i2c_op = 0;
wake_up(&dev->i2c_wq);
} else {
u32 psr = saa7146_read(dev, PSR);
u32 ssr = saa7146_read(dev, SSR);
pr_warn("%s: unexpected i2c irq: isr %08x psr %08x ssr %08x\n",
dev->name, isr, psr, ssr);
}
isr &= ~(MASK_16|MASK_17);
}
if( 0 != isr ) {
ERR("warning: interrupt enabled, but not handled properly.(0x%08x)\n",
isr);
ERR("disabling interrupt source(s)!\n");
SAA7146_IER_DISABLE(dev,isr);
}
saa7146_write(dev, ISR, ack_isr);
return IRQ_HANDLED;
}示例5: vbi_open
static int vbi_open(struct saa7146_dev *dev, struct file *file)
{
struct saa7146_fh *fh = file->private_data;
u32 arbtr_ctrl = saa7146_read(dev, PCI_BT_V1);
int ret = 0;
DEB_VBI(("dev:%p, fh:%p\n",dev,fh));
ret = saa7146_res_get(fh, RESOURCE_DMA3_BRS);
if (0 == ret) {
DEB_S(("cannot get vbi RESOURCE_DMA3_BRS resource\n"));
return -EBUSY;
}
/* adjust arbitrition control for video dma 3 */
arbtr_ctrl &= ~0x1f0000;
arbtr_ctrl |= 0x1d0000;
saa7146_write(dev, PCI_BT_V1, arbtr_ctrl);
saa7146_write(dev, MC2, (MASK_04|MASK_20));
memset(&fh->vbi_fmt,0,sizeof(fh->vbi_fmt));
fh->vbi_fmt.sampling_rate = 27000000;
fh->vbi_fmt.offset = 248; /* todo */
fh->vbi_fmt.samples_per_line = vbi_pixel_to_capture;
fh->vbi_fmt.sample_format = V4L2_PIX_FMT_GREY;
fh->vbi_fmt.start[0] = 5;
fh->vbi_fmt.count[0] = 16;
fh->vbi_fmt.start[1] = 312;
fh->vbi_fmt.count[1] = 16;
videobuf_queue_sg_init(&fh->vbi_q, &vbi_qops,
&dev->pci->dev, &dev->slock,
V4L2_BUF_TYPE_VBI_CAPTURE,
V4L2_FIELD_SEQ_TB,
sizeof(struct saa7146_buf),
file);
init_timer(&fh->vbi_read_timeout);
fh->vbi_read_timeout.function = vbi_read_timeout;
fh->vbi_read_timeout.data = (unsigned long)file;
/* initialize the brs */
if ( 0 != (SAA7146_USE_PORT_B_FOR_VBI & dev->ext_vv_data->flags)) {
saa7146_write(dev, BRS_CTRL, MASK_30|MASK_29 | (7 << 19));
} else {
saa7146_write(dev, BRS_CTRL, 0x00000001);
if (0 != (ret = vbi_workaround(dev))) {
DEB_VBI(("vbi workaround failed!\n"));
/* return ret;*/
}
}
/* upload brs register */
saa7146_write(dev, MC2, (MASK_08|MASK_24));
return 0;
}示例6: vpeirq
static void vpeirq (unsigned long data)
{
struct budget *budget = (struct budget*) data;
u8 *mem = (u8 *)(budget->grabbing);
u32 olddma = budget->ttbp;
u32 newdma = saa7146_read(budget->dev, PCI_VDP3);
/* nearest lower position divisible by 188 */
newdma -= newdma % 188;
if (newdma >= TS_BUFLEN)
return;
budget->ttbp = newdma;
if(budget->feeding == 0 || newdma == olddma)
return;
if (newdma > olddma) { /* no wraparound, dump olddma..newdma */
dvb_dmx_swfilter_packets(&budget->demux,
mem+olddma, (newdma-olddma) / 188);
} else { /* wraparound, dump olddma..buflen and 0..newdma */
dvb_dmx_swfilter_packets(&budget->demux,
mem+olddma, (TS_BUFLEN-olddma) / 188);
dvb_dmx_swfilter_packets(&budget->demux,
mem, newdma / 188);
}
}示例7: dump_registers
static void dump_registers(struct saa7146_dev* dev)
{
int i = 0;
pr_info(" @ %li jiffies:\n", jiffies);
for (i = 0; i <= 0x148; i += 4)
pr_info("0x%03x: 0x%08x\n", i, saa7146_read(dev, i));
}示例8: saa7146_setgpio
void saa7146_setgpio(struct saa7146_dev *dev, int port, u32 data)
{
u32 value = 0;
BUG_ON(port > 3);
value = saa7146_read(dev, GPIO_CTRL);
value &= ~(0xff << (8*port));
value |= (data << (8*port));
saa7146_write(dev, GPIO_CTRL, value);
}示例9: get_control
static int get_control(struct saa7146_fh *fh, struct v4l2_control *c)
{
struct saa7146_dev *dev = fh->dev;
struct saa7146_vv *vv = dev->vv_data;
const struct v4l2_queryctrl* ctrl;
u32 value = 0;
ctrl = ctrl_by_id(c->id);
if (NULL == ctrl)
return -EINVAL;
switch (c->id) {
case V4L2_CID_BRIGHTNESS:
value = saa7146_read(dev, BCS_CTRL);
c->value = 0xff & (value >> 24);
DEB_D(("V4L2_CID_BRIGHTNESS: %d\n",c->value));
break;
case V4L2_CID_CONTRAST:
value = saa7146_read(dev, BCS_CTRL);
c->value = 0x7f & (value >> 16);
DEB_D(("V4L2_CID_CONTRAST: %d\n",c->value));
break;
case V4L2_CID_SATURATION:
value = saa7146_read(dev, BCS_CTRL);
c->value = 0x7f & (value >> 0);
DEB_D(("V4L2_CID_SATURATION: %d\n",c->value));
break;
case V4L2_CID_VFLIP:
c->value = vv->vflip;
DEB_D(("V4L2_CID_VFLIP: %d\n",c->value));
break;
case V4L2_CID_HFLIP:
c->value = vv->hflip;
DEB_D(("V4L2_CID_HFLIP: %d\n",c->value));
break;
default:
return -EINVAL;
}
return 0;
}示例10: dump_registers
static void dump_registers(struct saa7146_dev* dev)
{
int i = 0;
INFO((" @ %li jiffies:\n",jiffies));
for(i = 0; i <= 0x148; i+=4) {
#ifdef CONFIG_DEBUG_PRINTK
printk("0x%03x: 0x%08x\n",i,saa7146_read(dev,i));
#else
;
#endif
}
}示例11: saa7146_wait_for_debi_done_sleep
/* This DEBI code is based on the saa7146 Stradis driver by Nathan Laredo */
static inline int saa7146_wait_for_debi_done_sleep(struct saa7146_dev *dev,
unsigned long us1, unsigned long us2)
{
unsigned long timeout;
int err;
/* wait for registers to be programmed */
timeout = jiffies + usecs_to_jiffies(us1);
while (1) {
err = time_after(jiffies, timeout);
if (saa7146_read(dev, MC2) & 2)
break;
if (err) {
printk(KERN_ERR "%s: %s timed out while waiting for "
"registers getting programmed\n",
dev->name, __func__);
return -ETIMEDOUT;
}
msleep(1);
}
/* wait for transfer to complete */
timeout = jiffies + usecs_to_jiffies(us2);
while (1) {
err = time_after(jiffies, timeout);
if (!(saa7146_read(dev, PSR) & SPCI_DEBI_S))
break;
saa7146_read(dev, MC2);
if (err) {
DEB_S(("%s: %s timed out while waiting for transfer "
"completion\n", dev->name, __func__));
return -ETIMEDOUT;
}
msleep(1);
}
return 0;
}示例12: vbi_open
static int vbi_open(struct saa7146_dev *dev, struct file *file)
{
struct saa7146_fh *fh = file->private_data;
struct saa7146_vv *vv = fh->dev->vv_data;
u32 arbtr_ctrl = saa7146_read(dev, PCI_BT_V1);
int ret = 0;
DEB_VBI("dev:%p, fh:%p\n", dev, fh);
ret = saa7146_res_get(fh, RESOURCE_DMA3_BRS);
if (0 == ret) {
DEB_S("cannot get vbi RESOURCE_DMA3_BRS resource\n");
return -EBUSY;
}
/* adjust arbitrition control for video dma 3 */
arbtr_ctrl &= ~0x1f0000;
arbtr_ctrl |= 0x1d0000;
saa7146_write(dev, PCI_BT_V1, arbtr_ctrl);
saa7146_write(dev, MC2, (MASK_04|MASK_20));
videobuf_queue_sg_init(&fh->vbi_q, &vbi_qops,
&dev->pci->dev, &dev->slock,
V4L2_BUF_TYPE_VBI_CAPTURE,
V4L2_FIELD_SEQ_TB, // FIXME: does this really work?
sizeof(struct saa7146_buf),
file, &dev->v4l2_lock);
vv->vbi_read_timeout.function = vbi_read_timeout;
vv->vbi_read_timeout.data = (unsigned long)file;
/* initialize the brs */
if ( 0 != (SAA7146_USE_PORT_B_FOR_VBI & dev->ext_vv_data->flags)) {
saa7146_write(dev, BRS_CTRL, MASK_30|MASK_29 | (7 << 19));
} else {
saa7146_write(dev, BRS_CTRL, 0x00000001);
if (0 != (ret = vbi_workaround(dev))) {
DEB_VBI("vbi workaround failed!\n");
/* return ret;*/
}
}
/* upload brs register */
saa7146_write(dev, MC2, (MASK_08|MASK_24));
return 0;
}示例13: vpeirq
static void vpeirq(unsigned long data)
{
struct budget *budget = (struct budget *) data;
u8 *mem = (u8 *) (budget->grabbing);
u32 olddma = budget->ttbp;
u32 newdma = saa7146_read(budget->dev, PCI_VDP3);
u32 count;
/* Ensure streamed PCI data is synced to CPU */
pci_dma_sync_sg_for_cpu(budget->dev->pci, budget->pt.slist, budget->pt.nents, PCI_DMA_FROMDEVICE);
/* nearest lower position divisible by 188 */
newdma -= newdma % 188;
if (newdma >= budget->buffer_size)
return;
budget->ttbp = newdma;
if (budget->feeding == 0 || newdma == olddma)
return;
if (newdma > olddma) { /* no wraparound, dump olddma..newdma */
count = newdma - olddma;
dvb_dmx_swfilter_packets(&budget->demux, mem + olddma, count / 188);
} else { /* wraparound, dump olddma..buflen and 0..newdma */
count = budget->buffer_size - olddma;
dvb_dmx_swfilter_packets(&budget->demux, mem + olddma, count / 188);
count += newdma;
dvb_dmx_swfilter_packets(&budget->demux, mem, newdma / 188);
}
if (count > budget->buffer_warning_threshold)
budget->buffer_warnings++;
if (budget->buffer_warnings && time_after(jiffies, budget->buffer_warning_time)) {
printk("%s %s: used %d times >80%% of buffer (%u bytes now)\n",
budget->dev->name, __func__, budget->buffer_warnings, count);
budget->buffer_warning_time = jiffies + BUFFER_WARNING_WAIT;
budget->buffer_warnings = 0;
}
}示例14: ttpci_budget_debiread
int ttpci_budget_debiread(struct budget *budget, u32 config, int addr, int count,
int uselocks, int nobusyloop)
{
struct saa7146_dev *saa = budget->dev;
int result = 0;
unsigned long flags = 0;
if (count > 4 || count <= 0)
return 0;
if (uselocks)
spin_lock_irqsave(&budget->debilock, flags);
if ((result = saa7146_wait_for_debi_done(saa, nobusyloop)) < 0) {
if (uselocks)
spin_unlock_irqrestore(&budget->debilock, flags);
return result;
}
saa7146_write(saa, DEBI_COMMAND, (count << 17) | 0x10000 | (addr & 0xffff));
saa7146_write(saa, DEBI_CONFIG, config);
saa7146_write(saa, DEBI_PAGE, 0);
saa7146_write(saa, MC2, (2 << 16) | 2);
if ((result = saa7146_wait_for_debi_done(saa, nobusyloop)) < 0) {
if (uselocks)
spin_unlock_irqrestore(&budget->debilock, flags);
return result;
}
result = saa7146_read(saa, DEBI_AD);
result &= (0xffffffffUL >> ((4 - count) * 8));
if (uselocks)
spin_unlock_irqrestore(&budget->debilock, flags);
return result;
}示例15: ttpci_budget_debiread_nolock
static int ttpci_budget_debiread_nolock(struct budget *budget, u32 config,
int addr, int count, int nobusyloop)
{
struct saa7146_dev *saa = budget->dev;
int result;
result = saa7146_wait_for_debi_done(saa, nobusyloop);
if (result < 0)
return result;
saa7146_write(saa, DEBI_COMMAND, (count << 17) | 0x10000 | (addr & 0xffff));
saa7146_write(saa, DEBI_CONFIG, config);
saa7146_write(saa, DEBI_PAGE, 0);
saa7146_write(saa, MC2, (2 << 16) | 2);
result = saa7146_wait_for_debi_done(saa, nobusyloop);
if (result < 0)
return result;
result = saa7146_read(saa, DEBI_AD);
result &= (0xffffffffUL >> ((4 - count) * 8));
return result;
}