C++ read_counter函数代码示例

inline void msm5832_device::advance_minutes()
{
	int minutes = read_counter(REGISTER_MI1);
	int hours = read_counter(REGISTER_H1);
	int days = read_counter(REGISTER_D1);
	int month = read_counter(REGISTER_MO1);
	int year = read_counter(REGISTER_Y1);
	int day_of_week = m_reg[REGISTER_W];

	minutes++;

	if (minutes > 59)
	{
		minutes = 0;
		hours++;
	}

	if (hours > 23)
	{
		hours = 0;
		days++;
		day_of_week++;
	}

	if (day_of_week > 6)
	{
		day_of_week++;
	}

	if (days > DAYS_PER_MONTH[month - 1])
	{
		days = 1;
		month++;
	}

	if (month > 12)
	{
		month = 1;
		year++;
	}

	if (year > 99)
	{
		year = 0;
	}

	write_counter(REGISTER_MI1, minutes);
	write_counter(REGISTER_H1, hours);
	write_counter(REGISTER_D1, days);
	write_counter(REGISTER_MO1, month);
	write_counter(REGISTER_Y1, year);
	m_reg[REGISTER_W] = day_of_week;
}

// get CPU frequency in Hz (1MHz precision)
ui64 get_freq(void)
{
    unsigned __int64  x = 0;
    time_t i;
    i = time(NULL);
    while (i == time(NULL));
    x -= read_counter();
    i++;
    while (i == time(NULL));
    x += read_counter();
    return x;
}

int main(int argc, char * argv[]) {
//    int m = atoi(argv[1]);
    int m = 9;
	int i;
ui64 c  = read_counter();
for (int k=0; k<10; k++) {
    for (i = 0; i < 3; i++)
        nsieve(10000 << (m-i));
}

	render(read_counter()-c,10);
    return 0;
}

status_t platform_set_periodic_timer(platform_timer_callback callback, void *arg, lk_time_t interval)
{
    LTRACEF("callback %p, arg %p, interval %lu\n", callback, arg, interval);

    enter_critical_section();

    t_callback = callback;

    /* disable the timer */
    ARM64_WRITE_SYSREG(CNTP_CTL_EL0, 0);

    /* set the countdown register to max */
    ARM64_WRITE_SYSREG(CNTP_TVAL_EL0, INT32_MAX);

    /* calculate the compare delta and set the comparison register */
    interval_delta = (uint64_t)timer_freq * interval / 1000U;
    last_compare = read_counter() + interval_delta;
    ARM64_WRITE_SYSREG(CNTP_CVAL_EL0, last_compare);

    ARM64_WRITE_SYSREG(CNTP_CTL_EL0, 1);

    unmask_interrupt(INT_PPI_NSPHYS_TIMER);

    exit_critical_section();

    return NO_ERROR;
}

static void
etna_sw_end_query(struct etna_context *ctx, struct etna_query *q)
{
   struct etna_sw_query *sq = etna_sw_query(q);

   q->active = false;
   sq->end_value = read_counter(ctx, q->type);
}

ui64 read_timer()
{
    ui64 tmp;

    tmp = local;
    local = read_counter();
    return (local - tmp);
}

static void
fd_sw_end_query(struct fd_context *ctx, struct fd_query *q)
{
	struct fd_sw_query *sq = fd_sw_query(q);
	sq->end_value = read_counter(ctx, q->type);
	if (is_rate_query(q))
		sq->end_time = os_time_get();
}

u64 read_cpu_counter(){
	int cpu;
	u64 result = 0;
	for (cpu = 0; cpu < nr_cpus; cpu++){
		result += read_counter(fd[cpu]);
	}

	return result;
}

static boolean
fd_sw_begin_query(struct fd_context *ctx, struct fd_query *q)
{
	struct fd_sw_query *sq = fd_sw_query(q);
	sq->begin_value = read_counter(ctx, q->type);
	if (is_rate_query(q))
		sq->begin_time = os_time_get();
   return true;
}

/*
    determine cpu frequency
	not very precise but sufficient
*/
double
get_freq()
{
	int64_t x, y;
	int32_t i;

	i = time(NULL);

	while (i == time(NULL));

	x = read_counter();
	i++;

	while (i == time(NULL));

	y = read_counter();

	return (double) (y - x) / 1000.;
}

static boolean
etna_sw_begin_query(struct etna_context *ctx, struct etna_query *q)
{
   struct etna_sw_query *sq = etna_sw_query(q);

   q->active = true;
   sq->begin_value = read_counter(ctx, q->type);

   return true;
}

static void
fd_sw_end_query(struct fd_context *ctx, struct fd_query *q)
{
	struct fd_sw_query *sq = fd_sw_query(q);
	sq->end_value = read_counter(ctx, q->type);
	if (is_time_rate_query(q)) {
		sq->end_time = os_time_get();
	} else if (is_draw_rate_query(q)) {
		sq->end_time = ctx->stats.draw_calls;
	}
}

/**
 * detect_pll_input_clock - Detect the PLL input clock in Hz.
 * @dma_base: for the port address
 * E.g. 16949000 on 33 MHz PCI bus, i.e. half of the PCI clock.
 */
static long detect_pll_input_clock(unsigned long dma_base)
{
	struct timeval start_time, end_time;
	long start_count, end_count;
	long pll_input, usec_elapsed;
	u8 scr1;

	start_count = read_counter(dma_base);
	do_gettimeofday(&start_time);

	/* Start the test mode */
	outb(0x01, dma_base + 0x01);
	scr1 = inb(dma_base + 0x03);
	DBG("scr1[%02X]\n", scr1);
	outb(scr1 | 0x40, dma_base + 0x03);

	/* Let the counter run for 10 ms. */
	mdelay(10);

	end_count = read_counter(dma_base);
	do_gettimeofday(&end_time);

	/* Stop the test mode */
	outb(0x01, dma_base + 0x01);
	scr1 = inb(dma_base + 0x03);
	DBG("scr1[%02X]\n", scr1);
	outb(scr1 & ~0x40, dma_base + 0x03);

	/*
	 * Calculate the input clock in Hz
	 * (the clock counter is 30 bit wide and counts down)
	 */
	usec_elapsed = (end_time.tv_sec - start_time.tv_sec) * 1000000 +
		(end_time.tv_usec - start_time.tv_usec);
	pll_input = ((start_count - end_count) & 0x3fffffff) / 10 *
		(10000000 / usec_elapsed);

	DBG("start[%ld] end[%ld]\n", start_count, end_count);

	return pll_input;
}

static boolean
fd_sw_begin_query(struct fd_context *ctx, struct fd_query *q)
{
	struct fd_sw_query *sq = fd_sw_query(q);
	sq->begin_value = read_counter(ctx, q->type);
	if (is_time_rate_query(q)) {
		sq->begin_time = os_time_get();
	} else if (is_draw_rate_query(q)) {
		sq->begin_time = ctx->stats.draw_calls;
	}
	return true;
}

void main(void)
{
	init_io();
	setup_counter();

	usb_init();
	ep0_init();

	while (1) {
		read_counter();
		usb_poll();
	}
}