C++ read8_delegate函数代码示例

MACHINE_START_MEMBER(vsnes_state,vsnes)
{
	address_space &ppu1_space = machine().device("ppu1")->memory().space(AS_PROGRAM);
	int i;

	/* establish nametable ram */
	m_nt_ram[0] = auto_alloc_array(machine(), UINT8, 0x1000);
	/* set mirroring */
	m_nt_page[0][0] = m_nt_ram[0];
	m_nt_page[0][1] = m_nt_ram[0] + 0x400;
	m_nt_page[0][2] = m_nt_ram[0] + 0x800;
	m_nt_page[0][3] = m_nt_ram[0] + 0xc00;

	ppu1_space.install_readwrite_handler(0x2000, 0x3eff, read8_delegate(FUNC(vsnes_state::vsnes_nt0_r),this), write8_delegate(FUNC(vsnes_state::vsnes_nt0_w),this));

	m_vrom[0] = memregion("gfx1")->base();
	m_vrom_size[0] = memregion("gfx1")->bytes();
	m_vrom_banks = m_vrom_size[0] / 0x400;

	/* establish chr banks */
	/* bank 1 is used already! */
	/* DRIVER_INIT is called first - means we can handle this different for VRAM games! */
	if (NULL != m_vrom[0])
	{
		for (i = 0; i < 8; i++)
		{
			ppu1_space.install_read_bank(0x0400 * i, 0x0400 * i + 0x03ff, chr_banknames[i]);
			membank(chr_banknames[i])->configure_entries(0, m_vrom_banks, m_vrom[0], 0x400);
		}
		v_set_videorom_bank(0, 8, 0);
	}
	else
	{
		ppu1_space.install_ram(0x0000, 0x1fff, m_vram);
	}
}

void ibm_vga_device::device_start()
{
	int buswidth;
	astring tempstring;
	address_space *spaceio = machine().firstcpu->memory().space(AS_IO);
	address_space *space = machine().firstcpu->memory().space(AS_PROGRAM);
	space->install_rom(0xc0000, 0xc5fff, machine().region(subtag(tempstring, "vga"))->base());
	buswidth = machine().firstcpu->memory().space_config(AS_PROGRAM)->m_databus_width;
	switch(buswidth)
	{
		case 8:
			spaceio->install_readwrite_handler(0x3b0, 0x3bf, read8_delegate(FUNC(ibm_vga_device::vga_port_03b0_r), this), write8_delegate(FUNC(ibm_vga_device::vga_port_03b0_w), this));
			spaceio->install_readwrite_handler(0x3c0, 0x3cf, read8_delegate(FUNC(ibm_vga_device::vga_port_03c0_r), this), write8_delegate(FUNC(ibm_vga_device::vga_port_03c0_w), this));
			spaceio->install_readwrite_handler(0x3d0, 0x3df, read8_delegate(FUNC(ibm_vga_device::vga_port_03d0_r), this), write8_delegate(FUNC(ibm_vga_device::vga_port_03d0_w), this));
			break;

		case 16:
			spaceio->install_readwrite_handler(0x3b0, 0x3bf, read8_delegate(FUNC(ibm_vga_device::vga_port_03b0_r), this), write8_delegate(FUNC(ibm_vga_device::vga_port_03b0_w), this), 0xffff);
			spaceio->install_readwrite_handler(0x3c0, 0x3cf, read8_delegate(FUNC(ibm_vga_device::vga_port_03c0_r), this), write8_delegate(FUNC(ibm_vga_device::vga_port_03c0_w), this), 0xffff);
			spaceio->install_readwrite_handler(0x3d0, 0x3df, read8_delegate(FUNC(ibm_vga_device::vga_port_03d0_r), this), write8_delegate(FUNC(ibm_vga_device::vga_port_03d0_w), this), 0xffff);
			break;

		case 32:
			break;

		case 64:
			break;

		default:
			fatalerror("VGA: Bus width %d not supported", buswidth);
			break;
	}
	m_videoram = auto_alloc_array(machine(), UINT8, 0x40000);
	space->install_readwrite_bank(0xa0000, 0xbffff, "vga_bank" );
	memory_set_bankptr(machine(),"vga_bank", m_videoram);
}

void cs4031_device::device_start()
{
	ram_device *ram_dev = machine().device<ram_device>(RAM_TAG);

	// make sure the ram device is already running
	if (!ram_dev->started())
		throw device_missing_dependencies();

	// resolve callbacks
	m_read_ior.resolve_safe(0);
	m_write_iow.resolve_safe();
	m_write_tc.resolve_safe();
	m_write_hold.resolve_safe();
	m_write_nmi.resolve_safe();
	m_write_intr.resolve_safe();
	m_write_cpureset.resolve_safe();
	m_write_a20m.resolve_safe();
	m_write_spkr.resolve_safe();

	// register for state saving
	save_item(NAME(m_dma_eop));
	save_item(NAME(m_dma_page));
	save_item(NAME(m_dma_high_byte));
	save_item(NAME(m_dma_channel));
	save_item(NAME(m_portb));
	save_item(NAME(m_refresh_toggle));
	save_item(NAME(m_iochck));
	save_item(NAME(m_nmi_mask));
	save_item(NAME(m_cpureset));
	save_item(NAME(m_kbrst));
	save_item(NAME(m_ext_gatea20));
	save_item(NAME(m_fast_gatea20));
	save_item(NAME(m_emu_gatea20));
	save_item(NAME(m_address));
	save_item(NAME(m_address_valid));
	save_item(NAME(m_registers));

	device_t *cpu = machine().device(m_cputag);
	m_space = &cpu->memory().space(AS_PROGRAM);
	m_space_io = &cpu->memory().space(AS_IO);

	m_isa = machine().root_device().memregion(m_isatag)->base();
	m_bios = machine().root_device().memregion(m_biostag)->base();
	m_keybc = downcast<at_keyboard_controller_device *>(machine().device(m_keybctag));

	m_ram = ram_dev->pointer();
	uint32_t ram_size = ram_dev->size();

	// install base memory
	m_space->install_ram(0x000000, 0x09ffff, m_ram);

	// install extended memory
	if (ram_size > 0x100000)
		m_space->install_ram(0x100000, ram_size - 1, m_ram + 0x100000);

	// install bios rom at cpu initial pc
	m_space->install_rom(0xffff0000, 0xffffffff, m_bios + 0xf0000);

	// install i/o accesses
	m_space_io->install_readwrite_handler(0x0000, 0x000f, read8_delegate(FUNC(am9517a_device::read), &(*m_dma1)), write8_delegate(FUNC(am9517a_device::write), &(*m_dma1)), 0xffffffff);
	m_space_io->install_readwrite_handler(0x0020, 0x0023, read8_delegate(FUNC(pic8259_device::read), &(*m_intc1)), write8_delegate(FUNC(pic8259_device::write), &(*m_intc1)), 0x0000ffff);
	m_space_io->install_write_handler(0x0020, 0x0023, write8_delegate(FUNC(cs4031_device::config_address_w), this), 0x00ff0000);
	m_space_io->install_readwrite_handler(0x0020, 0x0023, read8_delegate(FUNC(cs4031_device::config_data_r), this), write8_delegate(FUNC(cs4031_device::config_data_w), this), 0xff000000);
	m_space_io->install_readwrite_handler(0x0040, 0x0043, read8_delegate(FUNC(pit8254_device::read), &(*m_ctc)), write8_delegate(FUNC(pit8254_device::write), &(*m_ctc)), 0xffffffff);
	m_space_io->install_readwrite_handler(0x0060, 0x0063, read8_delegate(FUNC(cs4031_device::keyb_data_r), this), write8_delegate(FUNC(cs4031_device::keyb_data_w), this), 0x000000ff);
	m_space_io->install_readwrite_handler(0x0060, 0x0063, read8_delegate(FUNC(cs4031_device::portb_r), this), write8_delegate(FUNC(cs4031_device::portb_w), this), 0x0000ff00);
	m_space_io->install_readwrite_handler(0x0064, 0x0067, read8_delegate(FUNC(cs4031_device::keyb_status_r), this), write8_delegate(FUNC(cs4031_device::keyb_command_w), this), 0x000000ff);
	m_space_io->install_readwrite_handler(0x0070, 0x0073, read8_delegate(FUNC(mc146818_device::read), &(*m_rtc)), write8_delegate(FUNC(cs4031_device::rtc_w), this), 0x0000ffff);
	m_space_io->install_readwrite_handler(0x0080, 0x008f, read8_delegate(FUNC(cs4031_device::dma_page_r), this), write8_delegate(FUNC(cs4031_device::dma_page_w), this), 0xffffffff);
	m_space_io->install_readwrite_handler(0x0090, 0x0093, read8_delegate(FUNC(cs4031_device::sysctrl_r), this), write8_delegate(FUNC(cs4031_device::sysctrl_w), this), 0x00ff0000);
	m_space_io->install_readwrite_handler(0x00a0, 0x00a3, read8_delegate(FUNC(pic8259_device::read), &(*m_intc2)), write8_delegate(FUNC(pic8259_device::write), &(*m_intc2)), 0x0000ffff);
	m_space_io->install_readwrite_handler(0x00c0, 0x00df, read8_delegate(FUNC(cs4031_device::dma2_r),this), write8_delegate(FUNC(cs4031_device::dma2_w),this), 0xffffffff);
}

void b2m_state::b2m_set_bank(int bank)
{
	UINT8 *rom;
	address_space &space = m_maincpu->space(AS_PROGRAM);
	UINT8 *ram = m_ram->pointer();

	space.install_write_bank(0x0000, 0x27ff, "bank1");
	space.install_write_bank(0x2800, 0x2fff, "bank2");
	space.install_write_bank(0x3000, 0x6fff, "bank3");
	space.install_write_bank(0x7000, 0xdfff, "bank4");
	space.install_write_bank(0xe000, 0xffff, "bank5");

	rom = memregion("maincpu")->base();
	switch(bank) {
		case 0 :
		case 1 :
						space.unmap_write(0xe000, 0xffff);

						membank("bank1")->set_base(ram);
						membank("bank2")->set_base(ram + 0x2800);
						membank("bank3")->set_base(ram + 0x3000);
						membank("bank4")->set_base(ram + 0x7000);
						membank("bank5")->set_base(rom + 0x10000);
						break;
#if 0
		case 1 :
						space.unmap_write(0x3000, 0x6fff);
						space.unmap_write(0xe000, 0xffff);

						membank("bank1")->set_base(ram);
						membank("bank2")->set_base(ram + 0x2800);
						membank("bank3")->set_base(rom + 0x12000);
						membank("bank4")->set_base(rom + 0x16000);
						membank("bank5")->set_base(rom + 0x10000);
						break;
#endif
		case 2 :
						space.unmap_write(0x2800, 0x2fff);
						space.unmap_write(0xe000, 0xffff);

						membank("bank1")->set_base(ram);
						space.install_read_handler(0x2800, 0x2fff, read8_delegate(FUNC(b2m_state::b2m_keyboard_r),this));
						membank("bank3")->set_base(ram + 0x10000);
						membank("bank4")->set_base(ram + 0x7000);
						membank("bank5")->set_base(rom + 0x10000);
						break;
		case 3 :
						space.unmap_write(0x2800, 0x2fff);
						space.unmap_write(0xe000, 0xffff);

						membank("bank1")->set_base(ram);
						space.install_read_handler(0x2800, 0x2fff, read8_delegate(FUNC(b2m_state::b2m_keyboard_r),this));
						membank("bank3")->set_base(ram + 0x14000);
						membank("bank4")->set_base(ram + 0x7000);
						membank("bank5")->set_base(rom + 0x10000);
						break;
		case 4 :
						space.unmap_write(0x2800, 0x2fff);
						space.unmap_write(0xe000, 0xffff);

						membank("bank1")->set_base(ram);
						space.install_read_handler(0x2800, 0x2fff, read8_delegate(FUNC(b2m_state::b2m_keyboard_r),this));
						membank("bank3")->set_base(ram + 0x18000);
						membank("bank4")->set_base(ram + 0x7000);
						membank("bank5")->set_base(rom + 0x10000);

						break;
		case 5 :
						space.unmap_write(0x2800, 0x2fff);
						space.unmap_write(0xe000, 0xffff);

						membank("bank1")->set_base(ram);
						space.install_read_handler(0x2800, 0x2fff, read8_delegate(FUNC(b2m_state::b2m_keyboard_r),this));
						membank("bank3")->set_base(ram + 0x1c000);
						membank("bank4")->set_base(ram + 0x7000);
						membank("bank5")->set_base(rom + 0x10000);

						break;
		case 6 :
						membank("bank1")->set_base(ram);
						membank("bank2")->set_base(ram + 0x2800);
						membank("bank3")->set_base(ram + 0x3000);
						membank("bank4")->set_base(ram + 0x7000);
						membank("bank5")->set_base(ram + 0xe000);
						break;
		case 7 :
						space.unmap_write(0x0000, 0x27ff);
						space.unmap_write(0x2800, 0x2fff);
						space.unmap_write(0x3000, 0x6fff);
						space.unmap_write(0x7000, 0xdfff);
						space.unmap_write(0xe000, 0xffff);

						membank("bank1")->set_base(rom + 0x10000);
						membank("bank2")->set_base(rom + 0x10000);
						membank("bank3")->set_base(rom + 0x10000);
						membank("bank4")->set_base(rom + 0x10000);
						membank("bank5")->set_base(rom + 0x10000);
						break;
	}
}

static DRIVER_INIT( lkageb )
{
	lkage_state *state = machine.driver_data<lkage_state>();
	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0xf062, 0xf062, read8_delegate(FUNC(lkage_state::fake_mcu_r),state));
	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0xf087, 0xf087, read8_delegate(FUNC(lkage_state::fake_status_r),state));
	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0xf062, 0xf062, write8_delegate(FUNC(lkage_state::fake_mcu_w),state));
	state->m_sprite_dx=0;
}

DRIVER_INIT_MEMBER(naughtyb_state,trvmstr)
{
	/* install questions' handlers  */
	m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xc000, 0xc002, read8_delegate(FUNC(naughtyb_state::trvmstr_questions_r),this), write8_delegate(FUNC(naughtyb_state::trvmstr_questions_w),this));
}

void c65_state::c65_bankswitch(  )
{
	int data, loram, hiram, charen;

	data = 0x00; // machine().device<m4510_device>("maincpu")->get_port();
	if (data == m_old_data)
		return;

	DBG_LOG(machine(), 1, "bankswitch", ("%d\n", data & 7));
	loram = (data & 1) ? 1 : 0;
	hiram = (data & 2) ? 1 : 0;
	charen = (data & 4) ? 1 : 0;

	if ((!m_game && m_exrom) || (loram && hiram && !m_exrom))
		membank("bank1")->set_base(m_roml);
	else
		membank("bank1")->set_base(m_memory + 0x8000);

	if ((!m_game && m_exrom && hiram) || (!m_exrom))
		membank("bank2")->set_base(m_romh);
	else if (loram && hiram)
		membank("bank2")->set_base(m_basic);
	else
		membank("bank2")->set_base(m_memory + 0xa000);

	if ((!m_game && m_exrom) || (charen && (loram || hiram)))
	{
		m_io_on = 1;
		membank("bank6")->set_base(m_colorram);
		membank("bank7")->set_base(m_colorram);

		if (m_io_dc00_on)
		{
			m_maincpu->space(AS_PROGRAM).install_read_handler(0x0dc00, 0x0dfff, read8_delegate(FUNC(c65_state::c65_read_io_dc00),this));
			m_maincpu->space(AS_PROGRAM).install_write_handler(0x0dc00, 0x0dfff, write8_delegate(FUNC(c65_state::c65_write_io_dc00),this));
		}
		else
		{
			m_maincpu->space(AS_PROGRAM).install_read_bank(0x0dc00, 0x0dfff, "bank8");
			m_maincpu->space(AS_PROGRAM).install_write_bank(0x0dc00, 0x0dfff, "bank9");
			membank("bank8")->set_base(m_colorram + 0x400);
			membank("bank9")->set_base(m_colorram + 0x400);
		}
		m_maincpu->space(AS_PROGRAM).install_read_handler(0x0d000, 0x0d7ff, read8_delegate(FUNC(c65_state::c65_read_io),this));
		m_maincpu->space(AS_PROGRAM).install_write_handler(0x0d000, 0x0d7ff, write8_delegate(FUNC(c65_state::c65_write_io),this));
	}
	else
	{
		m_io_on = 0;
		membank("bank5")->set_base(m_memory + 0xd000);
		membank("bank7")->set_base(m_memory + 0xd800);
		membank("bank9")->set_base(m_memory + 0xdc00);
		if (!charen && (loram || hiram))
		{
			membank("bank4")->set_base(m_chargen);
			membank("bank6")->set_base(m_chargen + 0x800);
			membank("bank8")->set_base(m_chargen + 0xc00);
		}
		else
		{
			membank("bank4")->set_base(m_memory + 0xd000);
			membank("bank6")->set_base(m_memory + 0xd800);
			membank("bank8")->set_base(m_memory + 0xdc00);
		}
		m_maincpu->space(AS_PROGRAM).install_read_bank(0x0d000, 0x0d7ff, "bank4");
		m_maincpu->space(AS_PROGRAM).install_write_bank(0x0d000, 0x0d7ff, "bank5");
	}

	if (!m_game && m_exrom)
	{
		membank("bank10")->set_base(m_romh);
	}
	else
	{
		if (hiram)
		{
			membank("bank10")->set_base(m_kernal);
		}
		else
		{
			membank("bank10")->set_base(m_memory + 0xe000);
		}
	}
	m_old_data = data;
}

void dectalk_isa_device::device_start()
{
	set_isa_device();
	m_isa->install_device(0x0250, 0x0257, 0, 0, read8_delegate(FUNC(dectalk_isa_device::read), this), write8_delegate(FUNC(dectalk_isa_device::write), this));
}

static MACHINE_START( cham24 )
{
    cham24_state *state = machine.driver_data<cham24_state>();
    /* switch PRG rom */
    UINT8* dst = state->memregion("maincpu")->base();
    UINT8* src = state->memregion("user1")->base();

    memcpy(&dst[0x8000], &src[0x0f8000], 0x4000);
    memcpy(&dst[0xc000], &src[0x0f8000], 0x4000);

    /* uses 8K swapping, all ROM!*/
    machine.device("ppu")->memory().space(AS_PROGRAM)->install_read_bank(0x0000, 0x1fff, "bank1");
    state->membank("bank1")->set_base(state->memregion("gfx1")->base());

    /* need nametable ram, though. I doubt this uses more than 2k, but it starts up configured for 4 */
    state->m_nt_ram = auto_alloc_array(machine, UINT8, 0x1000);
    state->m_nt_page[0] = state->m_nt_ram;
    state->m_nt_page[1] = state->m_nt_ram + 0x400;
    state->m_nt_page[2] = state->m_nt_ram + 0x800;
    state->m_nt_page[3] = state->m_nt_ram + 0xc00;

    /* and read/write handlers */
    machine.device("ppu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0x2000, 0x3eff,read8_delegate(FUNC(cham24_state::nt_r), state), write8_delegate(FUNC(cham24_state::nt_w), state));
}

DRIVER_INIT_MEMBER(exprraid_state,wexpressb3)
{
	m_maincpu->space(AS_PROGRAM).install_read_handler(0xFFC0, 0xFFC0, read8_delegate(FUNC(exprraid_state::vblank_r),this));
	exprraid_gfx_expand();
}

void cgenie_state::machine_reset()
{
	address_space &space = m_maincpu->space(AS_PROGRAM);
	UINT8 *ROM = memregion("maincpu")->base();

	/* reset the AY8910 to be quiet, since the cgenie BIOS doesn't */
	AYWriteReg(0, 0, 0);
	AYWriteReg(0, 1, 0);
	AYWriteReg(0, 2, 0);
	AYWriteReg(0, 3, 0);
	AYWriteReg(0, 4, 0);
	AYWriteReg(0, 5, 0);
	AYWriteReg(0, 6, 0);
	AYWriteReg(0, 7, 0x3f);
	AYWriteReg(0, 8, 0);
	AYWriteReg(0, 9, 0);
	AYWriteReg(0, 10, 0);

	/* wipe out color RAM */
	memset(&ROM[0x0f000], 0x00, 0x0400);

	/* wipe out font RAM */
	memset(&ROM[0x0f400], 0xff, 0x0400);

	if( ioport("DSW0")->read() & 0x80 )
	{
		logerror("cgenie floppy discs enabled\n");
	}
	else
	{
		logerror("cgenie floppy discs disabled\n");
	}

	/* copy DOS ROM, if enabled or wipe out that memory area */
	if( ioport("DSW0")->read() & 0x40 )
	{
		if ( ioport("DSW0")->read() & 0x80 )
		{
			space.install_read_bank(0xc000, 0xdfff, "bank10");
			space.nop_write(0xc000, 0xdfff);
			membank("bank10")->set_base(&ROM[0x0c000]);
			logerror("cgenie DOS enabled\n");
			memcpy(&ROM[0x0c000],&ROM[0x10000], 0x2000);
		}
		else
		{
			space.nop_readwrite(0xc000, 0xdfff);
			logerror("cgenie DOS disabled (no floppy image given)\n");
		}
	}
	else
	{
		space.nop_readwrite(0xc000, 0xdfff);
		logerror("cgenie DOS disabled\n");
		memset(&memregion("maincpu")->base()[0x0c000], 0x00, 0x2000);
	}

	/* copy EXT ROM, if enabled or wipe out that memory area */
	if (ioport("DSW0")->read() & 0x20 && m_cart->exists())
	{
		m_maincpu->space(AS_PROGRAM).install_read_handler(0xe000, 0xefff, read8_delegate(FUNC(generic_slot_device::read_rom),(generic_slot_device*)m_cart));
		logerror("cgenie EXT enabled\n");
	}
	else
	{
		space.nop_readwrite(0xe000, 0xefff);
		logerror("cgenie EXT disabled\n");
	}

	m_cass_level = 0;
	m_cass_bit = 1;
}

void v53_base_device::install_peripheral_io()
{
    // unmap everything in I/O space up to the fixed position registers (we avoid overwriting them, it isn't a valid config)
    space(AS_IO).unmap_readwrite(0x1000, 0xfeff); // todo, we need to have a way to NOT unmap things defined in the drivers, but instead have this act as an overlay mapping / unampping only!!

    // IOAG determines if the handlers used 8-bit or 16-bit access
    // the hng64.c games first set everything up in 8-bit mode, then
    // do the procedure again in 16-bit mode before using them?!

    int IOAG = m_SCTL & 1;

    if (m_OPSEL & 0x01) // DMA Unit available
    {
        UINT16 base = (m_OPHA << 8) | m_DULA;
        base &= 0xfffe;

        if (m_SCTL & 0x02) // uPD71037 mode
        {
            if (IOAG) // 8-bit
            {
            }
            else
            {
            }
        }
        else // uPD71071 mode
        {
            space(AS_IO).install_readwrite_handler(base+0x00, base+0x0f, read8_delegate(FUNC(upd71071_v53_device::read), (upd71071_v53_device*)m_v53dmau), write8_delegate(FUNC(upd71071_v53_device::write),  (upd71071_v53_device*)m_v53dmau), 0xffff);
        }
    }

    if (m_OPSEL & 0x02) // Interupt Control Unit available
    {
        UINT16 base = (m_OPHA << 8) | m_IULA;
        base &= 0xfffe;

        if (IOAG) // 8-bit
        {
        }
        else
        {
            space(AS_IO).install_readwrite_handler(base+0x00, base+0x03, read8_delegate(FUNC(pic8259_device::read), (pic8259_device*)m_v53icu), write8_delegate(FUNC(pic8259_device::write), (pic8259_device*)m_v53icu), 0x00ff);
        }
    }

    if (m_OPSEL & 0x04) // Timer Control Unit available
    {
        UINT16 base = (m_OPHA << 8) | m_TULA;
        //printf("installing TCU to %04x\n", base);
        base &= 0xfffe;

        if (IOAG) // 8-bit
        {
        }
        else
        {
            space(AS_IO).install_readwrite_handler(base+0x00, base+0x01, read8_delegate(FUNC(v53_base_device::tmu_tst0_r), this), write8_delegate(FUNC(v53_base_device::tmu_tct0_w), this), 0x00ff);
            space(AS_IO).install_readwrite_handler(base+0x02, base+0x03, read8_delegate(FUNC(v53_base_device::tmu_tst1_r), this), write8_delegate(FUNC(v53_base_device::tmu_tct1_w), this), 0x00ff);
            space(AS_IO).install_readwrite_handler(base+0x04, base+0x05, read8_delegate(FUNC(v53_base_device::tmu_tst2_r), this), write8_delegate(FUNC(v53_base_device::tmu_tct2_w), this), 0x00ff);
            space(AS_IO).install_write_handler(base+0x06, base+0x07, write8_delegate(FUNC(v53_base_device::tmu_tmd_w), this), 0x00ff);
        }
    }

    if (m_OPSEL & 0x08) // Serial Control Unit available
    {
        UINT16 base = (m_OPHA << 8) | m_SULA;
        base &= 0xfffe;

        if (IOAG) // 8-bit
        {
        }
        else
        {
            space(AS_IO).install_readwrite_handler(base+0x00, base+0x01, read8_delegate(FUNC(v53_scu_device::data_r), (v53_scu_device*)m_v53scu), write8_delegate(FUNC(v53_scu_device::data_w), (v53_scu_device*)m_v53scu), 0x00ff);
            space(AS_IO).install_readwrite_handler(base+0x02, base+0x03, read8_delegate(FUNC(v53_scu_device::status_r),  (v53_scu_device*)m_v53scu), write8_delegate(FUNC(v53_scu_device::command_w),  (v53_scu_device*)m_v53scu), 0x00ff);
            space(AS_IO).install_write_handler(base+0x04, base+0x05, write8_delegate(FUNC(v53_scu_device::mode_w), (v53_scu_device*)m_v53scu), 0x00ff);
            space(AS_IO).install_readwrite_handler(base+0x06, base+0x07, read8_delegate(FUNC(v53_base_device::scu_simk_r), this), write8_delegate(FUNC(v53_base_device::scu_simk_w), this), 0x00ff);

        }
    }

}

void nascom_avc_device::device_reset()
{
	m_nasbus->m_io->install_write_handler(0xb0, 0xb0, write8_delegate(FUNC(mc6845_device::address_w), m_crtc.target()));
	m_nasbus->m_io->install_readwrite_handler(0xb1, 0xb1, read8_delegate(FUNC(mc6845_device::register_r), m_crtc.target()), write8_delegate(FUNC(mc6845_device::register_w), m_crtc.target()));
	m_nasbus->m_io->install_write_handler(0xb2, 0xb2, write8_delegate(FUNC(nascom_avc_device::control_w), this));
}

void dmv_k220_device::device_start()
{
	address_space &space = machine().device<cpu_device>("maincpu")->space(AS_IO);
	space.install_readwrite_handler(0x08, 0x0b, 0, 0, read8_delegate(FUNC(pit8253_device::read), &(*m_pit)), write8_delegate(FUNC(pit8253_device::write), &(*m_pit)), 0);
	space.install_readwrite_handler(0x0c, 0x0f, 0, 0, read8_delegate(FUNC(i8255_device::read), &(*m_ppi)), write8_delegate(FUNC(i8255_device::write), &(*m_ppi)), 0);
}

DRIVER_INIT_MEMBER(strnskil_state,banbam)
{
	/* Fujitsu MB8841 4-Bit MCU */
	m_maincpu->space(AS_PROGRAM).install_read_handler(0xd806, 0xd806, read8_delegate(FUNC(strnskil_state::banbam_protection_r),this));
	m_maincpu->space(AS_PROGRAM).install_write_handler(0xd80d, 0xd80d, write8_delegate(FUNC(strnskil_state::protection_w),this));
}