C++ pxa_set_ohci_info函数代码示例

static void __init mainstone_init(void)
{
	int SW7 = 0;  /* FIXME: get from SCR (Mst doc section 3.2.1.1) */

	mst_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
	mst_flash_data[1].width = 4;

	/* Compensate for SW7 which swaps the flash banks */
	mst_flash_data[SW7].name = "processor-flash";
	mst_flash_data[SW7 ^ 1].name = "mainboard-flash";

	printk(KERN_NOTICE "Mainstone configured to boot from %s\n",
	       mst_flash_data[0].name);

	/* system bus arbiter setting
	 * - Core_Park
	 * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
	 */
	ARB_CNTRL = ARB_CORE_PARK | 0x234;

	/*
	 * On Mainstone, we route AC97_SYSCLK via GPIO45 to
	 * the audio daughter card
	 */
	pxa_gpio_mode(GPIO45_SYSCLK_AC97_MD);

	GPSR(GPIO48_nPOE) =
		GPIO_bit(GPIO48_nPOE) |
		GPIO_bit(GPIO49_nPWE) |
		GPIO_bit(GPIO50_nPIOR) |
		GPIO_bit(GPIO51_nPIOW) |
		GPIO_bit(GPIO85_nPCE_1) |
		GPIO_bit(GPIO54_nPCE_2);

	pxa_gpio_mode(GPIO48_nPOE_MD);
	pxa_gpio_mode(GPIO49_nPWE_MD);
	pxa_gpio_mode(GPIO50_nPIOR_MD);
	pxa_gpio_mode(GPIO51_nPIOW_MD);
	pxa_gpio_mode(GPIO85_nPCE_1_MD);
	pxa_gpio_mode(GPIO54_nPCE_2_MD);
	pxa_gpio_mode(GPIO79_pSKTSEL_MD);
	pxa_gpio_mode(GPIO55_nPREG_MD);
	pxa_gpio_mode(GPIO56_nPWAIT_MD);
	pxa_gpio_mode(GPIO57_nIOIS16_MD);

	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));

	/* reading Mainstone's "Virtual Configuration Register"
	   might be handy to select LCD type here */
	if (0)
		mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode;
	else
		mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode;

	set_pxa_fb_info(&mainstone_pxafb_info);

	pxa_set_mci_info(&mainstone_mci_platform_data);
	pxa_set_ficp_info(&mainstone_ficp_platform_data);
	pxa_set_ohci_info(&mainstone_ohci_platform_data);
}

static void __init zeus_init(void)
{
	u16 dm9000_msc = 0xe279;

	system_rev = __raw_readw(ZEUS_CPLD_VERSION);
	pr_info("Zeus CPLD V%dI%d\n", (system_rev & 0xf0) >> 4, (system_rev & 0x0f));

	/* Fix timings for dm9000s (CS1/CS2)*/
	MSC0 = (MSC0 & 0xffff) | (dm9000_msc << 16);
	MSC1 = (MSC1 & 0xffff0000) | dm9000_msc;

	pm_power_off = zeus_power_off;

	pxa2xx_mfp_config(ARRAY_AND_SIZE(zeus_pin_config));

	platform_add_devices(zeus_devices, ARRAY_SIZE(zeus_devices));

	pxa_set_ohci_info(&zeus_ohci_platform_data);

	if (zeus_setup_fb_gpios())
		pr_err("Failed to setup fb gpios\n");
	else
		set_pxa_fb_info(&zeus_fb_info);

	pxa_set_mci_info(&zeus_mci_platform_data);
	pxa_set_udc_info(&zeus_udc_info);
	pxa_set_ac97_info(&zeus_ac97_info);
	pxa_set_i2c_info(NULL);
	i2c_register_board_info(0, ARRAY_AND_SIZE(zeus_i2c_devices));
}

static void __init balloon3_uhc_init(void)
{
	if (!balloon3_has(BALLOON3_FEATURE_OHCI))
		return;
	pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_uhc_pin_config));
	pxa_set_ohci_info(&balloon3_ohci_info);
}

static void __init htcathena_init(void)
{
	platform_device_register(&htcathena_w2284);

	platform_add_devices( devices, ARRAY_SIZE(devices) );
//	pxa_set_btuart_info(&htcathena_pxa_phone_funcs);

	mdelay(5000);

#if 0
	printk("HTCATHENA: isp1582=%d, board=%d\n",
	 gpio_get_value(EGPIO1_HTCATHENA_ISP1582_ON),0);
//	 EGPIO1_HTCATHENA_ISP1582_ON,EGPIO2_HTCATHENA_BOARDID0);

	printk("HTCATHENA: board_id=%d\n",
	 gpio_get_value(EGPIO2_HTCATHENA_BOARDID0)*1+
	 gpio_get_value(EGPIO2_HTCATHENA_BOARDID1)*2+
	 gpio_get_value(EGPIO2_HTCATHENA_BOARDID1)*4
	);
#endif

//	pxa_set_mci_info(&athena_mci_platform_data);
//	pxa_set_ficp_info(&athena_ficp_platform_data);
	pxa_set_ohci_info(&athena_ohci_platform_data);

}

static void __init common_init(void)
{
	init_gpio_reset(SPITZ_GPIO_ON_RESET, 1);
	pm_power_off = spitz_poweroff;
	arm_pm_restart = spitz_restart;

	if (machine_is_spitz()) {
		sharpsl_nand_partitions[1].size = 5 * 1024 * 1024;
	} else if (machine_is_akita()) {
		sharpsl_nand_partitions[1].size = 58 * 1024 * 1024;
	} else if (machine_is_borzoi()) {
		sharpsl_nand_partitions[1].size = 32 * 1024 * 1024;
	}

	PMCR = 0x00;

	/* Stop 3.6MHz and drive HIGH to PCMCIA and CS */
	PCFR |= PCFR_OPDE;

	pxa2xx_mfp_config(ARRAY_AND_SIZE(spitz_pin_config));

	spitz_init_spi();

	platform_add_devices(devices, ARRAY_SIZE(devices));
	pxa_set_mci_info(&spitz_mci_platform_data);
	pxa_set_ohci_info(&spitz_ohci_platform_data);
	pxa_set_ficp_info(&spitz_ficp_platform_data);
	set_pxa_fb_info(&spitz_pxafb_info);
	pxa_set_i2c_info(NULL);
}

static void __init common_init(void)
{
	pm_power_off = spitz_poweroff;
	arm_pm_restart = spitz_restart;

	PMCR = 0x00;

	/* setup sleep mode values */
	PWER  = 0x00000002;
	PFER  = 0x00000000;
	PRER  = 0x00000002;
	PGSR0 = 0x0158C000;
	PGSR1 = 0x00FF0080;
	PGSR2 = 0x0001C004;

	/* Stop 3.6MHz and drive HIGH to PCMCIA and CS */
	PCFR |= PCFR_OPDE;

	corgi_ssp_set_machinfo(&spitz_ssp_machinfo);

	pxa_gpio_mode(SPITZ_GPIO_HSYNC | GPIO_IN);

	platform_add_devices(devices, ARRAY_SIZE(devices));
	pxa_set_mci_info(&spitz_mci_platform_data);
	pxa_set_ohci_info(&spitz_ohci_platform_data);
	pxa_set_ficp_info(&spitz_ficp_platform_data);
	set_pxa_fb_parent(&spitzssp_device.dev);
	set_pxa_fb_info(&spitz_pxafb_info);
}

/*
 * system init for baseboard usage. Will be called by pcm027 init.
 *
 * Add platform devices present on this baseboard and init
 * them from CPU side as far as required to use them later on
 */
void __init pcm990_baseboard_init(void)
{
    /* register CPLD access */
    iotable_init(pcm990_io_desc, ARRAY_SIZE(pcm990_io_desc));

    /* register CPLD's IRQ controller */
    pcm990_init_irq();

    platform_device_register(&pxa27x_device_ac97);

    /* MMC */
    pxa_set_mci_info(&pcm990_mci_platform_data);

    /* USB host */
    pxa_set_ohci_info(&pcm990_ohci_platform_data);

    pxa_set_i2c_info(NULL);

#if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE)
    pxa_set_camera_info(&pcm990_pxacamera_platform_data);

    i2c_register_board_info(0, pcm990_i2c_devices,
        ARRAY_SIZE(pcm990_i2c_devices));
#endif

    printk(KERN_INFO"PCM-990 Evaluation baseboard initialized\n");
}

static void __init lpd270_init(void)
{
	pxa2xx_mfp_config(ARRAY_AND_SIZE(lpd270_pin_config));

	pxa_set_ffuart_info(NULL);
	pxa_set_btuart_info(NULL);
	pxa_set_stuart_info(NULL);

	lpd270_flash_data[0].width = (__raw_readl(BOOT_DEF) & 1) ? 2 : 4;
	lpd270_flash_data[1].width = 4;

	/*
	 * System bus arbiter setting:
	 * - Core_Park
	 * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
	 */
	ARB_CNTRL = ARB_CORE_PARK | 0x234;

	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));

	pxa_set_ac97_info(NULL);

	if (lpd270_lcd_to_use != NULL)
		pxa_set_fb_info(NULL, lpd270_lcd_to_use);

	pxa_set_ohci_info(&lpd270_ohci_platform_data);
}

static void zeus_register_ohci(void)
{
	/* Port 2 is shared between host and client interface. */
	UP2OCR = UP2OCR_HXOE | UP2OCR_HXS | UP2OCR_DMPDE | UP2OCR_DPPDE;

	pxa_set_ohci_info(&zeus_ohci_platform_data);
}

static void __init magician_init(void)
{
	platform_add_devices(devices, ARRAY_SIZE(devices));
	pxa_set_ohci_info(&magician_ohci_info);
	pxa_set_ficp_info(&magician_ficp_info);
	set_pxa_fb_info(&toppoly_info);
}

static void __init colibri_uhc_init(void)
{
	/*                                               */
	if (machine_is_colibri())
		colibri_ohci_info.flags	|= ENABLE_PORT2;

	pxa_set_ohci_info(&colibri_ohci_info);
}

static void __init colibri_uhc_init(void)
{
	/* Colibri PXA270 has two usb ports, TBA for 320 */
	if (machine_is_colibri())
		colibri_ohci_info.flags	|= ENABLE_PORT2;

	pxa_set_ohci_info(&colibri_ohci_info);
}

static void __init treo680_init(void)
{
	treo_init();
	pxa2xx_mfp_config(ARRAY_AND_SIZE(treo680_pin_config));
	pxa_set_mci_info(&treo680_mci_platform_data);
	pxa_set_keypad_info(&treo680_keypad_platform_data);
	pxa_set_ohci_info(&treo680_ohci_info);

	platform_add_devices(ARRAY_AND_SIZE(treo680_devices));
}

static void __init trizeps4_init(void)
{
	platform_add_devices(trizeps4_devices, ARRAY_SIZE(trizeps4_devices));

/*	set_pxa_fb_info(&sharp_lcd); */
	set_pxa_fb_info(&toshiba_lcd);

	pxa_set_mci_info(&trizeps4_mci_platform_data);
	pxa_set_ficp_info(&trizeps4_ficp_platform_data);
	pxa_set_ohci_info(&trizeps4_ohci_platform_data);
}

static void __init magician_init(void)
{
	void __iomem *cpld;
	int lcd_select;
	int err;

	gpio_request(GPIO13_MAGICIAN_CPLD_IRQ, "CPLD_IRQ");
	gpio_request(GPIO107_MAGICIAN_DS1WM_IRQ, "DS1WM_IRQ");

	pxa2xx_mfp_config(ARRAY_AND_SIZE(magician_pin_config));

	pxa_set_ffuart_info(NULL);
	pxa_set_btuart_info(NULL);
	pxa_set_stuart_info(NULL);

	platform_add_devices(ARRAY_AND_SIZE(devices));

	err = gpio_request(GPIO83_MAGICIAN_nIR_EN, "nIR_EN");
	if (!err) {
		gpio_direction_output(GPIO83_MAGICIAN_nIR_EN, 1);
		pxa_set_ficp_info(&magician_ficp_info);
	}
	pxa27x_set_i2c_power_info(NULL);
	pxa_set_i2c_info(&i2c_info);
	pxa_set_mci_info(&magician_mci_info);
	pxa_set_ohci_info(&magician_ohci_info);

	/* Check LCD type we have */
	cpld = ioremap_nocache(PXA_CS3_PHYS, 0x1000);
	if (cpld) {
		u8 board_id = __raw_readb(cpld+0x14);
		iounmap(cpld);
		system_rev = board_id & 0x7;
		lcd_select = board_id & 0x8;
		pr_info("LCD type: %s\n", lcd_select ? "Samsung" : "Toppoly");
		if (lcd_select && (system_rev < 3)) {
			gpio_request(GPIO75_MAGICIAN_SAMSUNG_POWER, "SAMSUNG_POWER");
			gpio_direction_output(GPIO75_MAGICIAN_SAMSUNG_POWER, 0);
		}
		gpio_request(GPIO104_MAGICIAN_LCD_POWER_1, "LCD_POWER_1");
		gpio_request(GPIO105_MAGICIAN_LCD_POWER_2, "LCD_POWER_2");
		gpio_request(GPIO106_MAGICIAN_LCD_POWER_3, "LCD_POWER_3");
		gpio_direction_output(GPIO104_MAGICIAN_LCD_POWER_1, 0);
		gpio_direction_output(GPIO105_MAGICIAN_LCD_POWER_2, 0);
		gpio_direction_output(GPIO106_MAGICIAN_LCD_POWER_3, 0);
		set_pxa_fb_info(lcd_select ? &samsung_info : &toppoly_info);
	} else
		pr_err("LCD detection: CPLD mapping failed\n");
}