C++ portYIELD_FROM_ISR函数代码示例

static void vSerialISR( XUartLite *pxUART )
{
unsigned portLONG ulISRStatus;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE, lDidSomething;
portCHAR cChar;

	/* Just to remove compiler warning. */
	( void ) pxUART;

	do
	{
		lDidSomething = pdFALSE;

		ulISRStatus = XIo_In32( XPAR_RS232_UART_BASEADDR + XUL_STATUS_REG_OFFSET );

		if( ( ulISRStatus & XUL_SR_RX_FIFO_VALID_DATA ) != 0 )
		{
			/* A character is available - place it in the queue of received
			characters.  This might wake a task that was blocked waiting for 
			data. */
			cChar = ( portCHAR ) XIo_In32( XPAR_RS232_UART_BASEADDR + XUL_RX_FIFO_OFFSET );
			xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
			lDidSomething = pdTRUE;
		}
		
		if( ( ulISRStatus & XUL_SR_TX_FIFO_EMPTY ) != 0 )
		{
			/* There is space in the FIFO - if there are any characters queue for
			transmission they can be sent to the UART now.  This might unblock a
			task that was waiting for space to become available on the Tx queue. */
			if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
			{
				XIo_Out32( XPAR_RS232_UART_BASEADDR + XUL_TX_FIFO_OFFSET, cChar );
				lDidSomething = pdTRUE;
			}			
		}
	} while( lDidSomething == pdTRUE );

	/* If we woke any tasks we may require a context switch. */
	if( xHigherPriorityTaskWoken )
	{
		portYIELD_FROM_ISR();
	}
}

static void prvTimerHandler( void *pvCallBackRef )
{
uint32_t ulInterruptStatus;
XTtcPs *pxTimer = ( XTtcPs * ) pvCallBackRef;
BaseType_t xYieldRequired;

	/* Read the interrupt status, then write it back to clear the interrupt. */
	ulInterruptStatus = XTtcPs_GetInterruptStatus( pxTimer );
	XTtcPs_ClearInterruptStatus( pxTimer, ulInterruptStatus );

	/* Only one interrupt event type is expected. */
	configASSERT( ( XTTCPS_IXR_INTERVAL_MASK & ulInterruptStatus ) != 0 );

	/* Check the device ID to know which IntQueue demo to call. */
	if( pxTimer->Config.DeviceId == xDeviceIDs[ 0 ] )
	{
		xYieldRequired = xFirstTimerHandler();
	}
	else if( pxTimer->Config.DeviceId == xDeviceIDs[ 1 ] )
	{
		xYieldRequired = xSecondTimerHandler();
	}
	else
	{
		/* Used to check the timer is running at the expected frequency. */
		ulHighFrequencyTimerCounts++;

		/* Latch the highest interrupt nesting count detected. */
		if( ulPortInterruptNesting > ulMaxRecordedNesting )
		{
			ulMaxRecordedNesting = ulPortInterruptNesting;
		}

		xYieldRequired = pdFALSE;
	}

	/* If xYieldRequired is not pdFALSE then calling either xFirstTimerHandler()
	or xSecondTimerHandler() resulted in a task leaving the blocked state and
	the task that left the blocked state had a priority higher than the currently
	running task (the task this interrupt interrupted) - so a context switch
	should be performed so the interrupt returns directly to the higher priority
	task.  xYieldRequired is tested inside the following macro. */
	portYIELD_FROM_ISR( xYieldRequired );
}

__interrupt void vSCIInterruptHandler( void )
{
/* xHigherPriorityTaskWoken must be initialised to pdFALSE. */
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
char cChar;
portBASE_TYPE xVectorValue = serialSCI_INTVEC0_REG;

	switch( xVectorValue )
	{
		case 11:
			/* Receive buffer full interrupt, send received char to queue */
			cChar = serialSCI_RD_REG;
			xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
			break;

		case 12:
			/* Transmit buffer empty interrupt received */
			/* Are there any more characters to transmit? */
			if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
			{
				/* A character was retrieved from the queue so can be sent to
				the TD now. */
				serialSCI_TD_REG = cChar;
			}
			else
			{
				/* no more bytes, clear the TX interrupt */
				serialSCI_CLRINT_REG = serialSCI_TX_INT;
			}
			break;

		default:
			/* unused interrupt, clear flags */
			serialSCI_FLR_REG = 0x07000003;
	}

	/* If calling xQueueSendFromISR() above caused a task to leave the blocked
	state, and the task that left the blocked state has a priority above the
	task that this interrupt interrupted, then xHighPriorityTaskWoken will have
	been set to pdTRUE.  If xHigherPriorityTaskWoken equals true then calling
	portYIELD_FROM_ISR() will result in this interrupt returning directly to the
	unblocked task. */
	portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
}

/**
* @brief  Resume execution of a suspended thread.
* @param   thread_id   thread ID obtained by \ref osThreadCreate or \ref osThreadGetId.
* @retval  status code that indicates the execution status of the function.
*/
osStatus osThreadResume (osThreadId thread_id)
{
#if (INCLUDE_vTaskSuspend == 1)  
  if(inHandlerMode())
  {
    if (xTaskResumeFromISR(thread_id) == pdTRUE)
    {
      portYIELD_FROM_ISR(pdTRUE);
    }
  }
  else
  {
    vTaskResume(thread_id);
  }
  return osOK;
#else
  return osErrorResource;
#endif
}

/***********************************************************************************************************************
* Function Name: r_sci1_callback_transmitend
* Description  : This function is a callback function when SCI1 finishes transmission.
* Arguments    : None
* Return Value : None
***********************************************************************************************************************/
void r_sci1_callback_transmitend(void)
{
    /* Start user code. Do not edit comment generated here */
    BaseType_t xHigherPriorityTaskWoken = pdFALSE;

    /* The sci1_txdone flag is used by the auto generated API only. */
    sci1_txdone = TRUE;

    if( xSendingTask != NULL )
    {
        /* A task is waiting for the end of the Tx, unblock it now.
        http://www.freertos.org/vTaskNotifyGiveFromISR.html */
        vTaskNotifyGiveFromISR( xSendingTask, &xHigherPriorityTaskWoken );
        xSendingTask = NULL;

        portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
    }
    /* End user code. Do not edit comment generated here */
}

/** Lock a mutex
 * @param mutex the mutex to lock */
void sys_mutex_lock( sys_mutex_t *pxMutex )
{
BaseType_t xGotSemaphore;
BaseType_t xHigherPriorityTaskWoken = pdFALSE;

	if( xInsideISR == 0 )
	{
		while( xSemaphoreTake( *pxMutex, portMAX_DELAY ) != pdPASS );
	}
	else
	{
		xGotSemaphore = xSemaphoreTakeFromISR( *pxMutex, &xHigherPriorityTaskWoken );
		configASSERT( xGotSemaphore );
		portYIELD_FROM_ISR( xHigherPriorityTaskWoken );

		/* Prevent compiler warnings if configASSERT() is not defined. */
		( void ) xGotSemaphore;
	}
}

/*
 * UART RX interrupt service routine.
 */
__interrupt void UART0_RxISR( void )
{
volatile signed char	cChar;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;

	/* Get the character from the UART and post it on the queue of Rxed 
	characters. */
	cChar = RDR0;

	xQueueSendFromISR( xRxedChars, ( const void *const ) &cChar, &xHigherPriorityTaskWoken );

	if( xHigherPriorityTaskWoken )
	{
		/*If the post causes a task to wake force a context switch 
		as the woken task may have a higher priority than the task we have 
		interrupted. */
		portYIELD_FROM_ISR();
	}
}

static __interrupt void prvUSCI_A1_ISR( void )
{
signed char cChar;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;

	while( ( UCA1IFG & UCRXIFG ) != 0 )
	{
		/* Get the character from the UART and post it on the queue of Rxed
		characters. */
		cChar = UCA1RXBUF;
		xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
	}
	
	/* If there is a Tx interrupt pending and the tx interrupts are enabled. */
	if( ( UCA1IFG & UCTXIFG ) != 0 )
	{
		/* The previous character has been transmitted.  See if there are any
		further characters waiting transmission. */
		if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
		{
			/* There was another character queued - transmit it now. */
			UCA1TXBUF = cChar;
		}
		else
		{
			/* There were no other characters to transmit - disable the Tx
			interrupt. */
			UCA1IE &= ~UCTXIE;
		}
	}

	__bic_SR_register_on_exit( SCG1 + SCG0 + OSCOFF + CPUOFF );
	
	/* If writing to a queue caused a task to unblock, and the unblocked task
	has a priority equal to or above the task that this interrupt interrupted,
	then lHigherPriorityTaskWoken will have been set to pdTRUE internally within
	xQueuesendFromISR(), and portEND_SWITCHING_ISR() will ensure that this
	interrupt returns directly to the higher priority unblocked task.
	
	THIS MUST BE THE LAST THING DONE IN THE ISR. */	
	portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
}

void emacps_send_handler(void *arg)
{
xemacpsif_s   *xemacpsif;
BaseType_t xHigherPriorityTaskWoken = pdFALSE;

	xemacpsif = (xemacpsif_s *)(arg);

	/* In this port for FreeRTOS+TCP, the EMAC interrupts will only set a bit in 
	"isr_events". The task in NetworkInterface will wake-up and do the necessary work.
	*/
	xemacpsif->isr_events |= EMACPS_TX_EVENT;
	xemacpsif->txBusy = pdFALSE;

	if( xEMACTaskHandle != NULL )
	{
		vTaskNotifyGiveFromISR( xEMACTaskHandle, &xHigherPriorityTaskWoken );
	}

	portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
}

/* Handles interrupts generated by pressing the USER button. */
void EXTI0_IRQHandler(void)
{
static const TickType_t xIncrement = 200UL / portTICK_PERIOD_MS;

	/* If xSendBlockTime is already portMAX_DELAY then the Tx task was blocked
	indefinitely, and this interrupt is bringing the MCU out of STOP low power
	mode. */
	if( xSendBlockTime == portMAX_DELAY )
	{
		portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;

		/* Unblock the Tx task. */
		xSemaphoreGiveFromISR( xTxSemaphore, &xHigherPriorityTaskWoken );

		/* Start over with the 'short' block time as described at the top of
		this file. */
		xSendBlockTime = xMinBlockTime;

		/* Request a yield if calling xSemaphoreGiveFromISR() caused a task to
		leave the Blocked state (which it will have done) and the task that left
		the Blocked state has a priority higher than the currently running task
		(which it will have). */
		portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
	}
	else
	{
		/* Increase the block time used by the Tx task, as described at the top
		of this file. */
		xSendBlockTime += xIncrement;

		/* If the block time has gone over the configured maximum then set it to
		an infinite block time to allow the MCU to go into its STOP low power
		mode. */
		if( xSendBlockTime > xMaxBlockTime )
		{
			xSendBlockTime = portMAX_DELAY;
		}
	}

	EXTI_ClearITPendingBit( EXTI_Line0 );
}

/*
 * When the WIZnet device asserts an interrupt we send an (empty) message to
 * the TCP task.  This wakes the task so the interrupt can be processed.  The
 * source of the interrupt has to be ascertained by the TCP task as this 
 * requires an I2C transaction which cannot be performed from this ISR.
 * Note this code predates the introduction of semaphores, a semaphore should
 * be used in place of the empty queue message.
 */
void vEINT0_ISR_Handler( void )
{
extern xQueueHandle xTCPISRQueue;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;

	/* Just wake the TCP task so it knows an ISR has occurred. */
	xQueueSendFromISR( xTCPISRQueue, ( void * ) &lDummyVariable, &xHigherPriorityTaskWoken );	

	/* We cannot carry on processing interrupts until the TCP task has 
	processed this one - so for now interrupts are disabled.  The TCP task will
	re-enable it. */
	VICIntEnClear |= tcpEINT0_VIC_CHANNEL_BIT;

	/* Clear the interrupt bit. */	
	VICVectAddr = tcpCLEAR_VIC_INTERRUPT;

	if( xHigherPriorityTaskWoken )
	{
		portYIELD_FROM_ISR();
	}
}

/// Set the specified Signal Flags of an active thread.
/// \param[in]     thread_id     thread ID obtained by \ref osThreadCreate or \ref osThreadGetId.
/// \param[in]     signals       specifies the signal flags of the thread that should be set.
/// \return previous signal flags of the specified thread or 0x80000000 in case of incorrect parameters.
/// \note MUST REMAIN UNCHANGED: \b osSignalSet shall be consistent in every CMSIS-RTOS.
int32_t osSignalSet (osThreadId thread_id, int32_t signals)
{
    EventGroupHandle_t event_handle;
    portBASE_TYPE taskWoken = pdFALSE;
    portBASE_TYPE xResult;
    EventBits_t uxBits_ret=0x80000000;
#ifdef CHECK_VALUE_OF_EVENT_GROUP    
    EventBits_t uxBits;
#endif    

    if (signals & (0xFFFFFFFF << osFeature_Signals)) {
        return 0x80000000;
    }

    event_handle = find_signal_by_thread(thread_id);
    if (event_handle) {
        if (inHandlerMode()) {
            uxBits_ret = xEventGroupGetBitsFromISR(event_handle);
            xResult = xEventGroupSetBitsFromISR(
                            event_handle,    /* The event group being updated. */
                            signals,         /* The bits being set. */
                            &taskWoken );
            if( xResult != pdFAIL )
            {
                portYIELD_FROM_ISR(taskWoken);
            }
        }
        else {
            uxBits_ret = xEventGroupGetBits(event_handle);
#ifdef CHECK_VALUE_OF_EVENT_GROUP                
            uxBits = 
#endif              
                      xEventGroupSetBits(
                           event_handle,    /* The event group being updated. */
                           signals );/* The bits being set. */
        }
    }

    return uxBits_ret;
}

void TC0_Handler( void )
{
static uint32_t ulISRCount = 0;

	/* Clear the interrupt. */
	if( tc_get_status( TC0, 0 ) != 0 )
	{
		/* As noted in the comments above, manually pend the TC1 interrupt from
		the TC0 interrupt handler.  This is not done on each occurrence of the
		TC0 interrupt though, to make sure interrupts don't nest in every single
		case. */
		ulISRCount++;
		if( ( ulISRCount & 0x07 ) != 0x07 )
		{
			/* Pend an interrupt that will nest with this interrupt. */
			NVIC_SetPendingIRQ( TC1_IRQn );
		}

		/* Call the IntQ test function for this channel. */
		portYIELD_FROM_ISR( xFirstTimerHandler() );
	}
}

static void ssp_irq_handler( LPC_SSP_T * ssp_id )
{
    BaseType_t xHigherPriorityTaskWoken = pdFALSE;
    Chip_SSP_DATA_SETUP_T * xf_setup;
    uint8_t ssp_cfg_index;

    if ((ssp_id == LPC_SSP0) && (active_SSP0 != 0xFF)) {
        ssp_cfg_index = active_SSP0;
    } else if (ssp_id == LPC_SSP1) {
        /* The only component in SPI1 is the Flash memory */
        ssp_cfg_index = FLASH_SPI;
    }

    xf_setup = &ssp_cfg[ssp_cfg_index].xf_setup;

    /* Disable SSP interrupts */
    Chip_SSP_Int_Disable(ssp_id);

    if (ssp_cfg[ssp_cfg_index].frame_size <= 8) {
        Chip_SSP_Int_RWFrames8Bits(ssp_id, xf_setup);
    }
    else {
        Chip_SSP_Int_RWFrames16Bits(ssp_id, xf_setup);
    }

    if ((xf_setup->rx_cnt != xf_setup->length) || (xf_setup->tx_cnt != xf_setup->length)) {
        /* Enable ssp interrupts, we're going to read/write more data */
        Chip_SSP_Int_Enable(ssp_id);
    }
    else {
        /* Transfer is completed, notify the caller task */
        vTaskNotifyGiveFromISR(ssp_cfg[ssp_cfg_index].caller_task, &xHigherPriorityTaskWoken);
	/* Deassert SSEL pin */
	ssp_ssel_control(ssp_cfg_index, DEASSERT);
    }

    portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
}

static void uartIsrHdl(void *arg)
{
    char c;
    char buf[50];
    char *item;
    int r;
    size_t len;
    BaseType_t xHigherPriorityTaskWoken;
    SET_PERI_REG_MASK(UART_INT_CLR_REG(0), UART_RXFIFO_FULL_INT_CLR);
    while (READ_PERI_REG(UART_STATUS_REG(0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) {
        c = READ_PERI_REG(UART_FIFO_REG(0));
        if (c == 'r') {
            ets_printf("ISR r");
            xRingbufferPrintInfo(rb);
            item = xRingbufferReceiveFromISR(rb, &len);
            if (item == NULL) {
                ets_printf("ISR recv fail!\n");
            } else if (len == 0) {
                ets_printf("ISR recv NULL!\n");
                vRingbufferReturnItemFromISR(rb, item, &xHigherPriorityTaskWoken);
            } else {
                ets_printf("ISR recv '%s' (%d bytes, %p)\n", buf, len, buf);
                vRingbufferReturnItemFromISR(rb, item, &xHigherPriorityTaskWoken);
            }
        } else {
            sprintf(buf, "UART: %c", c);
            ets_printf("ISR w");
            xRingbufferPrintInfo(rb);
            r = xRingbufferSendFromISR(rb, buf, strlen(buf) + 1, &xHigherPriorityTaskWoken);
            if (!r) {
                ets_printf("ISR send fail\n");
            }
        }
    }
    if (xHigherPriorityTaskWoken) {
        portYIELD_FROM_ISR();
    }
}