C++ platform_mcu_powersave_disable函数代码示例

void MicoMcuPowerSaveConfig( int enable )
{
  if (enable == 1)
    platform_mcu_powersave_enable( );
  else
    platform_mcu_powersave_disable( );
}

void platform_init_mcu_infrastructure( void )
{
    uint8_t i;

#ifdef INTERRUPT_VECTORS_IN_RAM
    SCB->VTOR = 0x20000000; /* Change the vector table to point to start of SRAM */
#endif /* ifdef INTERRUPT_VECTORS_IN_RAM */

    /* Initialise watchdog */
    platform_watchdog_init( );

    /* Initialise interrupt priorities */
    for ( i = 0; i < 81; i++ )
    {
        NVIC_SetPriority( (IRQn_Type) i, 0xf );
    }
    NVIC_PriorityGroupConfig( NVIC_PriorityGroup_4 );
    platform_init_rtos_irq_priorities();
    platform_init_peripheral_irq_priorities();

    /* Initialise GPIO IRQ manager */
    platform_gpio_irq_manager_init();

#ifndef WICED_DISABLE_MCU_POWERSAVE
    /* Initialise MCU powersave */
    platform_mcu_powersave_init( );
    platform_mcu_powersave_disable( );

    /* Initialise RTC */
    platform_rtc_init( );
#endif /* ifndef WICED_DISABLE_MCU_POWERSAVE */
}

wwd_result_t host_platform_bus_deinit( void )
{
    if ( sdio_bus_initted == WICED_TRUE )
    {
        uint8_t a = 0;

        platform_mcu_powersave_disable();

//        host_rtos_deinit_semaphore( &sdio_transfer_done_semaphore );
//        disable_sdio_block_transfer_done_irq();

        MCI_Disable( HSMCI );
        NVIC_DisableIRQ( HSMCI_IRQn );

#ifdef WICED_WIFI_USE_GPIO_FOR_BOOTSTRAP
        platform_gpio_deinit( &wifi_control_pins[WWD_PIN_BOOTSTRAP_0] );
        platform_gpio_deinit( &wifi_control_pins[WWD_PIN_BOOTSTRAP_1] );
#endif /* WICED_WIFI_USE_GPIO_FOR_BOOTSTRAP */

        /* Reset all SDIO pins to input pull-up to save power */
        for ( a = WWD_PIN_SDIO_CLK; a < WWD_PIN_SDIO_MAX; a++ )
        {
            platform_gpio_deinit( &wifi_sdio_pins[a] );
        }

        platform_mcu_powersave_enable();

        sdio_bus_initted = WICED_FALSE;
    }

    return WICED_SUCCESS;
}

void platform_init_mcu_infrastructure( void )
{
    uint8_t i;

#ifdef INTERRUPT_VECTORS_IN_RAM
    SCB->VTOR = 0x20000000; /* Change the vector table to point to start of SRAM */
#endif /* ifdef INTERRUPT_VECTORS_IN_RAM */

    /* Initialise watchdog */
    platform_watchdog_init( );

    /* Initialise interrupt priorities */
    for ( i = 0; i < 35; i++ )
    {
        NVIC_SetPriority( i, 0xf );
    }
    //NVIC_PriorityGroupConfig( NVIC_PriorityGroup_4 );

    /* set priority grouping inside cpu core */
    SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup_4;

    platform_init_rtos_irq_priorities();
    platform_init_peripheral_irq_priorities();

#ifndef WICED_DISABLE_MCU_POWERSAVE
    /* Initialise MCU powersave */
    platform_mcu_powersave_init( );
    platform_mcu_powersave_disable( );

    /* Initialise RTC */
//    platform_rtc_init( );
#endif /* ifndef WICED_DISABLE_MCU_POWERSAVE */
}

OSStatus platform_adc_init( const platform_adc_t* adc, uint32_t sample_cycle )
{
  OSStatus    err = kNoErr;
  struct adc_config adc_cfg;
  UNUSED_PARAMETER(sample_cycle);

  platform_mcu_powersave_disable();
  
  require_action_quiet( adc != NULL, exit, err = kParamErr);
  
  if( initialized != true )
  {
    adc_enable();
    
    adc_select_clock_source_mck(ADC);
    
    adc_get_config_defaults(&adc_cfg);
    
    adc_init(ADC, &adc_cfg);
    
    adc_set_trigger(ADC, ADC_TRIG_SW);
    
     adc_set_resolution(ADC, adc->resolution);
    
    initialized = true;
  }
  
exit:
  platform_mcu_powersave_enable();
  return err;
}

OSStatus platform_gpio_irq_enable( const platform_gpio_t* gpio, platform_gpio_irq_trigger_t trigger, platform_gpio_irq_callback_t handler, void* arg )
{
  uint8_t intPort;
  int i;
  OSStatus err = kNoErr;

  platform_mcu_powersave_disable();
  require_action_quiet( gpio != NULL && trigger != IRQ_TRIGGER_BOTH_EDGES, exit, err = kParamErr);
  
  switch( gpio->port ){
    case GPIOA:
      intPort = GPIO_A_INT;
      break;
    case GPIOB:
      intPort = GPIO_B_INT;
      break;
    case GPIOC:
      intPort = GPIO_C_INT;
      break;
    default:
      err = kParamErr;
      goto exit;
  }
    
  for( i = 0; i < NUMBER_OF_GPIO_IRQ_LINES; i++ ){
    if ( gpio_irq_data[i].port ==  gpio->port && gpio_irq_data[i].pin ==  gpio->pin){
      /* GPIO IRQ already exist */
      gpio_irq_data[ i ].handler    = handler;
      gpio_irq_data[ i ].arg        = arg;
      break;
    }
  }

  if(i == NUMBER_OF_GPIO_IRQ_LINES){
    /* GPIO IRQ not exist */
    for( i = 0; i < NUMBER_OF_GPIO_IRQ_LINES; i++ ){
      if ( gpio_irq_data[i].handler == NULL ){
        gpio_irq_data[ i ].port       = gpio->port;
        gpio_irq_data[ i ].pin        = gpio->pin;
        gpio_irq_data[ i ].handler    = handler;
        gpio_irq_data[ i ].arg        = arg;
        break;
      }
    } 
    /* No space to add one */
    if( i == NUMBER_OF_GPIO_IRQ_LINES)
      return kNoSpaceErr;
  }

  GpioIntClr(intPort, ((uint32_t)1 << gpio->pin));

  if( trigger == IRQ_TRIGGER_RISING_EDGE )
    GpioIntEn(intPort, ((uint32_t)1 << gpio->pin), GPIO_POS_EDGE_TRIGGER);
  else 
    GpioIntEn(intPort, ((uint32_t)1 << gpio->pin), GPIO_NEG_EDGE_TRIGGER);

exit:
  platform_mcu_powersave_enable();
  return err;
}

OSStatus platform_adc_take_sample( const platform_adc_t* adc, uint16_t* output )
{
  OSStatus    err = kNoErr;
 
  platform_mcu_powersave_disable();
  
  require_action_quiet( adc != NULL, exit, err = kParamErr);
  
  channel_num = adc->channel;
  
  adc_channel_enable(ADC, adc->channel);
    
  adc_set_callback(ADC, adc->interrupt, adc_end_conversion, 1);
  
  /* Start conversion */
  adc_start_software_conversion(ADC);
  adc_start_calibration(ADC);
  
  while (adc_get_interrupt_status(ADC) & (1 << adc->channel));
  
  *output = adc_channel_get_value(ADC, adc->channel);	
  mico_thread_msleep(1);
  adc_channel_disable(ADC, adc->channel);
  
exit:
  platform_mcu_powersave_enable();
  return err;  
}

OSStatus internalFlashErase(uint32_t start_address, uint32_t end_address)
{
  platform_log_trace();
  uint32_t i;
  OSStatus err = kNoErr;
  uint32_t page_start_address, page_end_address;
  uint32_t page_start_number, page_end_number;

  platform_mcu_powersave_disable();

  require_action( flash_unlock( start_address, end_address, &page_start_address, &page_end_address ) == FLASH_RC_OK, exit, err = kGeneralErr );

  page_start_number = page_start_address/512;
  page_end_number   = page_end_address/512;
  require_action( page_end_number >= page_start_number + 16, exit, err = kUnsupportedErr);

  for ( i = page_start_number; i <= page_end_number; i+=16 )
  {
    require_action( flash_erase_page( i * 512, IFLASH_ERASE_PAGES_16) == FLASH_RC_OK, exit, err = kGeneralErr );
  }

  require_action( flash_lock( start_address, end_address, NULL, NULL ) == FLASH_RC_OK, exit, err = kGeneralErr );

exit:
  platform_mcu_powersave_enable();
  return err;
}

OSStatus platform_gpio_irq_disable( const platform_gpio_t* gpio )
{
  uint16_t interrupt_line;
  OSStatus err = kNoErr;

  platform_mcu_powersave_disable();
  require_action_quiet( gpio != NULL, exit, err = kParamErr);

  interrupt_line = (uint16_t) ( 1 << gpio->pin_number );

  if ( ( EXTI->IMR & interrupt_line ) && gpio_irq_data[gpio->pin_number].owner_port == gpio->port )
  {
    bool             interrupt_line_used = 0;
    IRQn_Type        interrupt_vector    = (IRQn_Type)0;
    EXTI_InitTypeDef exti_init_structure;

    /* Disable EXTI interrupt line */
    exti_init_structure.EXTI_Line    = (uint32_t)interrupt_line;
    exti_init_structure.EXTI_LineCmd = DISABLE;
    exti_init_structure.EXTI_Mode    = EXTI_Mode_Interrupt;
    exti_init_structure.EXTI_Trigger = EXTI_Trigger_Rising;
    EXTI_Init( &exti_init_structure );
    exti_init_structure.EXTI_Trigger = EXTI_Trigger_Falling;
    EXTI_Init( &exti_init_structure );

    /* Disable NVIC interrupt */
    if ( ( interrupt_line & 0x001F ) != 0 )
    {
      /* Line 0 to 4 */
      interrupt_vector = (IRQn_Type) ( EXTI0_IRQn + gpio->pin_number );
      interrupt_line_used = false;
    }
    else if ( ( interrupt_line & 0x03E0 ) != 0 )
    {
      /* Line 5 to 9 */
      interrupt_vector = EXTI9_5_IRQn;
      interrupt_line_used = ( ( EXTI->IMR & 0x3e0U ) != 0 ) ? true : false;
    }
    else if ( ( interrupt_line & 0xFC00 ) != 0 )
    {
      /* Line 10 to 15 */
      interrupt_vector = EXTI15_10_IRQn;
      interrupt_line_used = ( ( EXTI->IMR & 0xfc00U ) != 0 ) ? true : false;
    }

    /* Some IRQ lines share a vector. Disable vector only if not used */
    if ( interrupt_line_used == false )
    {
      NVIC_DisableIRQ( interrupt_vector );
    }

    gpio_irq_data[gpio->pin_number].owner_port = 0;
    gpio_irq_data[gpio->pin_number].handler    = 0;
    gpio_irq_data[gpio->pin_number].arg        = 0;
  }

exit:
  platform_mcu_powersave_enable();
  return err;
}

OSStatus host_platform_bus_deinit( void )
{
  platform_mcu_powersave_disable( );
  
  NVIC_DisableIRQ( platform_flexcom_irq_numbers[wifi_spi.spi_id] );
  pdc_disable_transfer( spi_get_pdc_base( wifi_spi.port ), PERIPH_PTCR_RXTDIS | PERIPH_PTCR_TXTDIS );
  spi_disable(wifi_spi.port);
  
  /* Deinit the SPI lines */
  platform_gpio_peripheral_pin_init(  wifi_spi.mosi_pin,  INPUT_HIGH_IMPEDANCE );
  platform_gpio_peripheral_pin_init(  wifi_spi.miso_pin,  INPUT_HIGH_IMPEDANCE );
  platform_gpio_peripheral_pin_init(  wifi_spi.clock_pin, INPUT_HIGH_IMPEDANCE );
  
  /* Deinit the interrupt input for WLAN_IRQ */
  platform_gpio_init( &wifi_spi_pins[WIFI_PIN_SPI_IRQ], INPUT_HIGH_IMPEDANCE );
  platform_gpio_irq_disable( &wifi_spi_pins[WIFI_PIN_SPI_IRQ] );
  
  /* Deinit SPI slave select GPIOs */
  platform_gpio_init( &wifi_spi_pins[WIFI_PIN_SPI_CS], INPUT_HIGH_IMPEDANCE );
  
#if defined ( MICO_WIFI_USE_GPIO_FOR_BOOTSTRAP )
  platform_gpio_init( &wifi_control_pins[WIFI_PIN_BOOTSTRAP_0], INPUT_HIGH_IMPEDANCE );
  platform_gpio_init( &wifi_control_pins[WIFI_PIN_BOOTSTRAP_1], INPUT_HIGH_IMPEDANCE );
#endif
  
  platform_mcu_powersave_enable( );
  
  return kNoErr;
}

OSStatus host_platform_spi_transfer( bus_transfer_direction_t dir, uint8_t* buffer, uint16_t buffer_length )
{
  OSStatus result;
  
  pdc_packet_t pdc_spi_packet = { (uint32_t)buffer, buffer_length };
  Pdc* spi_pdc  = spi_get_pdc_base( wifi_spi.port );
  
  platform_mcu_powersave_disable();
  
  platform_gpio_output_low( &wifi_spi_pins[WIFI_PIN_SPI_CS] );
  
  pdc_tx_init( spi_pdc, &pdc_spi_packet, NULL);
  
  if ( dir == BUS_READ ) {
    pdc_rx_init( spi_pdc, &pdc_spi_packet, NULL);
    
    spi_enable_interrupt(wifi_spi.port, SPI_IER_RXBUFF );
    pdc_enable_transfer( spi_pdc, PERIPH_PTCR_TXTEN | PERIPH_PTCR_RXTEN );
  } 
  
  if ( dir == BUS_WRITE ) {
    spi_enable_interrupt( wifi_spi.port, SPI_IER_ENDTX );
    pdc_enable_transfer( spi_pdc, PERIPH_PTCR_TXTEN );
  }
  
  result = mico_rtos_get_semaphore( &spi_transfer_finished_semaphore, 100 );
  
  platform_gpio_output_high( &wifi_spi_pins[WIFI_PIN_SPI_CS] );
  
  platform_mcu_powersave_enable();
  
  return result;
  
}

void RX_PIN_WAKEUP_handler(void *arg)
{
    (void)arg;
    platform_uart_driver_t* driver = arg;
    uint32_t uart_number;

    platform_gpio_enable_clock( driver->peripheral->pin_rx );

    uart_number = platform_uart_get_port_number( driver->peripheral->port );

    uart_peripheral_clock_functions[ uart_number ]( uart_peripheral_clocks[ uart_number ], ENABLE );

    /* Enable DMA peripheral clock */
    if ( driver->peripheral->tx_dma_config.controller == DMA1 )
    {
        RCC->AHB1ENR |= RCC_AHB1Periph_DMA1;
    }
    else
    {
        RCC->AHB1ENR |= RCC_AHB1Periph_DMA2;
    }

    platform_gpio_irq_disable( driver->peripheral->pin_rx );
    platform_mcu_powersave_disable( );
    mico_rtos_set_semaphore( &driver->sem_wakeup );

}

OSStatus platform_gpio_irq_disable( const platform_gpio_t* gpio )
{
  OSStatus            err           = kNoErr;
  ioport_port_mask_t  mask          = ioport_pin_to_mask   ( gpio->pin );
  ioport_port_t       port          = ioport_pin_to_port_id( gpio->pin );
  volatile Pio*       port_register = arch_ioport_port_to_base( port );
  
  platform_mcu_powersave_disable();
  require_action_quiet( gpio != NULL, exit, err = kParamErr);

  /* Disable interrupt on pin */
  port_register->PIO_IDR = mask;

  /* Disable Cortex-M interrupt vector as well if no pin interrupt is enabled */
  if ( port_register->PIO_IMR == 0 )
  {
    NVIC_DisableIRQ( irq_vectors[port] );
  }

  gpio_irq_data[port][mask].wakeup_pin = false;
  gpio_irq_data[port][mask].arg        = 0;
  gpio_irq_data[port][mask].callback   = NULL;
  
exit:
  platform_mcu_powersave_enable();
  return err;
}

OSStatus platform_uart_deinit( platform_uart_driver_t* driver )
{
  uint8_t          uart_number;
  OSStatus          err = kNoErr;

  platform_mcu_powersave_disable();

  require_action_quiet( ( driver != NULL ), exit, err = kParamErr);

  uart_number = platform_uart_get_port_number( driver->peripheral->port );

  /* Disable USART */
  USART_Cmd( driver->peripheral->port, DISABLE );

  /* Deinitialise USART */
  USART_DeInit( driver->peripheral->port );

  /**************************************************************************
   * De-initialise STM32 DMA and interrupt
   **************************************************************************/

  /* Deinitialise DMA streams */
  DMA_DeInit( driver->peripheral->tx_dma_config.stream );
  DMA_DeInit( driver->peripheral->rx_dma_config.stream );

  /* Disable TC (transfer complete) interrupt at the source */
  DMA_ITConfig( driver->peripheral->tx_dma_config.stream, DMA_INTERRUPT_FLAGS, DISABLE );
  DMA_ITConfig( driver->peripheral->rx_dma_config.stream, DMA_INTERRUPT_FLAGS, DISABLE );

  /* Disable transmit DMA interrupt at Cortex-M3 */
  NVIC_DisableIRQ( driver->peripheral->tx_dma_config.irq_vector );

  /**************************************************************************
   * De-initialise STM32 USART interrupt
   **************************************************************************/

  USART_ITConfig( driver->peripheral->port, USART_IT_RXNE, DISABLE );

  /* Disable UART interrupt vector on Cortex-M3 */
  NVIC_DisableIRQ( driver->peripheral->rx_dma_config.irq_vector );

  /* Disable registers clocks */
  uart_peripheral_clock_functions[uart_number]( uart_peripheral_clocks[uart_number], DISABLE );

  mico_rtos_deinit_semaphore( &driver->rx_complete );
  mico_rtos_deinit_semaphore( &driver->tx_complete );
  mico_rtos_deinit_mutex( &driver->tx_mutex );
  driver->rx_size              = 0;
  driver->tx_size              = 0;
  driver->last_transmit_result = kNoErr;
  driver->last_receive_result  = kNoErr;
  driver->initialized          = false;

exit:
    platform_mcu_powersave_enable();
    return err;
}

OSStatus platform_adc_init( const platform_adc_t* adc, uint32_t sample_cycle )
{
    GPIO_InitTypeDef      gpio_init_structure;
    ADC_InitTypeDef       adc_init_structure;
    ADC_CommonInitTypeDef adc_common_init_structure;
    uint8_t     a;
    OSStatus    err = kNoErr;

    platform_mcu_powersave_disable();

    require_action_quiet( adc != NULL, exit, err = kParamErr);
    
    /* Enable peripheral clock for this port */
    err = platform_gpio_enable_clock( adc->pin );
    require_noerr(err, exit);

    /* Initialize the associated GPIO */
    gpio_init_structure.GPIO_Pin   = (uint32_t)( 1 << adc->pin->pin_number );;
    gpio_init_structure.GPIO_Speed = (GPIOSpeed_TypeDef) 0;
    gpio_init_structure.GPIO_Mode  = GPIO_Mode_AN;
    gpio_init_structure.GPIO_PuPd  = GPIO_PuPd_NOPULL;
    gpio_init_structure.GPIO_OType = GPIO_OType_OD;
    GPIO_Init( adc->pin->port, &gpio_init_structure );

    RCC_APB2PeriphClockCmd( adc->adc_peripheral_clock, ENABLE );

    /* Initialize the ADC */
    ADC_StructInit( &adc_init_structure );
    adc_init_structure.ADC_Resolution         = ADC_Resolution_12b;
    adc_init_structure.ADC_ScanConvMode       = DISABLE;
    adc_init_structure.ADC_ContinuousConvMode = DISABLE;
    adc_init_structure.ADC_ExternalTrigConv   = ADC_ExternalTrigConvEdge_None;
    adc_init_structure.ADC_DataAlign          = ADC_DataAlign_Right;
    adc_init_structure.ADC_NbrOfConversion    = 1;
    ADC_Init( adc->port, &adc_init_structure );

    ADC_CommonStructInit( &adc_common_init_structure );
    adc_common_init_structure.ADC_Mode             = ADC_Mode_Independent;
    adc_common_init_structure.ADC_DMAAccessMode    = ADC_DMAAccessMode_Disabled;
    adc_common_init_structure.ADC_Prescaler        = ADC_Prescaler_Div2;
    adc_common_init_structure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles;
    ADC_CommonInit( &adc_common_init_structure );

    ADC_Cmd( adc->port, ENABLE );

    /* Find the closest supported sampling time by the MCU */
    for ( a = 0; ( a < sizeof( adc_sampling_cycle ) / sizeof(uint16_t) ) && adc_sampling_cycle[a] < sample_cycle; a++ )
    {
    }

    /* Initialize the ADC channel */
    ADC_RegularChannelConfig( adc->port, adc->channel, adc->rank, a );

exit:
    platform_mcu_powersave_enable();
    return err;
}