C++ platform_get_irq_byname函数代码示例

//.........这里部分代码省略.........
	/* Enable periodic IO calibration in HSIC_CFG register */
	mxhci_hsic_ulpi_write(mxhci, 0xA8, MSM_HSIC_CFG);

	/* Configure Strobe and Data GPIOs to enable HSIC */
	ret = mxhci_hsic_config_gpios(mxhci);
	if (ret) {
		dev_err(mxhci->dev, " gpio configuarion failed\n");
		goto deinit_vddcx;
	}

	/* enable STROBE_PAD_CTL */
	reg = readl_relaxed(TLMM_GPIO_HSIC_STROBE_PAD_CTL);
	writel_relaxed(reg | 0x2000000, TLMM_GPIO_HSIC_STROBE_PAD_CTL);

	/* enable DATA_PAD_CTL */
	reg = readl_relaxed(TLMM_GPIO_HSIC_DATA_PAD_CTL);
	writel_relaxed(reg | 0x2000000, TLMM_GPIO_HSIC_DATA_PAD_CTL);

	mb();

	/* Enable LPM in Sleep mode and suspend mode */
	reg = readl_relaxed(MSM_HSIC_CTRL_REG);
	reg |= CTRLREG_PLL_CTRL_SLEEP | CTRLREG_PLL_CTRL_SUSP;
	writel_relaxed(reg, MSM_HSIC_CTRL_REG);

	if (of_property_read_bool(node, "qti,disable-hw-clk-gating")) {
		reg = readl_relaxed(MSM_HSIC_GCTL);
		writel_relaxed((reg | GCTL_DSBLCLKGTNG), MSM_HSIC_GCTL);
	}

	/* enable pwr event irq for LPM_IN_L2_IRQ */
	writel_relaxed(LPM_IN_L2_IRQ_MASK, MSM_HSIC_PWR_EVNT_IRQ_MASK);

	mxhci->wakeup_irq = platform_get_irq_byname(pdev, "wakeup_irq");
	if (mxhci->wakeup_irq < 0) {
		mxhci->wakeup_irq = 0;
		dev_err(&pdev->dev, "failed to init wakeup_irq\n");
	} else {
		/* enable wakeup irq only when entering lpm */
		irq_set_status_flags(mxhci->wakeup_irq, IRQ_NOAUTOEN);
		ret = devm_request_irq(&pdev->dev, mxhci->wakeup_irq,
			mxhci_hsic_wakeup_irq, 0, "mxhci_hsic_wakeup", mxhci);
		if (ret) {
			dev_err(&pdev->dev,
					"request irq failed (wakeup irq)\n");
			goto deinit_vddcx;
		}
	}

	ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
	if (ret)
		goto deinit_vddcx;

	hcd = dev_get_drvdata(&pdev->dev);
	xhci = hcd_to_xhci(hcd);

	/* USB 3.0 roothub */

	/* no need for another instance of mxhci */
	driver->hcd_priv_size = sizeof(struct xhci_hcd *);

	xhci->shared_hcd = usb_create_shared_hcd(driver, &pdev->dev,
			dev_name(&pdev->dev), hcd);
	if (!xhci->shared_hcd) {
		ret = -ENOMEM;
		goto remove_usb2_hcd;

static int cs75xx_gpio_probe(struct platform_device *pdev)
{
	int i, j;
	char tmp_str[16];
	struct resource *res_mem;

	gpio_dbgmsg("Function: %s, pdev->name = %s\n", __func__, pdev->name);

	memset(cs75xx_gpio_base, 0, sizeof(cs75xx_gpio_base));

	/* get the module base address and irq number */
	sprintf(tmp_str, "global");
	res_mem = platform_get_resource_byname(pdev, IORESOURCE_IO, tmp_str);
	if (!res_mem) {
		gpio_dbgmsg("Func: %s - can't get resource %s\n", __func__, tmp_str);
		goto fail;
	}
	cs75xx_global_base = ioremap(res_mem->start, res_mem->end - res_mem->start + 1);
	if (!cs75xx_global_base) {
		gpio_dbgmsg("Func: %s - unable to remap %s %d memory \n",
		            __func__, tmp_str, res_mem->end - res_mem->start + 1);
		goto fail;
	}
	gpio_dbgmsg("\tcs75xx_global_base = %p\n", cs75xx_global_base);

	for (i = 0; i < GPIO_BANK_NUM; i++) {
		sprintf(tmp_str, "gpio%d", i);
		res_mem = platform_get_resource_byname(pdev, IORESOURCE_IO, tmp_str);
		if (!res_mem) {
			gpio_dbgmsg("Func: %s - can't get resource %s\n", __func__, tmp_str);
			goto fail;
		}
		cs75xx_gpio_base[i] = ioremap(res_mem->start, res_mem->end - res_mem->start + 1);
		if (!cs75xx_gpio_base[i]) {
			gpio_dbgmsg("Func: %s - unable to remap %s %d memory \n",
			            __func__, tmp_str, res_mem->end - res_mem->start + 1);
			goto fail;
		}
		gpio_dbgmsg("\tcs75xx_gpio_base[%d] = %p\n", i, cs75xx_gpio_base[i]);
	}

	for (i = 0; i < GPIO_BANK_NUM; i++) {
		sprintf(tmp_str, "irq_gpio%d", i);
		cs75xx_irq_gpio[i] = platform_get_irq_byname(pdev, tmp_str);
		if (cs75xx_irq_gpio[i] == -ENXIO) {
			gpio_dbgmsg("Func: %s - can't get resource %s\n", __func__, tmp_str);
			goto fail;
		}
		gpio_dbgmsg("\tcs75xx_irq_gpio[%d] = %08x\n", i, cs75xx_irq_gpio[i]);
	}

	/* disable irq and register to gpiolib */
	for (i = 0; i < GPIO_BANK_NUM; i++) {
		/* disable, unmask and clear all interrupts */
		__raw_writel(0x0, cs75xx_gpio_base[i] + CS75XX_GPIO_IE);

		for (j = GPIO_IRQ_BASE + i * GPIO_BANK_SIZE;
		     j < GPIO_IRQ_BASE + (i + 1) * GPIO_BANK_SIZE; j++) {
			irq_set_chip(j, &cs75xx_gpio_irq_chip);
			irq_set_handler(j, handle_edge_irq);
			set_irq_flags(j, IRQF_VALID);
		}

		irq_set_chained_handler(cs75xx_irq_gpio[i], cs75xx_gpio_irq_handler);
		irq_set_handler_data(cs75xx_irq_gpio[i], (void *)i);
	}

	BUG_ON(gpiochip_add(&cs75xx_gpio_chip));

	return 0;

fail:
	for (i = 0; i < GPIO_BANK_NUM; i++)
		if (cs75xx_gpio_base[i])
			iounmap(cs75xx_gpio_base[i]);

	return -ENODEV;
}

static int da9055_onkey_probe(struct platform_device *pdev)
{
	struct da9055 *da9055 = dev_get_drvdata(pdev->dev.parent);
	struct da9055_onkey *onkey;
	struct input_dev *input_dev;
	int irq, err;

	irq = platform_get_irq_byname(pdev, "ONKEY");
	if (irq < 0) {
		dev_err(&pdev->dev,
			"Failed to get an IRQ for input device, %d\n", irq);
		return -EINVAL;
	}

	onkey = devm_kzalloc(&pdev->dev, sizeof(*onkey), GFP_KERNEL);
	if (!onkey) {
		dev_err(&pdev->dev, "Failed to allocate memory\n");
		return -ENOMEM;
	}

	input_dev = input_allocate_device();
	if (!input_dev) {
		dev_err(&pdev->dev, "Failed to allocate memory\n");
		return -ENOMEM;
	}

	onkey->input = input_dev;
	onkey->da9055 = da9055;
	input_dev->name = "da9055-onkey";
	input_dev->phys = "da9055-onkey/input0";
	input_dev->dev.parent = &pdev->dev;

	input_dev->evbit[0] = BIT_MASK(EV_KEY);
	__set_bit(KEY_POWER, input_dev->keybit);

	INIT_DELAYED_WORK(&onkey->work, da9055_onkey_work);

	irq = regmap_irq_get_virq(da9055->irq_data, irq);
	err = request_threaded_irq(irq, NULL, da9055_onkey_irq,
				   IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
				   "ONKEY", onkey);
	if (err < 0) {
		dev_err(&pdev->dev,
			"Failed to register ONKEY IRQ %d, error = %d\n",
			irq, err);
		goto err_free_input;
	}

	err = input_register_device(input_dev);
	if (err) {
		dev_err(&pdev->dev, "Unable to register input device, %d\n",
			err);
		goto err_free_irq;
	}

	platform_set_drvdata(pdev, onkey);

	return 0;

err_free_irq:
	free_irq(irq, onkey);
	cancel_delayed_work_sync(&onkey->work);
err_free_input:
	input_free_device(input_dev);

	return err;
}

static int hisi_pmic_otmp_mntn_initial(struct platform_device *pdev, PMIC_MNTN_DESC *pmic_mntn)
{

    struct device_node *root = NULL;
    struct device *dev = &pdev->dev;
    struct device_node *np = dev->of_node;
    unsigned char reg_value = 0;
    s32 ret = 0;

    root = of_find_compatible_node(np, NULL, "hisilicon,pmic-mntn-otmp");
    if (!root) {
        dev_err(dev, "[%s]no hisilicon,pmic-mntn-otmp root node\n", __func__);
        return -ENODEV;
    }

    ret |= of_property_read_u32_array(root, "hisilicon,otmp-threshold-val", (u32 *)&pmic_mntn->otmp_thshd_val, 0x1);
    ret |= of_property_read_u32_array(root, "hisilicon,otmp-threshold-reg", (u32 *)&pmic_mntn->otmp_thshd_reg, 0x3);
    if (ret) {
        dev_err(dev, "[%s]get pmic otmp attribute failed.\n", __func__);
        return -ENODEV;
    }

    ret |= of_property_read_u32_array(root, "hisilicon,otmp-hreset-pwrdown-flag", (u32 *)&pmic_mntn->otmp_hreset_pwrdown_flag, 0x1);
    ret |= of_property_read_u32_array(root, "hisilicon,otmp-hreset-pwrdown-val", (u32 *)&pmic_mntn->otmp_hreset_pwrdown_val, 0x1);
    ret |= of_property_read_u32_array(root, "hisilicon,otmp-hreset-pwrdown-reg", (u32 *)&pmic_mntn->otmp_hreset_pwrdown_reg, 0x3);
    if (ret) {
        dev_err(dev, "[%s]get pmic otmp attribute failed.\n", __func__);
        return -ENODEV;
    }

	root = of_find_compatible_node(NULL, NULL, "hisilicon,sysctrl");
	if (!root) {
		dev_err("%s: hisilicon,sysctrl No compatible node found\n", __func__);
		return -ENODEV;
	}

	g_sysctrl_base = of_iomap(root, 0);
	if (!g_sysctrl_base) {
		dev_err("%s: hisilicon,sysctrl_base is NULL\n", __func__);
		return -ENODEV;
	}
    /*Set the otmp threshold*/
    reg_value = hisi_pmic_reg_read(pmic_mntn->otmp_thshd_reg.addr);
    SET_REG_BIT(reg_value, pmic_mntn->otmp_thshd_reg.shift, pmic_mntn->otmp_thshd_reg.mask, pmic_mntn->otmp_thshd_val);
    hisi_pmic_reg_write(pmic_mntn->otmp_thshd_reg.addr, reg_value);

    pmic_mntn->otmp_irq = platform_get_irq_byname(pdev, "otmp");
    if (pmic_mntn->ocp_irq  < 0) {
        dev_err(dev, "[%s]platform_get_irq_byname otmp_irq failed.\n", __func__);
        return -ENODEV;
    }

    pmic_mntn->otmp_wq = create_singlethread_workqueue("pmic-otmp-wq");
    INIT_WORK(&pmic_mntn->otmp_wk, (void *)hisi_pmic_otmp_wk_handler);

    ret = devm_request_irq(dev, pmic_mntn->otmp_irq, hisi_pmic_otmp_irq_handler, IRQF_DISABLED|IRQF_NO_SUSPEND,
        "pmic-otmp-irq", (void *)pmic_mntn);
    if (ret) {
        dev_err(dev, "[%s] request_irq otmp_irq err\n", __func__);
        return -ENODEV;
    }

    return 0;

}

int sprd6500_init_modemctl_device(struct modem_ctl *mc, struct modem_data *pdata)
{
	int ret = 0;
	struct platform_device *pdev;

	mc->gpio_cp_on = pdata->gpio_cp_on;
	mc->gpio_reset_req_n = pdata->gpio_reset_req_n;
	mc->gpio_cp_reset = pdata->gpio_cp_reset;
	mc->gpio_pda_active = pdata->gpio_pda_active;
	mc->gpio_phone_active = pdata->gpio_phone_active;
	mc->gpio_cp_dump_int = pdata->gpio_cp_dump_int;
	mc->gpio_flm_uart_sel = pdata->gpio_flm_uart_sel;
	mc->gpio_cp_warm_reset = pdata->gpio_cp_warm_reset;
	mc->gpio_sim_detect = pdata->gpio_sim_detect;

#if defined(CONFIG_LINK_DEVICE_PLD)
	mc->gpio_fpga1_cs_n = pdata->gpio_fpga1_cs_n;
#endif
	gpio_set_value(mc->gpio_cp_reset, 0);
	gpio_set_value(mc->gpio_cp_on, 0);

	pdev = to_platform_device(mc->dev);
	mc->irq_phone_active = platform_get_irq_byname(pdev, "cp_active_irq");
	pr_info("[MODEM_IF:ESC] <%s> PHONE_ACTIVE IRQ# = %d\n",
		__func__, mc->irq_phone_active);

	sprd6500_get_ops(mc);

	if (mc->irq_phone_active) {
		ret = request_irq(mc->irq_phone_active,
				  phone_active_irq_handler,
				  IRQF_TRIGGER_HIGH,
				  "esc_active",
				  mc);
		if (ret) {
			pr_err("[MODEM_IF:ESC] <%s> failed to request_irq IRQ# %d (err=%d)\n",
				__func__, mc->irq_phone_active, ret);
			return ret;
		}

		ret = enable_irq_wake(mc->irq_phone_active);
		if (ret) {
			pr_err("[MODEM_IF:ESC] %s: failed to enable_irq_wake IRQ# %d (err=%d)\n",
				__func__, mc->irq_phone_active, ret);
			free_irq(mc->irq_phone_active, mc);
			return ret;
		}
	}

#if defined(CONFIG_SIM_DETECT)
	mc->irq_sim_detect = platform_get_irq_byname(pdev, "sim_irq");
	pr_info("[MODEM_IF:ESC] <%s> SIM_DECTCT IRQ# = %d\n",
		__func__, mc->irq_sim_detect);

	if (mc->irq_sim_detect) {
		ret = request_irq(mc->irq_sim_detect, sim_detect_irq_handler,
			IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
			"esc_sim_detect", mc);
		if (ret) {
			mif_err("failed to request_irq: %d\n", ret);
				mc->sim_state.online = false;
				mc->sim_state.changed = false;
			return ret;
		}

		ret = enable_irq_wake(mc->irq_sim_detect);
		if (ret) {
			mif_err("failed to enable_irq_wake: %d\n", ret);
			free_irq(mc->irq_sim_detect, mc);
			mc->sim_state.online = false;
			mc->sim_state.changed = false;
			return ret;
		}

		/* initialize sim_state => insert: gpio=0, remove: gpio=1 */
		mc->sim_state.online = !gpio_get_value(mc->gpio_sim_detect);
	}
#endif

	return ret;
}

/*
 * McBSP1 and McBSP3 are directly mapped on 1610 and 1510.
 * 730 has only 2 McBSP, and both of them are MPU peripherals.
 */
static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
{
	struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data;
	struct omap_mcbsp *mcbsp;
	int id = pdev->id - 1;
	struct resource *res;
	int ret = 0;

	if (!pdata) {
		dev_err(&pdev->dev, "McBSP device initialized without"
				"platform data\n");
		ret = -EINVAL;
		goto exit;
	}

	dev_dbg(&pdev->dev, "Initializing OMAP McBSP (%d).\n", pdev->id);

	if (id >= omap_mcbsp_count) {
		dev_err(&pdev->dev, "Invalid McBSP device id (%d)\n", id);
		ret = -EINVAL;
		goto exit;
	}

	mcbsp = kzalloc(sizeof(struct omap_mcbsp), GFP_KERNEL);
	if (!mcbsp) {
		ret = -ENOMEM;
		goto exit;
	}

	spin_lock_init(&mcbsp->lock);
	mcbsp->id = id + 1;
	mcbsp->free = true;

	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu");
	if (!res) {
		res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
		if (!res) {
			dev_err(&pdev->dev, "%s:mcbsp%d has invalid memory"
					"resource\n", __func__, pdev->id);
			ret = -ENOMEM;
			goto exit;
		}
	}
	mcbsp->phys_base = res->start;
	omap_mcbsp_cache_size = resource_size(res);
	mcbsp->io_base = ioremap(res->start, resource_size(res));
	if (!mcbsp->io_base) {
		ret = -ENOMEM;
		goto err_ioremap;
	}

	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma");
	if (!res)
		mcbsp->phys_dma_base = mcbsp->phys_base;
	else
		mcbsp->phys_dma_base = res->start;

	mcbsp->tx_irq = platform_get_irq_byname(pdev, "tx");
	mcbsp->rx_irq = platform_get_irq_byname(pdev, "rx");

	/* From OMAP4 there will be a single irq line */
	if (mcbsp->tx_irq == -ENXIO)
		mcbsp->tx_irq = platform_get_irq(pdev, 0);

	res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx");
	if (!res) {
		dev_err(&pdev->dev, "%s:mcbsp%d has invalid rx DMA channel\n",
					__func__, pdev->id);
		ret = -ENODEV;
		goto err_res;
	}
	mcbsp->dma_rx_sync = res->start;

	res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx");
	if (!res) {
		dev_err(&pdev->dev, "%s:mcbsp%d has invalid tx DMA channel\n",
					__func__, pdev->id);
		ret = -ENODEV;
		goto err_res;
	}
	mcbsp->dma_tx_sync = res->start;

	mcbsp->fclk = clk_get(&pdev->dev, "fck");
	if (IS_ERR(mcbsp->fclk)) {
		ret = PTR_ERR(mcbsp->fclk);
		dev_err(&pdev->dev, "unable to get fck: %d\n", ret);
		goto err_res;
	}

	mcbsp->pdata = pdata;
	mcbsp->dev = &pdev->dev;
	mcbsp_ptr[id] = mcbsp;
	mcbsp->mcbsp_config_type = pdata->mcbsp_config_type;
	platform_set_drvdata(pdev, mcbsp);
	pm_runtime_enable(mcbsp->dev);

//.........这里部分代码省略.........

//.........这里部分代码省略.........
		if (ret)
			goto fail;
	}

	if (!of_property_read_u32(pdev->dev.of_node,
				"qcom,cb-base-offset",
				&temp))
		drvdata->cb_base = drvdata->base + temp;
	else
		drvdata->cb_base = drvdata->base + 0x8000;

	if (clk_get_rate(drvdata->clk) == 0) {
		ret = clk_round_rate(drvdata->clk, 1000);
		clk_set_rate(drvdata->clk, ret);
	}

	if (drvdata->aclk && clk_get_rate(drvdata->aclk) == 0) {
		ret = clk_round_rate(drvdata->aclk, 1000);
		clk_set_rate(drvdata->aclk, ret);
	}

	if (drvdata->aiclk && clk_get_rate(drvdata->aiclk) == 0) {
		ret = clk_round_rate(drvdata->aiclk, 1000);
		clk_set_rate(drvdata->aiclk, ret);
	}

	ret = msm_iommu_parse_dt(pdev, drvdata);
	if (ret)
		return ret;

	dev_info(&pdev->dev,
		"device %s (model: %d) mapped at %p, with %d ctx banks\n",
		drvdata->name, drvdata->model, drvdata->base, drvdata->ncb);

	platform_set_drvdata(pdev, drvdata);

	pmon_info = msm_iommu_pm_alloc(&pdev->dev);
	if (pmon_info != NULL) {
		ret = msm_iommu_pmon_parse_dt(pdev, pmon_info);
		if (ret) {
			msm_iommu_pm_free(&pdev->dev);
			pr_info("%s: pmon not available.\n", drvdata->name);
		} else {
			pmon_info->iommu.base = drvdata->base;
			pmon_info->iommu.ops = msm_get_iommu_access_ops();
			pmon_info->iommu.hw_ops = iommu_pm_get_hw_ops_v1();
			pmon_info->iommu.iommu_name = drvdata->name;
			ret = msm_iommu_pm_iommu_register(pmon_info);
			if (ret) {
				pr_err("%s iommu register fail\n",
								drvdata->name);
				msm_iommu_pm_free(&pdev->dev);
			} else {
				pr_debug("%s iommu registered for pmon\n",
						pmon_info->iommu.iommu_name);
			}
		}
	}

	global_cfg_irq =
		platform_get_irq_byname(pdev, "global_cfg_NS_irq");
	if (global_cfg_irq > 0) {
		ret = devm_request_threaded_irq(&pdev->dev, global_cfg_irq,
				NULL,
				msm_iommu_global_fault_handler,
				IRQF_ONESHOT | IRQF_SHARED |
				IRQF_TRIGGER_RISING,
				"msm_iommu_global_cfg_irq", pdev);
		if (ret < 0)
			pr_err("Request Global CFG IRQ %d failed with ret=%d\n",
					global_cfg_irq, ret);
	}

	global_client_irq =
		platform_get_irq_byname(pdev, "global_client_NS_irq");
	if (global_client_irq > 0) {
		ret = devm_request_threaded_irq(&pdev->dev, global_client_irq,
				NULL,
				msm_iommu_global_fault_handler,
				IRQF_ONESHOT | IRQF_SHARED |
				IRQF_TRIGGER_RISING,
				"msm_iommu_global_client_irq", pdev);
		if (ret < 0)
			pr_err("Request Global Client IRQ %d failed with ret=%d\n",
					global_client_irq, ret);
	}

	ret = of_platform_populate(pdev->dev.of_node, msm_iommu_ctx_match_table,
				   NULL, &pdev->dev);
fail:
	if (ret) {
		clk_unprepare(drvdata->clk);
		clk_unprepare(drvdata->pclk);
		clk_unprepare(drvdata->aclk);
		clk_unprepare(drvdata->aiclk);
		pr_err("Failed to create iommu context device\n");
	}

	return ret;
}

//.........这里部分代码省略.........
 * @dwc: Pointer to out controller context structure
 *
 * Returns 0 on success otherwise negative errno.
 */
int dwc3_otg_init(struct dwc3 *dwc)
{
	u32	reg;
	int ret = 0;
	struct dwc3_otg *dotg;

	dev_dbg(dwc->dev, "dwc3_otg_init\n");

	/*
	 * GHWPARAMS6[10] bit is SRPSupport.
	 * This bit also reflects DWC_USB3_EN_OTG
	 */
	reg = dwc3_readl(dwc->regs, DWC3_GHWPARAMS6);
	if (!(reg & DWC3_GHWPARAMS6_SRP_SUPPORT)) {
		/*
		 * No OTG support in the HW core.
		 * We return 0 to indicate no error, since this is acceptable
		 * situation, just continue probe the dwc3 driver without otg.
		 */
		dev_dbg(dwc->dev, "dwc3_otg address space is not supported\n");
		return 0;
	}

	/* Allocate and init otg instance */
	dotg = kzalloc(sizeof(struct dwc3_otg), GFP_KERNEL);
	if (!dotg) {
		dev_err(dwc->dev, "unable to allocate dwc3_otg\n");
		return -ENOMEM;
	}

	/* DWC3 has separate IRQ line for OTG events (ID/BSV etc.) */
	dotg->irq = platform_get_irq_byname(to_platform_device(dwc->dev),
								"otg_irq");
	if (dotg->irq < 0) {
		dev_err(dwc->dev, "%s: missing OTG IRQ\n", __func__);
		ret = -ENODEV;
		goto err1;
	}

	dotg->regs = dwc->regs;

	dotg->otg.set_peripheral = dwc3_otg_set_peripheral;
	dotg->otg.set_host = dwc3_otg_set_host;

	/* This reference is used by dwc3 modules for checking otg existance */
	dwc->dotg = dotg;

	dotg->otg.phy = kzalloc(sizeof(struct usb_phy), GFP_KERNEL);
	if (!dotg->otg.phy) {
		dev_err(dwc->dev, "unable to allocate dwc3_otg.phy\n");
		ret = -ENOMEM;
		goto err1;
	}

	dotg->dwc = dwc;
	dotg->otg.phy->otg = &dotg->otg;
	dotg->otg.phy->dev = dwc->dev;
	dotg->otg.phy->set_power = dwc3_otg_set_power;
	dotg->otg.phy->set_suspend = dwc3_otg_set_suspend;

	ret = usb_set_transceiver(dotg->otg.phy);
	if (ret) {
		dev_err(dotg->otg.phy->dev,
			"%s: failed to set transceiver, already exists\n",
			__func__);
		goto err2;
	}

	dotg->otg.phy->state = OTG_STATE_UNDEFINED;

	init_completion(&dotg->dwc3_xcvr_vbus_init);
	INIT_DELAYED_WORK(&dotg->sm_work, dwc3_otg_sm_work);

	ret = request_irq(dotg->irq, dwc3_otg_interrupt, IRQF_SHARED,
				"dwc3_otg", dotg);
	if (ret) {
		dev_err(dotg->otg.phy->dev, "failed to request irq #%d --> %d\n",
				dotg->irq, ret);
		goto err3;
	}

	pm_runtime_get(dwc->dev);

	return 0;

err3:
	cancel_delayed_work_sync(&dotg->sm_work);
	usb_set_transceiver(NULL);
err2:
	kfree(dotg->otg.phy);
err1:
	dwc->dotg = NULL;
	kfree(dotg);

	return ret;
}

static int __devinit sh_mobile_sdhi_probe(struct platform_device *pdev)
{
	struct sh_mobile_sdhi *priv;
	struct tmio_mmc_data *mmc_data;
	struct sh_mobile_sdhi_info *p = pdev->dev.platform_data;
	struct tmio_mmc_host *host;
	char clk_name[8];
	int irq, ret, i = 0;
	bool multiplexed_isr = true;

	priv = kzalloc(sizeof(struct sh_mobile_sdhi), GFP_KERNEL);
	if (priv == NULL) {
		dev_err(&pdev->dev, "kzalloc failed\n");
		return -ENOMEM;
	}

	mmc_data = &priv->mmc_data;
	p->pdata = mmc_data;

	if (p->init) {
		ret = p->init(pdev, &sdhi_ops);
		if (ret)
			goto einit;
	}

	snprintf(clk_name, sizeof(clk_name), "sdhi%d", pdev->id);
	priv->clk = clk_get(&pdev->dev, clk_name);
	if (IS_ERR(priv->clk)) {
		dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name);
		ret = PTR_ERR(priv->clk);
		goto eclkget;
	}

	mmc_data->hclk = clk_get_rate(priv->clk);
	mmc_data->set_pwr = sh_mobile_sdhi_set_pwr;
	mmc_data->get_cd = sh_mobile_sdhi_get_cd;
	mmc_data->capabilities = MMC_CAP_MMC_HIGHSPEED;
	if (p) {
		mmc_data->flags = p->tmio_flags;
		if (mmc_data->flags & TMIO_MMC_HAS_IDLE_WAIT)
			mmc_data->write16_hook = sh_mobile_sdhi_write16_hook;
		mmc_data->ocr_mask = p->tmio_ocr_mask;
		mmc_data->capabilities |= p->tmio_caps;
		mmc_data->cd_gpio = p->cd_gpio;

		if (p->dma_slave_tx > 0 && p->dma_slave_rx > 0) {
			priv->param_tx.slave_id = p->dma_slave_tx;
			priv->param_rx.slave_id = p->dma_slave_rx;
			priv->dma_priv.chan_priv_tx = &priv->param_tx;
			priv->dma_priv.chan_priv_rx = &priv->param_rx;
			priv->dma_priv.alignment_shift = 1; /* 2-byte alignment */
			mmc_data->dma = &priv->dma_priv;
		}
	}

	/*
	 * All SDHI blocks support 2-byte and larger block sizes in 4-bit
	 * bus width mode.
	 */
	mmc_data->flags |= TMIO_MMC_BLKSZ_2BYTES;

	/*
	 * All SDHI blocks support SDIO IRQ signalling.
	 */
	mmc_data->flags |= TMIO_MMC_SDIO_IRQ;

	ret = tmio_mmc_host_probe(&host, pdev, mmc_data);
	if (ret < 0)
		goto eprobe;

	/*
	 * Allow one or more specific (named) ISRs or
	 * one or more multiplexed (un-named) ISRs.
	 */

	irq = platform_get_irq_byname(pdev, SH_MOBILE_SDHI_IRQ_CARD_DETECT);
	if (irq >= 0) {
		multiplexed_isr = false;
		ret = request_irq(irq, tmio_mmc_card_detect_irq, 0,
				  dev_name(&pdev->dev), host);
		if (ret)
			goto eirq_card_detect;
	}

	irq = platform_get_irq_byname(pdev, SH_MOBILE_SDHI_IRQ_SDIO);
	if (irq >= 0) {
		multiplexed_isr = false;
		ret = request_irq(irq, tmio_mmc_sdio_irq, 0,
				  dev_name(&pdev->dev), host);
		if (ret)
			goto eirq_sdio;
	}

	irq = platform_get_irq_byname(pdev, SH_MOBILE_SDHI_IRQ_SDCARD);
	if (irq >= 0) {
		multiplexed_isr = false;
		ret = request_irq(irq, tmio_mmc_sdcard_irq, 0,
				  dev_name(&pdev->dev), host);
		if (ret)
			goto eirq_sdcard;
//.........这里部分代码省略.........

//.........这里部分代码省略.........

	regulators->n_regulators = n_regulators;
	platform_set_drvdata(pdev, regulators);

	/* Register all regulators declared in platform information */
	n = 0;
	id = 0;
	while (n < regulators->n_regulators) {
		/* Skip regulator IDs depending on merge mode configuration */
		switch (id) {
		case DA9063_ID_BCORE1:
		case DA9063_ID_BCORE2:
			if (bcores_merged) {
				id++;
				continue;
			}
			break;
		case DA9063_ID_BMEM:
		case DA9063_ID_BIO:
			if (bmem_bio_merged) {
				id++;
				continue;
			}
			break;
		case DA9063_ID_BCORES_MERGED:
			if (!bcores_merged) {
				id++;
				continue;
			}
			break;
		case DA9063_ID_BMEM_BIO_MERGED:
			if (!bmem_bio_merged) {
				id++;
				continue;
			}
			break;
		}

		/* Initialise regulator structure */
		regl = &regulators->regulator[n];
		regl->hw = da9063;
		regl->info = &model->regulator_info[id];
		regl->desc = regl->info->desc;
		regl->desc.type = REGULATOR_VOLTAGE;
		regl->desc.owner = THIS_MODULE;

		if (regl->info->mode.reg)
			regl->mode = devm_regmap_field_alloc(&pdev->dev,
					da9063->regmap, regl->info->mode);
		if (regl->info->suspend.reg)
			regl->suspend = devm_regmap_field_alloc(&pdev->dev,
					da9063->regmap, regl->info->suspend);
		if (regl->info->sleep.reg)
			regl->sleep = devm_regmap_field_alloc(&pdev->dev,
					da9063->regmap, regl->info->sleep);
		if (regl->info->suspend_sleep.reg)
			regl->suspend_sleep = devm_regmap_field_alloc(&pdev->dev,
					da9063->regmap, regl->info->suspend_sleep);
		if (regl->info->ilimit.reg)
			regl->ilimit = devm_regmap_field_alloc(&pdev->dev,
					da9063->regmap, regl->info->ilimit);

		/* Register regulator */
		memset(&config, 0, sizeof(config));
		config.dev = &pdev->dev;
		config.init_data = da9063_get_regulator_initdata(regl_pdata, id);
		config.driver_data = regl;
		if (da9063_reg_matches)
			config.of_node = da9063_reg_matches[id].of_node;
		config.regmap = da9063->regmap;
		regl->rdev = devm_regulator_register(&pdev->dev, &regl->desc,
						     &config);
		if (IS_ERR(regl->rdev)) {
			dev_err(&pdev->dev,
				"Failed to register %s regulator\n",
				regl->desc.name);
			return PTR_ERR(regl->rdev);
		}
		id++;
		n++;
	}

	/* LDOs overcurrent event support */
	irq = platform_get_irq_byname(pdev, "LDO_LIM");
	if (irq < 0) {
		dev_err(&pdev->dev, "Failed to get IRQ.\n");
		return irq;
	}

	ret = devm_request_threaded_irq(&pdev->dev, irq,
				NULL, da9063_ldo_lim_event,
				IRQF_TRIGGER_LOW | IRQF_ONESHOT,
				"LDO_LIM", regulators);
	if (ret) {
		dev_err(&pdev->dev, "Failed to request LDO_LIM IRQ.\n");
		return ret;
	}

	return 0;
}

static int pmic_usb_det_drv_probe(struct platform_device *pdev)
{
	struct pmic_usb_det_data *pdata;
	struct usb_phy *otg_handle;
	int ret;

	if (!pdev)
		return -EINVAL;

	pdata = devm_kzalloc(&pdev->dev, sizeof(struct pmic_usb_det_data),
				GFP_KERNEL);

	if (!pdata) {
		dev_err(&pdev->dev, "%s: out of memory\n", __func__);
		return -ENOMEM;
	}

	pdata->pdev = &pdev->dev;
	pdata->vbus_state = -1;
	pdata->cable_type = POWER_SUPPLY_CHARGER_TYPE_NONE;
	pdata->usbid_state = -1;
	pdata->irq_ctyp = -ENXIO;
	pdata->irq_vbusdet = -ENXIO;
	pdata->irqwake_vbusdet = false;
	pdata->irqwake_ctyp = false;
	pdata->irqwake_idflt = false;
	pdata->irqwake_idgnd = false;

	platform_set_drvdata(pdev, pdata);

	/* Get USB phy */
	otg_handle = devm_usb_get_phy(&pdev->dev, USB_PHY_TYPE_USB2);
	if (IS_ERR_OR_NULL(otg_handle)) {
		dev_err(&pdev->dev, "%s: fail to get OTG transceiver\n",
			__func__);
		return -EBUSY;
	}

	pdata->otg_handle = otg_handle;

	/* Get interrupt from device tree */
	pdata->irq_vbusdet = platform_get_irq_byname(pdev, "vbusdet");
	pdata->irq_ctyp = platform_get_irq_byname(pdev, "ctype");
	pdata->irq_idflt = platform_get_irq_byname(pdev, "usbidflt");
	pdata->irq_idgnd = platform_get_irq_byname(pdev, "usbidgnd");

	if (IS_ERR_VALUE(pdata->irq_vbusdet) ||
		IS_ERR_VALUE(pdata->irq_ctyp) ||
		IS_ERR_VALUE(pdata->irq_idflt) ||
		IS_ERR_VALUE(pdata->irq_idgnd)) {
		ret = -EBUSY;
		dev_err(&pdev->dev,
			"%s: can't get irq, vbus=%d ctyp=%d idflt=%d idgnd=%d\n",
			__func__, pdata->irq_vbusdet, pdata->irq_ctyp,
			pdata->irq_idflt, pdata->irq_idgnd);
		return ret;
	}

	ret = pmic_usb_setup_det_irq(pdata);
	if (ret)
		return ret;

	/* Disable the internal detection circuit */
	ret = pmic_usb_enable_usb_det(pdata, false);
	if (ret)
		return ret;

	/* Read the VBUS presence status for initial update, and trigger
	USB type detection if applicable */
	ret = pmic_usb_vbus_det(pdata);
	if (ret)
		return ret;

	/* Enable USBID and ACA detection */
	ret = pmic_usb_enable_id_aca_det(pdata, true, true);
	if (ret)
		return ret;

	/* Read the USBID and ACA detection result */
	ret = pmic_usb_id_det(pdata, false, false);
	if (ret)
		return ret;

	ret = device_init_wakeup(&pdev->dev, true);
	if (ret)
		dev_err(&pdev->dev, "%s: can't set wakeup src\n", __func__);

	return ret;
}

static int rockchip_vpu_probe(struct platform_device *pdev)
{
	const struct of_device_id *match;
	struct rockchip_vpu_dev *vpu;
	struct resource *res;
	int i, ret;

	vpu = devm_kzalloc(&pdev->dev, sizeof(*vpu), GFP_KERNEL);
	if (!vpu)
		return -ENOMEM;

	vpu->dev = &pdev->dev;
	vpu->pdev = pdev;
	mutex_init(&vpu->vpu_mutex);
	spin_lock_init(&vpu->irqlock);

	match = of_match_node(of_rockchip_vpu_match, pdev->dev.of_node);
	vpu->variant = match->data;

	INIT_DELAYED_WORK(&vpu->watchdog_work, rockchip_vpu_watchdog);

	for (i = 0; i < vpu->variant->num_clocks; i++)
		vpu->clocks[i].id = vpu->variant->clk_names[i];
	ret = devm_clk_bulk_get(&pdev->dev, vpu->variant->num_clocks,
				vpu->clocks);
	if (ret)
		return ret;

	res = platform_get_resource(vpu->pdev, IORESOURCE_MEM, 0);
	vpu->base = devm_ioremap_resource(vpu->dev, res);
	if (IS_ERR(vpu->base))
		return PTR_ERR(vpu->base);
	vpu->enc_base = vpu->base + vpu->variant->enc_offset;

	ret = dma_set_coherent_mask(vpu->dev, DMA_BIT_MASK(32));
	if (ret) {
		dev_err(vpu->dev, "Could not set DMA coherent mask.\n");
		return ret;
	}

	if (vpu->variant->vepu_irq) {
		int irq;

		irq = platform_get_irq_byname(vpu->pdev, "vepu");
		if (irq <= 0) {
			dev_err(vpu->dev, "Could not get vepu IRQ.\n");
			return -ENXIO;
		}

		ret = devm_request_irq(vpu->dev, irq, vpu->variant->vepu_irq,
				       0, dev_name(vpu->dev), vpu);
		if (ret) {
			dev_err(vpu->dev, "Could not request vepu IRQ.\n");
			return ret;
		}
	}

	ret = vpu->variant->init(vpu);
	if (ret) {
		dev_err(&pdev->dev, "Failed to init VPU hardware\n");
		return ret;
	}

	pm_runtime_set_autosuspend_delay(vpu->dev, 100);
	pm_runtime_use_autosuspend(vpu->dev);
	pm_runtime_enable(vpu->dev);

	ret = clk_bulk_prepare(vpu->variant->num_clocks, vpu->clocks);
	if (ret) {
		dev_err(&pdev->dev, "Failed to prepare clocks\n");
		return ret;
	}

	ret = v4l2_device_register(&pdev->dev, &vpu->v4l2_dev);
	if (ret) {
		dev_err(&pdev->dev, "Failed to register v4l2 device\n");
		goto err_clk_unprepare;
	}
	platform_set_drvdata(pdev, vpu);

	vpu->m2m_dev = v4l2_m2m_init(&vpu_m2m_ops);
	if (IS_ERR(vpu->m2m_dev)) {
		v4l2_err(&vpu->v4l2_dev, "Failed to init mem2mem device\n");
		ret = PTR_ERR(vpu->m2m_dev);
		goto err_v4l2_unreg;
	}

	vpu->mdev.dev = vpu->dev;
	strlcpy(vpu->mdev.model, DRIVER_NAME, sizeof(vpu->mdev.model));
	media_device_init(&vpu->mdev);
	vpu->v4l2_dev.mdev = &vpu->mdev;

	ret = rockchip_vpu_video_device_register(vpu);
	if (ret) {
		dev_err(&pdev->dev, "Failed to register encoder\n");
		goto err_m2m_rel;
	}

	ret = media_device_register(&vpu->mdev);
	if (ret) {
//.........这里部分代码省略.........

/* ap9540_c2c_probe - probe C2C ressources */
static int ap9540_c2c_probe(struct platform_device *pdev)
{
	struct c2c_platform_data *pdata = pdev->dev.platform_data;
	struct ap9540_c2c *c2c, *c2c_alloc;
	struct resource *res;
	int ret = 0, i;
	int align = 0x3f;

	if (c2c_dev)
		return -EBUSY;

	/* alocate c2c structure, with 64byte address alignement */
	c2c = kzalloc(sizeof(*c2c) + align, GFP_KERNEL);
	if (c2c == NULL)
		return -ENOMEM;

	c2c_alloc =\
		(struct ap9540_c2c *) PTR_ALIGN((struct ap9540_c2c *)c2c, align);
	c2c_dev_align = (int)(c2c_alloc - c2c);
	c2c = (struct ap9540_c2c *) c2c_alloc;

	/* init c2c structure */
	c2c->dev = &pdev->dev;
	c2c->pdev = pdev;

	mutex_init(&c2c->lock);
	for (i = 31; i >= 0; i--)
		c2c->genio[i].irq = -1;
	c2c->irq1 = -1;
	c2c->wumod_gpio = -1;

	INIT_WORK(&c2c->ipc_ready_work, ipc_ready_work);
	INIT_WORK(&c2c->caif_ready_work, caif_ready_work);
	INIT_WORK(&c2c->protection_work, protection_work);

	init_timer(&c2c->powerup_timer);
	c2c->powerup_timeout_ms = 1000;
	c2c->powerup_timer.function = powerup_timer_elapsed;
	c2c->powerup_timer.data = (unsigned long) c2c;

	init_waitqueue_head(&c2c->waitq);

	/* PRCMU and C2C registers base adresses */
	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "C2C_REGS");
	if (!res) {
		ret = -ENODEV;
		goto err;
	}
	c2c->c2c_base = ioremap(res->start,
			res->end - res->start + 1);
	if (c2c->c2c_base == NULL) {
		ret = -EIO;
		goto err;
	}

	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "PRCMU_REGS");
	if (!res) {
		ret = -ENODEV;
		goto err;
	}
	c2c->prcm_base = ioremap(res->start,
			res->end - res->start + 1);
	if (c2c->prcm_base == NULL) {
		ret = -EIO;
		goto err;
	}

	/* GPIO WU_MOD */
	if (!pdata) {
		dev_err(&pdev->dev, "invalid c2c platform data\n");
		goto err;
	}
	c2c->wumod_gpio = pdata->wumod_gpio;
	ret = gpio_request(c2c->wumod_gpio, "WU_MOD");
	if (ret < 0) {
		c2c->wumod_gpio = -1;
		goto err;
	}
	ret = gpio_direction_output(c2c->wumod_gpio, 1);
	if (ret < 0)
		goto err;

	/* C2C IRQ[1], required for IPC_READY/CAIF_READY */
	c2c->irq1 = platform_get_irq_byname(c2c->pdev, "C2C_IRQ1");
	if (c2c->irq1 < 0) {
		ret = -ENODEV;
		goto err;
	}
	ret = devm_request_threaded_irq(c2c->dev, c2c->irq1, c2c_irq1_top,
			c2c_irq1_bottom, IRQF_NO_SUSPEND, "C2C_IRQ1", c2c);
	if (ret)
		goto err;

	ret = ap9540_c2c_debugfs(c2c);
	if (ret)
		goto err;

	ret = ap9540_c2c_deep_debug_init(c2c);
	if (ret)
//.........这里部分代码省略.........

static int ehci_msm2_probe(struct platform_device *pdev)
{
	struct usb_hcd *hcd;
	struct resource *res;
	struct msm_hcd *mhcd;
	struct pinctrl_state *set_state;
	const struct msm_usb_host_platform_data *pdata;
	char pdev_name[PDEV_NAME_LEN];
	int ret;

	dev_dbg(&pdev->dev, "ehci_msm2 probe\n");

	/*
	 * Fail probe in case of uicc till userspace activates driver through
	 * sysfs entry.
	 */
	if (!uicc_card_present && pdev->dev.of_node && of_property_read_bool(
				pdev->dev.of_node, "qcom,usb2-enable-uicc"))
		return -ENODEV;

	hcd = usb_create_hcd(&ehci_msm2_hc_driver, &pdev->dev,
				dev_name(&pdev->dev));
	if (!hcd) {
		dev_err(&pdev->dev, "Unable to create HCD\n");
		return  -ENOMEM;
	}

	mhcd = hcd_to_mhcd(hcd);
	mhcd->dev = &pdev->dev;

	mhcd->xo_clk = clk_get(&pdev->dev, "xo");
	if (IS_ERR(mhcd->xo_clk)) {
		ret = PTR_ERR(mhcd->xo_clk);
		mhcd->xo_clk = NULL;
		if (ret == -EPROBE_DEFER)
			goto put_hcd;
	}

	ret = msm_ehci_init_clocks(mhcd, 1);
	if (ret)
		goto xo_put;

	if (pdev->dev.of_node) {
		dev_dbg(&pdev->dev, "device tree enabled\n");
		pdev->dev.platform_data = ehci_msm2_dt_to_pdata(pdev);
	}

	if (!pdev->dev.platform_data)
		dev_dbg(&pdev->dev, "No platform data given\n");

	pdata = pdev->dev.platform_data;

	if (!pdev->dev.dma_mask)
		pdev->dev.dma_mask = &ehci_msm_dma_mask;
	if (!pdev->dev.coherent_dma_mask)
		pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);

	hcd_to_bus(hcd)->skip_resume = true;

	hcd->irq = platform_get_irq(pdev, 0);
	if (hcd->irq < 0) {
		dev_err(&pdev->dev, "Unable to get IRQ resource\n");
		ret = hcd->irq;
		goto deinit_clocks;
	}

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!res) {
		dev_err(&pdev->dev, "Unable to get memory resource\n");
		ret = -ENODEV;
		goto deinit_clocks;
	}

	hcd->rsrc_start = res->start;
	hcd->rsrc_len = resource_size(res);
	hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
	if (!hcd->regs) {
		dev_err(&pdev->dev, "ioremap failed\n");
		ret = -ENOMEM;
		goto deinit_clocks;
	}


	spin_lock_init(&mhcd->wakeup_lock);

	mhcd->async_irq = platform_get_irq_byname(pdev, "async_irq");
	if (mhcd->async_irq < 0) {
		dev_dbg(&pdev->dev, "platform_get_irq for async_int failed\n");
		mhcd->async_irq = 0;
	} else {
		ret = request_irq(mhcd->async_irq, msm_async_irq,
				IRQF_TRIGGER_RISING, "msm_ehci_host", mhcd);
		if (ret) {
			dev_err(&pdev->dev, "request irq failed (ASYNC INT)\n");
			goto unmap;
		}
		disable_irq(mhcd->async_irq);
	}

	snprintf(pdev_name, PDEV_NAME_LEN, "%s.%d", pdev->name, pdev->id);
//.........这里部分代码省略.........

static int msm_iommu_probe(struct platform_device *pdev)
{
    struct resource *r;
    struct clk *iommu_clk;
    struct clk *iommu_pclk;
    struct msm_iommu_drvdata *drvdata;
    struct msm_iommu_dev *iommu_dev = pdev->dev.platform_data;
    void __iomem *regs_base;
    int ret, irq, par;

    if (pdev->id == -1) {
        msm_iommu_root_dev = pdev;
        return 0;
    }

    drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL);

    if (!drvdata) {
        ret = -ENOMEM;
        goto fail;
    }

    if (!iommu_dev) {
        ret = -ENODEV;
        goto fail;
    }

    iommu_pclk = clk_get(NULL, "smmu_pclk");
    if (IS_ERR(iommu_pclk)) {
        ret = -ENODEV;
        goto fail;
    }

    ret = clk_prepare_enable(iommu_pclk);
    if (ret)
        goto fail_enable;

    iommu_clk = clk_get(&pdev->dev, "iommu_clk");

    if (!IS_ERR(iommu_clk))	{
        if (clk_get_rate(iommu_clk) == 0)
            clk_set_rate(iommu_clk, 1);

        ret = clk_prepare_enable(iommu_clk);
        if (ret) {
            clk_put(iommu_clk);
            goto fail_pclk;
        }
    } else
        iommu_clk = NULL;

    r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "physbase");
    regs_base = devm_ioremap_resource(&pdev->dev, r);
    if (IS_ERR(regs_base)) {
        ret = PTR_ERR(regs_base);
        goto fail_clk;
    }

    irq = platform_get_irq_byname(pdev, "secure_irq");
    if (irq < 0) {
        ret = -ENODEV;
        goto fail_clk;
    }

    msm_iommu_reset(regs_base, iommu_dev->ncb);

    SET_M(regs_base, 0, 1);
    SET_PAR(regs_base, 0, 0);
    SET_V2PCFG(regs_base, 0, 1);
    SET_V2PPR(regs_base, 0, 0);
    par = GET_PAR(regs_base, 0);
    SET_V2PCFG(regs_base, 0, 0);
    SET_M(regs_base, 0, 0);

    if (!par) {
        pr_err("%s: Invalid PAR value detected\n", iommu_dev->name);
        ret = -ENODEV;
        goto fail_clk;
    }

    ret = request_irq(irq, msm_iommu_fault_handler, 0,
                      "msm_iommu_secure_irpt_handler", drvdata);
    if (ret) {
        pr_err("Request IRQ %d failed with ret=%d\n", irq, ret);
        goto fail_clk;
    }


    drvdata->pclk = iommu_pclk;
    drvdata->clk = iommu_clk;
    drvdata->base = regs_base;
    drvdata->irq = irq;
    drvdata->ncb = iommu_dev->ncb;

    pr_info("device %s mapped at %p, irq %d with %d ctx banks\n",
            iommu_dev->name, regs_base, irq, iommu_dev->ncb);

    platform_set_drvdata(pdev, drvdata);

    if (iommu_clk)
//.........这里部分代码省略.........