本文整理汇总了C++中pio_configure函数的典型用法代码示例。如果您正苦于以下问题:C++ pio_configure函数的具体用法?C++ pio_configure怎么用?C++ pio_configure使用的例子?那么恭喜您, 这里精选的函数代码示例或许可以为您提供帮助。
在下文中一共展示了pio_configure函数的15个代码示例,这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞,您的评价将有助于系统推荐出更棒的C++代码示例。
示例1: at91_twi0_hw_init
unsigned int at91_twi0_hw_init(void)
{
unsigned int base_addr = AT91C_BASE_TWI0;
const struct pio_desc twi_pins[] = {
{"TWD0", AT91C_PIN_PD(21), 0, PIO_DEFAULT, PIO_PERIPH_B},
{"TWCK0", AT91C_PIN_PD(22), 0, PIO_DEFAULT, PIO_PERIPH_B},
{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
};
pio_configure(twi_pins);
pmc_sam9x5_enable_periph_clk(AT91C_ID_TWI0);
return base_addr;
}
示例2: at91_dbgu_hw_init
static void at91_dbgu_hw_init(void)
{
/* Configure DBGU pin */
const struct pio_desc dbgu_pins[] = {
{"RXD", AT91C_PIN_PB(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
{"TXD", AT91C_PIN_PB(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
};
/* Configure the dbgu pins */
pmc_enable_periph_clock(AT91C_ID_PIOB);
pio_configure(dbgu_pins);
/* Enable clock */
pmc_enable_periph_clock(AT91C_ID_DBGU);
}
示例3: at91_spi0_hw_init
void at91_spi0_hw_init(void)
{
/* Configure spi0 PINs */
const struct pio_desc spi0_pins[] = {
{"MISO", AT91C_PIN_PB(0), 0, PIO_DEFAULT, PIO_PERIPH_A},
{"MOSI", AT91C_PIN_PB(1), 0, PIO_DEFAULT, PIO_PERIPH_A},
{"SPCK", AT91C_PIN_PB(2), 0, PIO_DEFAULT, PIO_PERIPH_A},
{"NPCS", CONFIG_SYS_SPI_PCS, 1, PIO_DEFAULT, PIO_OUTPUT},
{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
};
writel((1 << AT91C_ID_PIOB), (PMC_PCER + AT91C_BASE_PMC));
pio_configure(spi0_pins);
writel((1 << AT91C_ID_SPI0), (PMC_PCER + AT91C_BASE_PMC));
}
示例4: nandflash_hw_init
void nandflash_hw_init(void)
{
unsigned int reg;
/* Configure PIOs */
const struct pio_desc nand_pins[] = {
{"NANDCS", CONFIG_SYS_NAND_ENABLE_PIN, 1, PIO_PULLUP, PIO_OUTPUT},
{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
};
/* Setup Smart Media, first enable the address range of CS3
* in HMATRIX user interface
* EBI IO in 1.8V mode */
reg = readl(AT91C_BASE_CCFG + CCFG_EBICSA);
reg |= AT91C_EBI_CS3A_SM;
reg &= ~AT91C_VDDIOM_SEL_33V;
writel(reg, AT91C_BASE_CCFG + CCFG_EBICSA);
/* Configure SMC CS3 */
writel((AT91C_SMC_NWESETUP_(2)
| AT91C_SMC_NCS_WRSETUP_(0)
| AT91C_SMC_NRDSETUP_(2)
| AT91C_SMC_NCS_RDSETUP_(0)),
AT91C_BASE_SMC + SMC_SETUP3);
writel((AT91C_SMC_NWEPULSE_(4)
| AT91C_SMC_NCS_WRPULSE_(4)
| AT91C_SMC_NRDPULSE_(4)
| AT91C_SMC_NCS_RDPULSE_(4)),
AT91C_BASE_SMC + SMC_PULSE3);
writel((AT91C_SMC_NWECYCLE_(7)
| AT91C_SMC_NRDCYCLE_(7)),
AT91C_BASE_SMC + SMC_CYCLE3);
writel((AT91C_SMC_READMODE
| AT91C_SMC_WRITEMODE
| AT91C_SMC_NWAITM_NWAIT_DISABLE
| AT91C_SMC_DBW_WIDTH_BITS_16
| AT91_SMC_TDF_(3)),
AT91C_BASE_SMC + SMC_CTRL3);
/* Configure the PIO controll */
writel((1 << AT91C_ID_PIOC), (PMC_PCER + AT91C_BASE_PMC));
pio_configure(nand_pins);
}
示例5: ek_special_hw_init
static int ek_special_hw_init(void)
{
unsigned long rstc;
unsigned long rst_key = (0xA5 << 24);
/*
* For on the sam9m10g45ek board, the chip wm9711 stay in the test mode,
* so it need do some action to exit mode.
*/
const struct pio_desc wm9711_pins[] = {
{"AC97TX", AT91C_PIN_PD(7), 0, PIO_PULLUP, PIO_OUTPUT},
{"AC97FS", AT91C_PIN_PD(8), 0, PIO_PULLUP, PIO_OUTPUT},
{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
};
pio_configure(wm9711_pins);
writel((1 << AT91C_ID_PIOD_E), PMC_PCER + AT91C_BASE_PMC);
/*
* Disable pull-up on:
* RXDV(PA15) => PHY normal mode (not Test mode)
* ERX0(PA12) => PHY ADDR0
* ERX1(PA13) => PHY ADDR1 => PHYADDR = 0x0
*
* PHY has internal pull-down
*/
writel((0x01 << 12) | (0x01 << 13) | (0x01 << 15), AT91C_BASE_PIOA + PIO_PPUDR(0));
rstc = at91_sys_read(AT91C_BASE_RSTC + RSTC_RMR);
/* Need to reset PHY -> 500ms reset */
at91_sys_write(AT91C_BASE_RSTC + RSTC_RMR, rst_key |
(AT91C_RSTC_ERSTL & (0x0D << 8)) |
AT91C_RSTC_URSTEN);
at91_sys_write(AT91C_BASE_RSTC + RSTC_RCR, rst_key | AT91C_RSTC_EXTRST);
/* Wait for end hardware reset */
while (!(at91_sys_read(AT91C_BASE_RSTC + RSTC_RSR) & AT91C_RSTC_NRSTL));
/* Restore NRST value */
at91_sys_write(AT91C_BASE_RSTC + RSTC_RMR, rst_key |
(rstc) |
AT91C_RSTC_URSTEN);
return 0;
}
示例6: nandflash_hw_init
void nandflash_hw_init(void)
{
unsigned int reg;
/* Configure NANDFlash pins*/
const struct pio_desc nand_pins[] = {
{"NANDALE", AT91C_PIN_PB(2), 0, PIO_PULLUP, PIO_PERIPH_A},
{"NANDCLE", AT91C_PIN_PB(3), 0, PIO_PULLUP, PIO_PERIPH_A},
{"NANDOE", AT91C_PIN_PB(4), 0, PIO_PULLUP, PIO_PERIPH_A},
{"NANDWE", AT91C_PIN_PB(5), 0, PIO_PULLUP, PIO_PERIPH_A},
{"NANDCS", CONFIG_SYS_NAND_ENABLE_PIN, 1, PIO_PULLUP, PIO_OUTPUT},
{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
};
/* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
reg = readl(AT91C_BASE_CCFG + CCFG_EBI0CSA);
reg |= AT91C_EBI_CS3A_SM;
writel(reg, AT91C_BASE_CCFG + CCFG_EBI0CSA);
/* Configure SMC CS3 */
writel((AT91C_SMC_NWESETUP_(1)
| AT91C_SMC_NCS_WRSETUP_(0)
| AT91C_SMC_NRDSETUP_(1)
| AT91C_SMC_NCS_RDSETUP_(0)),
AT91C_BASE_SMC + SMC_SETUP3);
writel((AT91C_SMC_NWEPULSE_(3)
| AT91C_SMC_NCS_WRPULSE_(3)
| AT91C_SMC_NRDPULSE_(3)
| AT91C_SMC_NCS_RDPULSE_(3)),
AT91C_BASE_SMC + SMC_PULSE3);
writel((AT91C_SMC_NWECYCLE_(5)
| AT91C_SMC_NRDCYCLE_(5)),
AT91C_BASE_SMC + SMC_CYCLE3);
writel((AT91C_SMC_READMODE
| AT91C_SMC_WRITEMODE
| AT91C_SMC_NWAITM_NWAIT_DISABLE
| AT91C_SMC_DBW_WIDTH_BITS_8
| AT91_SMC_TDF_(2)),
AT91C_BASE_SMC + SMC_CTRL3);
/* Configure the NANDFlash pins */
pmc_enable_periph_clock(AT91C_ID_PIOB);
pio_configure(nand_pins);
}
示例7: at91_spi0_hw_init
void at91_spi0_hw_init(void)
{
/* Configure PIN for SPI0 */
const struct pio_desc spi0_pins[] = {
{"SPI0_MISO", AT91C_PIN_PC(0), 0, PIO_DEFAULT, PIO_PERIPH_A},
{"SPI0_MOSI", AT91C_PIN_PC(1), 0, PIO_DEFAULT, PIO_PERIPH_A},
{"SPI0_SPCK", AT91C_PIN_PC(2), 0, PIO_DEFAULT, PIO_PERIPH_A},
{"SPI0_NPCS", CONFIG_SYS_SPI_PCS, 1, PIO_DEFAULT, PIO_OUTPUT},
{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
};
/* Configure the PIO controller */
pio_configure(spi0_pins);
pmc_enable_periph_clock(AT91C_ID_PIOC);
pmc_enable_periph_clock(AT91C_ID_SPI0);
}
示例8: at91_eth1_hw_init
unsigned int at91_eth1_hw_init(void)
{
unsigned int base_addr = AT91C_BASE_GMAC1;
const struct pio_desc macb_pins[] = {
{"G1_MDC", AT91C_PIN_PA(22), 0, PIO_DEFAULT, PIO_PERIPH_B},
{"G1_MDIO", AT91C_PIN_PA(23), 0, PIO_DEFAULT, PIO_PERIPH_B},
{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
};
pio_configure(macb_pins);
pmc_enable_periph_clock(AT91C_ID_PIOA);
pmc_enable_periph_clock(AT91C_ID_GMAC1);
return base_addr;
}
示例9: at91_twi3_hw_init
unsigned int at91_twi3_hw_init(void)
{
unsigned int base_addr = AT91C_BASE_TWI3;
const struct pio_desc twi_pins[] = {
{"TWD3", AT91C_PIN_PC(25), 0, PIO_DEFAULT, PIO_PERIPH_B},
{"TWCK3", AT91C_PIN_PC(26), 0, PIO_DEFAULT, PIO_PERIPH_B},
{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
};
pmc_enable_periph_clock(AT91C_ID_PIOC);
pio_configure(twi_pins);
pmc_enable_periph_clock(AT91C_ID_TWI3);
return base_addr;
}
示例10: configure_button
/**
* \brief Configure the Pushbutton.
*/
static void configure_button(void)
{
/* Enable the peripheral clock for the push button on board. */
pmc_enable_periph_clk(PUSHBUTTON_ID);
/* Configure PIOs as input pins. */
pio_configure(PUSHBUTTON_PIO, PUSHBUTTON_TYPE, PUSHBUTTON_MASK,
PUSHBUTTON_ATTR);
/* Adjust PIO debounce filter parameters. */
pio_set_debounce_filter(PUSHBUTTON_PIO, PUSHBUTTON_MASK,
PUSHBUTTON_FILTER_GLITCH_VAULE);
/* Initialize PIO interrupt handler, interrupt on rising edge. */
pio_handler_set(PUSHBUTTON_PIO, PUSHBUTTON_ID, PUSHBUTTON_MASK,
PUSHBUTTON_ATTR, button_handler);
}
示例11: at91_eth1_hw_init
unsigned int at91_eth1_hw_init(void)
{
unsigned int base_addr = AT91C_BASE_EMAC;
const struct pio_desc macb_pins[] = {
{"EMDC", AT91C_PIN_PC(8), 0, PIO_DEFAULT, PIO_PERIPH_A},
{"EMDIO", AT91C_PIN_PC(9), 0, PIO_DEFAULT, PIO_PERIPH_A},
{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
};
pio_configure(macb_pins);
pmc_enable_periph_clock(AT91C_ID_PIOC);
pmc_enable_periph_clock(AT91C_ID_EMAC);
return base_addr;
}
示例12: nandflash_hw_init
void nandflash_hw_init(void)
{
const struct pio_desc nand_pins[] = {
{"NANDALE", AT91C_PIN_PE(21), 0, PIO_PULLUP, PIO_PERIPH_A},
{"NANDCLE", AT91C_PIN_PE(22), 0, PIO_PULLUP, PIO_PERIPH_A},
{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
};
pmc_enable_periph_clock(AT91C_ID_PIOE);
pio_configure(nand_pins);
pmc_enable_periph_clock(AT91C_ID_SMC);
writel(AT91C_SMC_SETUP_NWE(1)
| AT91C_SMC_SETUP_NCS_WR(1)
| AT91C_SMC_SETUP_NRD(2)
| AT91C_SMC_SETUP_NCS_RD(1),
(ATMEL_BASE_SMC + SMC_SETUP3));
writel(AT91C_SMC_PULSE_NWE(5)
| AT91C_SMC_PULSE_NCS_WR(7)
| AT91C_SMC_PULSE_NRD(5)
| AT91C_SMC_PULSE_NCS_RD(7),
(ATMEL_BASE_SMC + SMC_PULSE3));
writel(AT91C_SMC_CYCLE_NWE(8)
| AT91C_SMC_CYCLE_NRD(9),
(ATMEL_BASE_SMC + SMC_CYCLE3));
writel(AT91C_SMC_TIMINGS_TCLR(3)
| AT91C_SMC_TIMINGS_TADL(10)
| AT91C_SMC_TIMINGS_TAR(3)
| AT91C_SMC_TIMINGS_TRR(4)
| AT91C_SMC_TIMINGS_TWB(5)
| AT91C_SMC_TIMINGS_RBNSEL(3)
| AT91C_SMC_TIMINGS_NFSEL,
(ATMEL_BASE_SMC + SMC_TIMINGS3));
writel(AT91C_SMC_MODE_READMODE_NRD_CTRL
| AT91C_SMC_MODE_WRITEMODE_NWE_CTRL
| AT91C_SMC_MODE_EXNWMODE_DISABLED
| AT91C_SMC_MODE_DBW_8
| AT91C_SMC_MODE_TDF_CYCLES(1),
(ATMEL_BASE_SMC + SMC_MODE3));
}
示例13: psram_hw_init
static void psram_hw_init(void)
{
unsigned short *addressMax = (unsigned short *)MICRON_8MB_ADDRESS_MAX;
const struct pio_desc psram_pins[] = {
{"CRE", CONFIG_SYS_PSRAM_DATA_ACCESS_PIN, 1, PIO_DEFAULT, PIO_OUTPUT},
{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
};
/* Configure SMC1 CS0 */
writel((AT91C_SMC_NWESETUP_(0)
| AT91C_SMC_NCS_WRSETUP_(0)
| AT91C_SMC_NRDSETUP_(0)
| AT91C_SMC_NCS_RDSETUP_(0)),
AT91C_BASE_SMC1 + SMC_SETUP0);
writel((AT91C_SMC_NWEPULSE_(4)
| AT91C_SMC_NCS_WRPULSE_(5)
| AT91C_SMC_NRDPULSE_(2)
| AT91C_SMC_NCS_RDPULSE_(5)),
AT91C_BASE_SMC1 + SMC_PULSE0);
writel((AT91C_SMC_NWECYCLE_(5)
| AT91C_SMC_NRDCYCLE_(7)),
AT91C_BASE_SMC1 + SMC_CYCLE0);
writel((AT91C_SMC_READMODE
| AT91C_SMC_WRITEMODE
| AT91C_SMC_BAT_BYTE_SELECT
| AT91C_SMC_DBW_WIDTH_BITS_16
| AT91C_SMC_PMEN
| AT91C_SMC_PS_SIZE_THIRTY_TWO_BYTES),
AT91C_BASE_SMC1 + SMC_CTRL0);
/* Configure psram pins */
pio_configure(psram_pins);
data_access_enable();
/* Enable page mode */
readl(addressMax);
readl(addressMax);
writel(MICRON_RCR, addressMax);
writel(MICRON_PAGE_MODE_ENABLE, addressMax);
}
示例14: at91_spi0_hw_init
void at91_spi0_hw_init(void)
{
/* Configure spi0 PINs */
const struct pio_desc spi0_pins[] = {
{"MISO", AT91C_PIN_PA(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
{"MOSI", AT91C_PIN_PA(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
{"SPCK", AT91C_PIN_PA(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
{"NPCS", CONFIG_SYS_SPI_PCS, 1, PIO_PULLUP, PIO_OUTPUT},
{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
};
/* Configure the spi0 pins */
pmc_enable_periph_clock(AT91C_ID_PIOA);
pio_configure(spi0_pins);
/* Enable the spi0 clock */
pmc_enable_periph_clock(AT91C_ID_SPI);
}
示例15: at91_spi0_hw_init
void at91_spi0_hw_init(void)
{
/* Configure PIN for SPI0 */
const struct pio_desc spi0_pins[] = {
{"MISO", AT91C_PIN_PD(10), 0, PIO_DEFAULT, PIO_PERIPH_A},
{"MOSI", AT91C_PIN_PD(11), 0, PIO_DEFAULT, PIO_PERIPH_A},
{"SPCK", AT91C_PIN_PD(12), 0, PIO_DEFAULT, PIO_PERIPH_A},
{"NPCS", CONFIG_SYS_SPI_PCS, 1, PIO_DEFAULT, PIO_OUTPUT},
{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
};
/* Configure the PIO controller */
writel((1 << AT91C_ID_PIOD), (PMC_PCER + AT91C_BASE_PMC));
pio_configure(spi0_pins);
/* Enable the clock */
writel((1 << AT91C_ID_SPI0), (PMC_PCER + AT91C_BASE_PMC));
}