本文整理汇总了C++中panel_next_on函数的典型用法代码示例。如果您正苦于以下问题:C++ panel_next_on函数的具体用法?C++ panel_next_on怎么用?C++ panel_next_on使用的例子?那么恭喜您, 这里精选的函数代码示例或许可以为您提供帮助。
在下文中一共展示了panel_next_on函数的15个代码示例,这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞,您的评价将有助于系统推荐出更棒的C++代码示例。
示例1: rgb2mipi_on
static int rgb2mipi_on(struct platform_device *pdev)
{
int ret = 0;
struct hisi_fb_data_type *hisifd = NULL;
BUG_ON(pdev == NULL);
hisifd = platform_get_drvdata(pdev);
BUG_ON(hisifd == NULL);
HISI_FB_DEBUG("fb%d, +.\n", hisifd->index);
hisifd->panel_info.lcd_init_step = LCD_INIT_POWER_ON;
ret = panel_next_on(pdev);
/* rgb2mipi bridge init */
ret = rgb2mipi_init(hisifd);
/* LCDD (Peripheral) Setting */
ret = panel_next_on(pdev);
/* rgb2mipi bridge prepare for receiving */
ret = rgb2mipi_prep4Rec(hisifd);
ret = panel_next_on(pdev);
msleep(50);
HISI_FB_DEBUG("fb%d, -.\n", hisifd->index);
return ret;
}
示例2: mipi_dsi_on
static int mipi_dsi_on(struct platform_device *pdev)
{
int ret = 0;
struct hisi_fb_data_type *hisifd = NULL;
BUG_ON(pdev == NULL);
hisifd = platform_get_drvdata(pdev);
BUG_ON(hisifd == NULL);
HISI_FB_DEBUG("fb%d, +.\n", hisifd->index);
/* set LCD init step before LCD on*/
hisifd->panel_info.lcd_init_step = LCD_INIT_POWER_ON;
ret = panel_next_on(pdev);
mipi_dsi_clk_enable(hisifd);
mipi_dsi_on_sub1(hisifd, hisifd->mipi_dsi0_base);
if (is_dual_mipi_panel(hisifd))
mipi_dsi_on_sub1(hisifd, hisifd->mipi_dsi1_base);
ret = panel_next_on(pdev);
mipi_dsi_on_sub2(hisifd, hisifd->mipi_dsi0_base);
if (is_dual_mipi_panel(hisifd))
mipi_dsi_on_sub2(hisifd, hisifd->mipi_dsi1_base);
/* mipi hs video/command mode */
ret = panel_next_on(pdev);
HISI_FB_DEBUG("fb%d, -.\n", hisifd->index);
return ret;
}
示例3: ldi_on
static int ldi_on(struct platform_device *pdev)
{
int ret = 0;
struct k3_fb_data_type *k3fd = NULL;
BUG_ON(pdev == NULL);
k3fd = (struct k3_fb_data_type *)platform_get_drvdata(pdev);
BUG_ON(k3fd == NULL);
/* ldi clock enable */
ret = clk_enable(k3fd->ldi_clk);
if (ret != 0) {
k3fb_loge("failed to enable ldi_clk, error=%d!\n", ret);
return ret;
}
/* ldi init */
ldi_init(k3fd);
if (k3fd->panel_info.type == PANEL_LDI) {
/* set LCD init step before LCD on*/
k3fd->panel_info.lcd_init_step = LCD_INIT_POWER_ON;
ret = panel_next_on(pdev);
}
ret = panel_next_on(pdev);
set_LDI_CTRL_ldi_en(k3fd->edc_base, K3_ENABLE);
return ret;
}
示例4: dpe_on
static int dpe_on(struct platform_device *pdev)
{
int ret = 0;
struct k3_fb_data_type *k3fd = NULL;
BUG_ON(pdev == NULL);
k3fd = platform_get_drvdata(pdev);
BUG_ON(k3fd == NULL);
K3_FB_DEBUG("fb%d, +.\n", k3fd->index);
/* dis reset DSI */
if (is_mipi_panel(k3fd)) {
if (is_dual_mipi_panel(k3fd)) {
outp32(k3fd->crgperi_base + PERRSTDIS3_OFFSET, 0x00030000);
} else {
outp32(k3fd->crgperi_base + PERRSTDIS3_OFFSET, 0x00020000);
}
}
if (k3fd->index != PRIMARY_PANEL_IDX) {
if (k3fd_list[PRIMARY_PANEL_IDX] &&
(k3fd_list[PRIMARY_PANEL_IDX]->panel_info.vsync_ctrl_type & VSYNC_CTRL_CLK_OFF)) {
K3_FB_DEBUG("fb%d, pdp clk enable!\n", k3fd->index);
dpe_clk_enable(k3fd_list[PRIMARY_PANEL_IDX]);
}
}
dpe_regulator_enable(k3fd);
dpe_init(k3fd);
if (is_ldi_panel(k3fd)) {
k3fd->panel_info.lcd_init_step = LCD_INIT_POWER_ON;
ret = panel_next_on(pdev);
}
ret = panel_next_on(pdev);
if (k3fd->panel_info.vsync_ctrl_type == VSYNC_CTRL_NONE) {
dpe_irq_enable(k3fd);
dpe_interrupt_unmask(k3fd);
}
#if 0
if (k3fd->index == PRIMARY_PANEL_IDX) {
enable_ldi_pdp(k3fd);
} else if (k3fd->index == EXTERNAL_PANEL_IDX) {
enable_ldi_sdp(k3fd);
} else if (k3fd->index == AUXILIARY_PANEL_IDX) {
; /* do nothing */
} else {
K3_FB_ERR("fb%d, not support this device!\n", k3fd->index);
}
#endif
K3_FB_DEBUG("fb%d, -.\n", k3fd->index);
return ret;
}
示例5: prepare_for_reg_access
static int prepare_for_reg_access(struct msm_fb_data_type *mfd)
{
struct device *dev = &mfd->panel_pdev->dev;
struct mipi_dsi_data *dsi_data;
int ret = 0;
dsi_data = platform_get_drvdata(mfd->panel_pdev);
if (mfd->panel_power_on) {
dev_dbg(dev, "%s: panel is on, don't do anything\n", __func__);
on_state = false;
} else {
dev_dbg(dev, "%s: panel is NOT on, power on stack\n", __func__);
ret = panel_next_on(mfd->pdev); /* msm_fb_dev */
if (ret)
goto exit;
on_state = true;
}
mutex_lock(&mfd->dma->ov_mutex);
if (mfd->panel_info.mipi.mode == DSI_VIDEO_MODE) {
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
MDP_OUTP(MDP_BASE + DSI_VIDEO_BASE, 0);
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
msleep(ONE_FRAME_TRANSMIT_WAIT_MS);
mipi_dsi_controller_cfg(0);
mipi_dsi_op_mode_config(DSI_CMD_MODE);
}
exit:
return ret;
}
示例6: lcdc_on
static int lcdc_on(struct platform_device *pdev)
{
int ret = 0;
struct msm_fb_data_type *mfd;
unsigned long panel_pixclock_freq = 0;
#ifndef CONFIG_MSM_BUS_SCALING
unsigned long pm_qos_rate;
#endif
mfd = platform_get_drvdata(pdev);
if (lcdc_pdata && lcdc_pdata->lcdc_get_clk)
panel_pixclock_freq = lcdc_pdata->lcdc_get_clk();
if (!panel_pixclock_freq)
panel_pixclock_freq = mfd->fbi->var.pixclock;
#ifdef CONFIG_MSM_BUS_SCALING
mdp_bus_scale_update_request(2);
#else
if (panel_pixclock_freq > 65000000)
/* pm_qos_rate should be in Khz */
pm_qos_rate = panel_pixclock_freq / 1000 ;
else
pm_qos_rate = 65000;
if (mfd->ebi1_clk) {
if (mdp_rev == MDP_REV_303) {
if (clk_set_rate(mfd->ebi1_clk, 65000000))
pr_err("%s: ebi1_lcdc_clk set rate failed\n",
__func__);
} else {
clk_set_rate(mfd->ebi1_clk, pm_qos_rate * 1000);
}
clk_prepare_enable(mfd->ebi1_clk);
}
#endif
mfd = platform_get_drvdata(pdev);
mfd->fbi->var.pixclock = clk_round_rate(pixel_mdp_clk,
mfd->fbi->var.pixclock);
ret = clk_set_rate(pixel_mdp_clk, mfd->fbi->var.pixclock);
if (ret) {
pr_err("%s: Can't set MDP LCDC pixel clock to rate %u\n",
__func__, mfd->fbi->var.pixclock);
goto out;
}
clk_prepare_enable(pixel_mdp_clk);
clk_prepare_enable(pixel_lcdc_clk);
if (lcdc_pdata && lcdc_pdata->lcdc_power_save)
lcdc_pdata->lcdc_power_save(1);
if (lcdc_pdata && lcdc_pdata->lcdc_gpio_config)
ret = lcdc_pdata->lcdc_gpio_config(1);
ret = panel_next_on(pdev);
out:
return ret;
}
示例7: dtv_on
static int dtv_on(struct platform_device *pdev)
{
int ret = 0;
struct msm_fb_data_type *mfd;
unsigned long panel_pixclock_freq , pm_qos_rate;
mfd = platform_get_drvdata(pdev);
panel_pixclock_freq = mfd->fbi->var.pixclock;
if (panel_pixclock_freq > 58000000)
pm_qos_rate = panel_pixclock_freq / 1000 ;
else
pm_qos_rate = 58000;
mdp4_extn_disp = 1;
#ifdef CONFIG_MSM_BUS_SCALING
if (dtv_bus_scale_handle > 0)
msm_bus_scale_client_update_request(dtv_bus_scale_handle,
1);
#else
if (ebi1_clk) {
clk_set_rate(ebi1_clk, pm_qos_rate * 1000);
clk_prepare_enable(ebi1_clk);
}
#endif
if (dtv_pdata && dtv_pdata->lcdc_power_save)
dtv_pdata->lcdc_power_save(1);
if (dtv_pdata && dtv_pdata->lcdc_gpio_config)
ret = dtv_pdata->lcdc_gpio_config(1);
mfd = platform_get_drvdata(pdev);
ret = clk_set_rate(tv_src_clk, mfd->fbi->var.pixclock);
if (ret) {
pr_info("%s: clk_set_rate(%d) failed\n", __func__,
mfd->fbi->var.pixclock);
if (mfd->fbi->var.pixclock == 27030000)
mfd->fbi->var.pixclock = 27000000;
ret = clk_set_rate(tv_src_clk, mfd->fbi->var.pixclock);
}
pr_info("%s: tv_src_clk=%dkHz, pm_qos_rate=%ldkHz, [%d]\n", __func__,
mfd->fbi->var.pixclock/1000, pm_qos_rate, ret);
mfd->panel_info.clk_rate = mfd->fbi->var.pixclock;
#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT
while(atomic_read(&read_an_complete))
msleep(1);
#endif
clk_prepare_enable(hdmi_clk);
clk_reset(hdmi_clk, CLK_RESET_ASSERT);
udelay(20);
clk_reset(hdmi_clk, CLK_RESET_DEASSERT);
if (mdp_tv_clk)
clk_prepare_enable(mdp_tv_clk);
ret = panel_next_on(pdev);
return ret;
}
示例8: lcdc_on
static int lcdc_on(struct platform_device *pdev)
{
int ret = 0;
struct msm_fb_data_type *mfd;
unsigned long panel_pixclock_freq = 0;
#ifndef CONFIG_MSM_BUS_SCALING
unsigned long pm_qos_rate;
#endif
mfd = platform_get_drvdata(pdev);
if (lcdc_pdata && lcdc_pdata->lcdc_get_clk)
panel_pixclock_freq = lcdc_pdata->lcdc_get_clk();
if (!panel_pixclock_freq)
panel_pixclock_freq = mfd->fbi->var.pixclock;
#ifdef CONFIG_MSM_BUS_SCALING
mdp_bus_scale_update_request(2);
#else
#ifdef CONFIG_MSM_NPA_SYSTEM_BUS
pm_qos_rate = MSM_AXI_FLOW_MDP_LCDC_WVGA_2BPP;
#else
if (panel_pixclock_freq > 65000000)
/* pm_qos_rate should be in Khz */
pm_qos_rate = panel_pixclock_freq / 1000 ;
else
pm_qos_rate = 65000;
#endif
if (mfd->ebi1_clk) {
clk_set_rate(mfd->ebi1_clk, pm_qos_rate * 1000);
clk_enable(mfd->ebi1_clk);
}
#endif
mfd = platform_get_drvdata(pdev);
mfd->fbi->var.pixclock = clk_round_rate(pixel_mdp_clk,
mfd->fbi->var.pixclock);
ret = clk_set_rate(pixel_mdp_clk, mfd->fbi->var.pixclock);
if (ret) {
pr_err("%s: Can't set MDP LCDC pixel clock to rate %u\n",
__func__, mfd->fbi->var.pixclock);
goto out;
}
clk_enable(pixel_mdp_clk);
clk_enable(pixel_lcdc_clk);
pr_info("@[email protected]:DOTCLK clock enabled\n");
if (lcdc_pdata && lcdc_pdata->lcdc_power_save)
lcdc_pdata->lcdc_power_save(1);
if (lcdc_pdata && lcdc_pdata->lcdc_gpio_config)
ret = lcdc_pdata->lcdc_gpio_config(1);
ret = panel_next_on(pdev);
out:
return ret;
}
示例9: mdp4_dtv_on
int mdp4_dtv_on(struct platform_device *pdev)
{
struct msm_fb_data_type *mfd;
int ret = 0;
int cndx = 0;
struct vsycn_ctrl *vctrl;
vctrl = &vsync_ctrl_db[cndx];
mfd = (struct msm_fb_data_type *)platform_get_drvdata(pdev);
if (!mfd)
return -ENODEV;
if (mfd->key != MFD_KEY)
return -EINVAL;
vctrl->dev = mfd->fbi->dev;
#if 0
mdp_footswitch_ctrl(TRUE);
#endif
mdp_clk_ctrl(1);
mdp4_overlay_panel_mode(MDP4_MIXER1, MDP4_PANEL_DTV);
if (vctrl->base_pipe == NULL) {
if (mdp4_overlay_dtv_set(mfd, NULL)) {
pr_warn("%s: dtv_pipe is NULL, dtv_set failed\n",
__func__);
return -EINVAL;
}
}
ret = panel_next_on(pdev);
if (ret != 0)
pr_warn("%s: panel_next_on failed", __func__);
atomic_set(&vctrl->suspend, 0);
if (!vctrl->sysfs_created) {
ret = sysfs_create_group(&vctrl->dev->kobj,
&vsync_fs_attr_group);
if (ret) {
pr_err("%s: sysfs group creation failed, ret=%d\n",
__func__, ret);
return ret;
}
kobject_uevent(&vctrl->dev->kobj, KOBJ_ADD);
pr_debug("%s: kobject_uevent(KOBJ_ADD)\n", __func__);
vctrl->sysfs_created = 1;
}
pr_info("%s:\n", __func__);
return ret;
}
示例10: dtv_on
static int dtv_on(struct platform_device *pdev)
{
int ret = 0;
struct msm_fb_data_type *mfd;
unsigned long panel_pixclock_freq , pm_qos_rate;
/* If a power down is already underway, wait for it to finish */
flush_work_sync(&dtv_off_work);
mfd = platform_get_drvdata(pdev);
panel_pixclock_freq = mfd->fbi->var.pixclock;
if (panel_pixclock_freq > 58000000)
/* pm_qos_rate should be in Khz */
pm_qos_rate = panel_pixclock_freq / 1000 ;
else
pm_qos_rate = 58000;
mdp4_extn_disp = 1;
#ifdef CONFIG_MSM_BUS_SCALING
if (dtv_bus_scale_handle > 0)
msm_bus_scale_client_update_request(dtv_bus_scale_handle,
1);
#else
if (ebi1_clk) {
clk_set_rate(ebi1_clk, pm_qos_rate * 1000);
clk_prepare_enable(ebi1_clk);
}
#endif
if (dtv_pdata && dtv_pdata->lcdc_power_save)
dtv_pdata->lcdc_power_save(1);
if (dtv_pdata && dtv_pdata->lcdc_gpio_config)
ret = dtv_pdata->lcdc_gpio_config(1);
mfd = platform_get_drvdata(pdev);
ret = clk_set_rate(tv_src_clk, mfd->fbi->var.pixclock);
if (ret) {
pr_info("%s: clk_set_rate(%d) failed\n", __func__,
mfd->fbi->var.pixclock);
if (mfd->fbi->var.pixclock == 27030000)
mfd->fbi->var.pixclock = 27000000;
ret = clk_set_rate(tv_src_clk, mfd->fbi->var.pixclock);
}
pr_info("%s: tv_src_clk=%dkHz, pm_qos_rate=%ldkHz, [%d]\n", __func__,
mfd->fbi->var.pixclock/1000, pm_qos_rate, ret);
mfd->panel_info.clk_rate = mfd->fbi->var.pixclock;
clk_prepare_enable(hdmi_clk);
clk_reset(hdmi_clk, CLK_RESET_ASSERT);
udelay(20);
clk_reset(hdmi_clk, CLK_RESET_DEASSERT);
if (mdp_tv_clk)
clk_prepare_enable(mdp_tv_clk);
ret = panel_next_on(pdev);
return ret;
}
示例11: ebi2_lcd_on
static int ebi2_lcd_on(struct platform_device *pdev)
{
int ret;
if (ebi2_pdata && ebi2_pdata->lcdc_power_save)
ebi2_pdata->lcdc_power_save(1);
ret = panel_next_on(pdev);
return ret;
}
示例12: tvenc_on
static int tvenc_on(struct platform_device *pdev)
{
int ret = 0;
#ifndef CONFIG_MSM_BUS_SCALING
struct msm_fb_data_type *mfd = platform_get_drvdata(pdev);
#endif
#ifdef CONFIG_MSM_BUS_SCALING
if (tvenc_bus_scale_handle > 0)
msm_bus_scale_client_update_request(tvenc_bus_scale_handle,
1);
#else
if (mfd->ebi1_clk)
clk_enable(mfd->ebi1_clk);
#endif
mdp4_extn_disp = 1;
if (tvenc_pdata && tvenc_pdata->pm_vid_en)
ret = tvenc_pdata->pm_vid_en(1);
if (ret) {
pr_err("%s: pm_vid_en(on) failed! %d\n",
__func__, ret);
return ret;
}
ret = tvenc_set_clock(CLOCK_ON);
if (ret) {
pr_err("%s: tvenc_set_clock(CLOCK_ON) failed! %d\n",
__func__, ret);
tvenc_pdata->pm_vid_en(0);
goto error;
}
/* Enable TV_OUT ctl */
#ifdef CONFIG_HUAWEI_KERNEL
/* U8800 have tv_out function,only */
if(machine_is_msm7x30_u8800() || machine_is_msm7x30_u8800_51() || machine_is_msm8255_u8800_pro())
{
gpio_tlmm_config(GPIO_CFG(33, 0, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_2MA),GPIO_CFG_ENABLE);
gpio_set_value(33, 1);
}
#endif
ret = panel_next_on(pdev);
if (ret) {
pr_err("%s: tvout_on failed! %d\n",
__func__, ret);
tvenc_set_clock(CLOCK_OFF);
tvenc_pdata->pm_vid_en(0);
}
error:
return ret;
}
示例13: lcdc_on
static int lcdc_on(struct platform_device *pdev)
{
int ret = 0;
struct msm_fb_data_type *mfd;
unsigned long panel_pixclock_freq, pm_qos_rate;
mfd = platform_get_drvdata(pdev);
panel_pixclock_freq = mfd->fbi->var.pixclock;
#ifdef CONFIG_MSM_NPA_SYSTEM_BUS
pm_qos_rate = MSM_AXI_FLOW_MDP_LCDC_WVGA_2BPP;
#else
#ifdef CONFIG_HUAWEI_KERNEL
if (panel_pixclock_freq > 58000000)
/* pm_qos_rate should be in Khz */
pm_qos_rate = panel_pixclock_freq / 1000 ;
else
pm_qos_rate = 58000;
#else
if (panel_pixclock_freq > 65000000)
pm_qos_rate = panel_pixclock_freq / 1000 ;
else
pm_qos_rate = 65000;
#endif
#endif
pm_qos_update_requirement(PM_QOS_SYSTEM_BUS_FREQ , "lcdc",
pm_qos_rate);
mfd = platform_get_drvdata(pdev);
ret = clk_set_rate(pixel_mdp_clk, mfd->fbi->var.pixclock);
if (ret) {
pr_err("%s: Can't set MDP LCDC pixel clock to rate %u\n",
__func__, mfd->fbi->var.pixclock);
goto out;
}
clk_enable(pixel_mdp_clk);
clk_enable(pixel_lcdc_clk);
if (lcdc_pdata && lcdc_pdata->lcdc_power_save)
lcdc_pdata->lcdc_power_save(1);
if (lcdc_pdata && lcdc_pdata->lcdc_gpio_config)
ret = lcdc_pdata->lcdc_gpio_config(1);
ret = panel_next_on(pdev);
out:
return ret;
}
示例14: mdp_dma3_on
int mdp_dma3_on(struct platform_device *pdev)
{
struct msm_fb_data_type *mfd;
struct fb_info *fbi;
uint8 *buf;
int bpp;
int ret = 0;
mfd = (struct msm_fb_data_type *)platform_get_drvdata(pdev);
if (!mfd)
return -ENODEV;
if (mfd->key != MFD_KEY)
return -EINVAL;
fbi = mfd->fbi;
/* MDP cmd block enable */
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
bpp = fbi->var.bits_per_pixel / 8;
buf = (uint8 *) fbi->fix.smem_start;
buf += calc_fb_offset(mfd, fbi, bpp);
/* starting address[31..8] of Video frame buffer is CS0 */
MDP_OUTP(MDP_BASE + 0xC0008, (uint32) buf >> 3);
mdp_pipe_ctrl(MDP_DMA3_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
MDP_OUTP(MDP_BASE + 0xC0004, 0x4c60674); /* flicker filter enabled */
MDP_OUTP(MDP_BASE + 0xC0010, 0x20); /* sobel treshold */
MDP_OUTP(MDP_BASE + 0xC0018, 0xeb0010); /* Y Max, Y min */
MDP_OUTP(MDP_BASE + 0xC001C, 0xf00010); /* Cb Max, Cb min */
MDP_OUTP(MDP_BASE + 0xC0020, 0xf00010); /* Cb Max, Cb min */
MDP_OUTP(MDP_BASE + 0xC000C, 0x67686970); /* add a few chars for CC */
MDP_OUTP(MDP_BASE + 0xC0000, 0x1); /* MDP tv out enable */
/* MDP cmd block disable */
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
ret = panel_next_on(pdev);
return ret;
}
示例15: mdp4_dtv_on
int mdp4_dtv_on(struct platform_device *pdev)
{
struct msm_fb_data_type *mfd;
int ret = 0;
int cndx = 0;
struct vsycn_ctrl *vctrl;
vctrl = &vsync_ctrl_db[cndx];
mfd = (struct msm_fb_data_type *)platform_get_drvdata(pdev);
if (!mfd)
return -ENODEV;
if (mfd->key != MFD_KEY)
return -EINVAL;
vctrl->dev = mfd->fbi->dev;
#if 0
mdp_footswitch_ctrl(TRUE);
#endif
/* Mdp clock enable */
mdp_clk_ctrl(1);
mdp4_overlay_panel_mode(MDP4_MIXER1, MDP4_PANEL_DTV);
/* Allocate dtv_pipe at dtv_on*/
if (vctrl->base_pipe == NULL) {
if (mdp4_overlay_dtv_set(mfd, NULL)) {
pr_warn("%s: dtv_pipe is NULL, dtv_set failed\n",
__func__);
return -EINVAL;
}
}
ret = panel_next_on(pdev);
if (ret != 0)
pr_warn("%s: panel_next_on failed", __func__);
atomic_set(&vctrl->suspend, 0);
pr_info("%s:\n", __func__);
return ret;
}