C++ i2c_read_reg函数代码示例

void i2c_init_early(void)
{
	LTRACE_ENTRY;

	/* enable clocks on i2c 0-2 */
	RMWREG32(CM_FCLKEN1_CORE, 15, 3, 0x7),
	RMWREG32(CM_ICLKEN1_CORE, 15, 3, 0x7),

	i2c_reset_bus(0);
	i2c_reset_bus(1);
	i2c_reset_bus(2);

#if 0
	// write something into a reg
	char buf[2];
	i2c_write_reg(0, 0x4b, 0x14, 0x99);
	i2c_write_reg(0, 0x4b, 0x15, 0x98);

	i2c_read_reg(0, 0x4b, 0x15, buf);
	printf("0x%hhx\n", buf[0]);
	i2c_read_reg(0, 0x4b, 0x14, buf);
	printf("0x%hhx\n", buf[0]);

	int i;
	for (i=0; i < 255; i++) {
		char buf[1];
		buf[0] = i;
		i2c_transmit(0, 0x4b, buf, 1);
		i2c_receive(0, 0x4b, buf, sizeof(buf));
		printf("0x%hhx\n", buf[0]);
	}
#endif

	LTRACE_EXIT;
}

//PS enable function
int pa12201001_enable_ps(struct i2c_client *client, int enable)
{
  int res;
  u8 regdata=0;
  u8 sendvalue=0;
	
  if(enable == 1) //PS ON
  {
     printk("pa12201001 enable ps sensor\n");
     res=i2c_read_reg(client,REG_CFG0,&regdata); //Read Status
     if(res<0){
		APS_ERR("i2c_read function err\n");
		return res;
     }else{

     	//sendvalue=regdata & 0xFD; //clear bit
     	//sendvalue=sendvalue | 0x02; //0x02 PS Flag
     	sendvalue=regdata & 0xFC; //clear bit-0 & bit-1
     	sendvalue=sendvalue | 0x02; //0x02 PS On

     	res=i2c_write_reg(client,REG_CFG0,sendvalue); //Write PS enable 
     
    	 if(res<0){
		     APS_ERR("i2c_write function err\n");
		     return res;
          }	  		 	
         res=i2c_read_reg(client,REG_CFG0,&regdata); //Read Status
     	APS_LOG("CFG0 Status: %d\n",regdata);
      }
    }else{       //PS OFF
			
       printk("pa12201001 disable ps sensor\n");
       res=i2c_read_reg(client,REG_CFG0,&regdata); //Read Status
       if(res<0){
		  APS_ERR("i2c_read function err\n");
		  return res;
       }else{
          APS_LOG("CFG0 Status: %d\n",regdata);
		
          //sendvalue=regdata & 0xFD; //clear bit
          sendvalue=regdata & 0xFC; //clear bit-0 & bit-1
	res=i2c_write_reg(client,REG_CFG0,sendvalue); //Write PS disable 
		
          if(res<0){
		      APS_ERR("i2c_write function err\n");
			 return res;
		 }	  	
       }
     }
	
     return 0;
} 

static int
i2c_read(device_t dev, char *buf, int len, int *read, int last, int delay)
{
	struct i2c_softc *sc;
	int error, reg;

	sc = device_get_softc(dev);
	*read = 0;

	mtx_lock(&sc->mutex);

	if (len) {
		if (len == 1)
			i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
			    I2CCR_MSTA | I2CCR_TXAK);

		else
			i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
			    I2CCR_MSTA);

		/* dummy read */
		i2c_read_reg(sc, I2C_DATA_REG);
		DELAY(1000);
	}

	while (*read < len) {
		error = wait_for_icf(sc);
		if (error) {
			mtx_unlock(&sc->mutex);
			return (error);
		}
		i2c_write_reg(sc, I2C_STATUS_REG, 0x0);
		if ((*read == len - 2) && last) {
			/* NO ACK on last byte */
			i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
			    I2CCR_MSTA | I2CCR_TXAK);
		}

		if ((*read == len - 1) && last) {
			/* Transfer done, remove master bit */
			i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
			    I2CCR_TXAK);
		}

		reg = i2c_read_reg(sc, I2C_DATA_REG);
		*buf++ = reg;
		(*read)++;
	}
	mtx_unlock(&sc->mutex);

	return (IIC_NOERR);
}

int tsl2561_init(tsl2561_t *dev,
                 i2c_t i2c, uint8_t addr, uint8_t gain, uint8_t integration)
{
    dev->i2c_dev = i2c;
    dev->addr = addr;
    dev->gain = gain;
    dev->integration = integration;
    _print_init_info(dev);

    /* Initialize I2C interface */
    if (i2c_init_master(dev->i2c_dev, I2C_SPEED_NORMAL)) {
        DEBUG("[Error] I2C device not enabled\n");
        return TSL2561_NOI2C;
    }

    DEBUG("[Info] I2C device initialized with success!\n");

    /* Acquire exclusive access */
    i2c_acquire(dev->i2c_dev);

    DEBUG("[Info] Access acquired !\n");

    /* Verify sensor ID */
    uint8_t id;
    i2c_read_reg(dev->i2c_dev, dev->addr,
                 TSL2561_COMMAND_MODE | TSL2561_REGISTER_ID, &id);
    DEBUG("[Info] ID ? %d\n", id);
    if (id != TSL2561_ID ) {
        DEBUG("[Error] not a TSL2561 sensor\n");
        return TSL2561_BADDEV;
    }

    _enable(dev);

    /* configuring gain and integration time */
    i2c_write_reg(dev->i2c_dev, dev->addr,
                  TSL2561_COMMAND_MODE | TSL2561_REGISTER_TIMING,
                  dev->integration | dev->gain);

#if ENABLE_DEBUG
    uint8_t timing;
    i2c_read_reg(dev->i2c_dev, dev->addr,
                 TSL2561_COMMAND_MODE | TSL2561_REGISTER_TIMING, &timing);
    DEBUG("[Info] Timing ? %d (expected: %d)\n",
          timing, dev->integration | dev->gain);
#endif

    _disable(dev);

    return TSL2561_OK;
}

static int setup_pmic_voltages(void)
{
	unsigned char value, rev_id = 0 ;
	struct i2c_adapter *adapter = NULL;
	struct i2c_client client;
	int addr = -1, bus = 0;

	/* I2C2 bus (2-1 = 1 in barebox numbering) */
	bus = 1;

	/* PFUZE100 device address is 0x08 */
	addr = 0x08;

	adapter = i2c_get_adapter(bus);
	if (!adapter) {
		pr_err("i2c bus %d not found\n", bus);
		return -ENODEV;
	}

	client.adapter = adapter;
	client.addr = addr;

	/* Attempt to locate the PFUZE100 chip. */
	if (i2c_read_reg(&client, 0x00, &value, 1) != 1) {
		pr_err("Read device ID error!\n");
		return -1;
	}
	if (i2c_read_reg(&client, 0x03, &rev_id, 1) != 1) {
		pr_err("Read Rev ID error!\n");
		return -1;
	}

	pr_info("Found PFUZE100! deviceid=%x,revid=%x\n", value, rev_id);

	/* Set Gigabit Ethernet voltage (SOM v1.1/1.0)*/
        value = 0x60;
	if (i2c_write_reg(&client, 0x4a, &value, 1) != 1) {
		pr_err("Set ETH error!\n");
		return -EIO;
	}

	/* set VGEN3 to 2.5V */
	value = 0x77;
	if (i2c_write_reg(&client, 0x6e, &value, 1) != 1) {
		pr_err("Set VGEN3 error!\n");
		return -EIO;
	}

	return 0;
}

static int
i2c_read(device_t dev, char *buf, int len, int *read, int last, int delay)
{
	struct i2c_softc *sc;
	int error;

	sc = device_get_softc(dev);
	*read = 0;

	mtx_lock(&sc->mutex);
	if (len) {
		if (len == 1)
			i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
			    I2CCR_MSTA | I2CCR_TXAK);

		else
			i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
			    I2CCR_MSTA);

		/* dummy read */
		i2c_read_reg(sc, I2C_DATA_REG);
		DELAY(1000);
	}

	while (*read < len) {
		DELAY(1000);
		error = i2c_do_wait(dev, sc, 0, 0);
		if (error) {
			mtx_unlock(&sc->mutex);
			return (error);
		}
		if ((*read == len - 2) && last) {
			i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
			    I2CCR_MSTA | I2CCR_TXAK);
		}

		if ((*read == len - 1) && last) {
			i2c_write_reg(sc, I2C_CONTROL_REG,  I2CCR_MEN |
			    I2CCR_TXAK);
		}

		*buf++ = i2c_read_reg(sc, I2C_DATA_REG);
		(*read)++;
		DELAY(1250);
	}
	mtx_unlock(&sc->mutex);

	return (IIC_NOERR);
}

/* Wait for transfer to complete, optionally check RXAK. */
static int
wait_for_xfer(struct i2c_softc *sc, int checkack)
{
	int retry, sr;

	/*
	 * Sleep for about the time it takes to transfer a byte (with precision
	 * set to tolerate 5% oversleep).  We calculate the approximate byte
	 * transfer time when we set the bus speed divisor.  Slaves are allowed
	 * to do clock-stretching so the actual transfer time can be larger, but
	 * this gets the bulk of the waiting out of the way without tying up the
	 * processor the whole time.
	 */
	pause_sbt("imxi2c", sc->byte_time_sbt, sc->byte_time_sbt / 20, 0);

	retry = 10000;
	while (retry --) {
		sr = i2c_read_reg(sc, I2C_STATUS_REG);
		if (sr & I2CSR_MIF) {
                        if (sr & I2CSR_MAL) 
				return (IIC_EBUSERR);
			else if (checkack && (sr & I2CSR_RXAK))
				return (IIC_ENOACK);
			else
				return (IIC_NOERR);
		}
		DELAY(1);
	}
	return (IIC_ETIMEOUT);
}

static int
i2c_do_wait(device_t dev, struct i2c_softc *sc, int write, int start)
{
	int err;
	uint8_t status;

	status = i2c_read_reg(sc, I2C_STATUS_REG);
	if (status & I2CSR_MIF) {
		if (write && start && (status & I2CSR_RXAK)) {
			debugf("no ack %s", start ?
			    "after sending slave address" : "");
			err = IIC_ENOACK;
			goto error;
		}
		if (status & I2CSR_MAL) {
			debugf("arbitration lost");
			err = IIC_EBUSERR;
			goto error;
		}
		if (!write && !(status & I2CSR_MCF)) {
			debugf("transfer unfinished");
			err = IIC_EBUSERR;
			goto error;
		}
	}

	return (IIC_NOERR);

error:
	i2c_write_reg(sc, I2C_STATUS_REG, 0x0);
	i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN | I2CCR_TXAK);
	return (err);
}

static int cmd_i2c(int argc, const cmd_args *argv)
{
	int err;

	if (argc < 5) {
		printf("not enough arguments\n");
usage:
		printf("%s read_reg <bus> <i2c address> <register>\n", argv[0].str);
		printf("%s write_reg <bus> <i2c address> <register> <val>\n", argv[0].str);
		return -1;
	}

	int bus = argv[2].u;
	uint8_t i2c_address = argv[3].u;

	if (!strcmp(argv[1].str, "read_reg")) {
		uint8_t reg = argv[4].u;
		uint8_t val;

		err = i2c_read_reg(bus, i2c_address, reg, &val);
		printf("i2c_read_reg err %d, val 0x%hhx\n", err, val);
	} else if (!strcmp(argv[1].str, "write_reg")) {
		uint8_t reg = argv[4].u;
		uint8_t val = argv[5].u;
		err = i2c_write_reg(bus, i2c_address, reg, val);
		printf("i2c_write_reg err %d\n", err);
	} else {
		printf("unrecognized subcommand\n");
		goto usage;
	}

	return 0;
}

static int
i2c_start(device_t dev, u_char slave, int timeout)
{
	struct i2c_softc *sc;
	int error;

	sc = device_get_softc(dev);

	mtx_lock(&sc->mutex);
	i2c_write_reg(sc, I2C_ADDR_REG, slave);
	if (i2c_read_reg(sc, I2C_STATUS_REG) & I2CSR_MBB) {
		mtx_unlock(&sc->mutex);
		return (IIC_EBUSBSY);
	}

	/* Set start condition */
	i2c_write_reg(sc, I2C_CONTROL_REG,
	    I2CCR_MEN | I2CCR_MSTA | I2CCR_TXAK);
	DELAY(100);
	i2c_write_reg(sc, I2C_CONTROL_REG,
	    I2CCR_MEN | I2CCR_MSTA | I2CCR_MTX | I2CCR_TXAK);
	/* Clear status */
	i2c_write_reg(sc, I2C_STATUS_REG, 0x0);
	/* Write target address - LSB is R/W bit */
	i2c_write_reg(sc, I2C_DATA_REG, slave);

	error = wait_for_iif(sc);

	mtx_unlock(&sc->mutex);
	if (error)
		return (error);

	return (IIC_NOERR);
}

static int
i2c_start(device_t dev, u_char slave, int timeout)
{
	struct i2c_softc *sc;
	uint8_t status;
	int error;

	sc = device_get_softc(dev);
	DELAY(1000);

	mtx_lock(&sc->mutex);
	status = i2c_read_reg(sc, I2C_STATUS_REG);
	/* Check if bus is idle or busy */
	if (status & I2CSR_MBB) {
		debugf("bus busy");
		mtx_unlock(&sc->mutex);
		i2c_stop(dev);
		return (IIC_EBUSBSY);
	}

	/* Set start condition */
	i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN | I2CCR_MSTA | I2CCR_MTX);
	/* Write target address - LSB is R/W bit */
	i2c_write_reg(sc, I2C_DATA_REG, slave);
	DELAY(1250);

	error = i2c_do_wait(dev, sc, 1, 1);

	mtx_unlock(&sc->mutex);
	if (error)
		return (error);

	return (IIC_NOERR);
}

int srf02_init(srf02_t *dev, i2c_t i2c, uint8_t addr)
{
    dev->i2c = i2c;
    dev->addr = (addr >> 1);    /* internally we right align the 7-bit addr */
    uint8_t rev;

    /* Acquire exclusive access to the bus. */
    i2c_acquire(dev->i2c);
    /* initialize i2c interface */
    if (i2c_init_master(dev->i2c, BUS_SPEED) < 0) {
        DEBUG("[srf02] error initializing I2C bus\n");
        return -1;
    }
    /* try to read the software revision (read the CMD reg) from the device */
    i2c_read_reg(i2c, dev->addr, REG_CMD, &rev);
    if (rev == 0 || rev == 255) {
        i2c_release(dev->i2c);
        DEBUG("[srf02] error reading the devices software revision\n");
        return -1;
    } else {
        DEBUG("[srf02] software revision: 0x%02x\n", rev);
    }
    /* Release the bus for other threads. */
    i2c_release(dev->i2c);

    DEBUG("[srf02] initialization successful\n");
    return 0;
}

BAREBOX_CMD_END

static int do_i2c_read(int argc, char *argv[])
{
	struct i2c_adapter *adapter = NULL;
	struct i2c_client client;
	u8 *buf;
	int count = -1, addr = -1, reg = -1, verbose = 0, ret, opt, bus = 0, wide = 0;

	while ((opt = getopt(argc, argv, "a:b:c:r:v:w")) > 0) {
		switch (opt) {
		case 'a':
			addr = simple_strtol(optarg, NULL, 0);
			break;
		case 'c':
			count = simple_strtoul(optarg, NULL, 0);
			break;
		case 'b':
			bus = simple_strtoul(optarg, NULL, 0);
			break;
		case 'r':
			reg = simple_strtol(optarg, NULL, 0);
			break;
		case 'v':
			verbose = 1;
			break;
		case 'w':
			wide = 1;
			break;
		}
	}

	if ((addr < 0) || (reg < 0) || (count < 1) || (addr > 0x7F))
		return COMMAND_ERROR_USAGE;

	adapter = i2c_get_adapter(bus);
	if (!adapter) {
		printf("i2c bus %d not found\n", bus);
		return -ENODEV;
	}

	client.adapter = adapter;
	client.addr = addr;

	buf = xmalloc(count);
	ret = i2c_read_reg(&client, reg | (wide ? I2C_ADDR_16_BIT : 0), buf, count);
	if (ret == count) {
		int i;
		if (verbose)
			printf("read %i bytes starting at reg 0x%04x from i2cdev 0x%02x on bus %i\n",
				count, reg, addr, adapter->nr);
		for (i = 0; i < count; i++)
			printf("0x%02x ", *(buf + i));
		printf("\n");
		ret = 0;
	}

	free(buf);
	return ret;
}

static ssize_t txc_als_data_show(struct device *dev, struct device_attribute *attr,
	char *buf)
{
	struct i2c_client *client = to_i2c_client(dev);
	int ret;
	u8 msb, lsb;
	u16 als_data;
	    
	ret = i2c_read_reg(client, REG_ALS_DATA_LSB, &lsb); 
	ret = i2c_read_reg(client, REG_ALS_DATA_MSB, &msb);

	als_data = (msb << 8) | lsb;
	printk("als data is %d \n", als_data);

	return sprintf(buf, "%d\n", als_data);
}

static void set_ps_work_mode(struct i2c_client *client)
{
    int ret = 0;
    u8 data = 0;

    ret = i2c_read_reg(client, REG_CFG2, &data);
    ret = i2c_write_reg(client, REG_CFG2, data | PA12_INT_PS);
}