C++ early_serial_setup函数代码示例

static void __init ppc7d_early_serial_map(void)
{
#if defined(CONFIG_SERIAL_MPSC_CONSOLE)
	mv64x60_progress_init(CONFIG_MV64X60_NEW_BASE);
#elif defined(CONFIG_SERIAL_8250)
	struct uart_port serial_req;

	/* Setup serial port access */
	memset(&serial_req, 0, sizeof(serial_req));
	serial_req.uartclk = UART_CLK;
	serial_req.irq = 4;
	serial_req.flags = STD_COM_FLAGS;
	serial_req.iotype = UPIO_MEM;
	serial_req.membase = (u_char *) PPC7D_SERIAL_0;

	gen550_init(0, &serial_req);
	if (early_serial_setup(&serial_req) != 0)
		printk(KERN_ERR "Early serial init of port 0 failed\n");

	/* Assume early_serial_setup() doesn't modify serial_req */
	serial_req.line = 1;
	serial_req.irq = 3;
	serial_req.membase = (u_char *) PPC7D_SERIAL_1;

	gen550_init(1, &serial_req);
	if (early_serial_setup(&serial_req) != 0)
		printk(KERN_ERR "Early serial init of port 1 failed\n");
#else
#error CONFIG_KGDB || CONFIG_SERIAL_TEXT_DEBUG has no supported CONFIG_SERIAL_XXX
#endif
}

static void __init jz_serial_setup(void)
{
#ifdef CONFIG_SERIAL_8250
	struct uart_port s;
	REG8(UART0_FCR) |= UARTFCR_UUE; /* enable UART module */
	memset(&s, 0, sizeof(s));
	s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
	s.iotype = SERIAL_IO_MEM;
	s.regshift = 2;
	s.uartclk = jz4740_clock_bdata.ext_rate;

	s.line = 0;
	s.membase = (u8 *)UART0_BASE;
	s.irq = JZ_IRQ_UART0;
	if (early_serial_setup(&s) != 0) {
		printk(KERN_ERR "Serial ttyS0 setup failed!\n");
	}

	s.line = 1;
	s.membase = (u8 *)UART1_BASE;
	s.irq = JZ_IRQ_UART1;
	if (early_serial_setup(&s) != 0) {
		printk(KERN_ERR "Serial ttyS1 setup failed!\n");
	}
#endif
}

static void __init ixdp2x01_map_io(void)
{
	ixp2000_map_io();	

	iotable_init(&ixdp2x01_io_desc, 1);

	early_serial_setup(&ixdp2x01_serial_ports[0]);
	early_serial_setup(&ixdp2x01_serial_ports[1]);
}

void __init serial_init(void)
{

#ifdef CONFIG_SERIAL_8250
    struct uart_port s, u, k;

    memset(&s, 0, sizeof(s));
    s.type = PORT_16550;
    s.iobase = 0xFD201300; //virtual RIU_BASE = 0xFD000000
    s.irq = E_IRQ_UART0;

#ifdef CONFIG_MSTAR_ARM_BD_FPGA
    s.uartclk = 12000000; //FPGA
#elif defined(CONFIG_MSTAR_ARM_BD_GENERIC)
    s.uartclk = 123000000; //real chip
#endif
    s.iotype = 0;
    s.regshift = 0;
    s.fifosize = 16 ; // use the 8 byte depth FIFO well
    s.line = 0;

    if (early_serial_setup(&s) != 0) {
        printk(KERN_ERR "Serial(0) setup failed!\n");
    }
	memset(&u, 0, sizeof(u));
	u.type = PORT_16550;
	u.iobase = 0xFD220C00;
	u.irq = E_IRQEXPL_UART1;
	u.uartclk = 108000000;
	u.iotype = 0;
	u.regshift = 0;
	u.fifosize = 16 ; // use the 8 byte depth FIFO well
	u.line = 1;

	if (early_serial_setup(&u) != 0) {
		printk(KERN_ERR "Serial piu_uart1 setup failed!\n");
	}

	memset(&k, 0, sizeof(k));
	k.type = PORT_16550;
	k.iobase = 0xFD220D00;
	k.irq = E_IRQEXPH_UART2MCU;
	k.uartclk = 123000000;
	k.iotype = 0;
	k.regshift = 0;
	k.fifosize = 16 ; // use the 8 byte depth FIFO well
	k.line = 2;

	if (early_serial_setup(&k) != 0) {
		printk(KERN_ERR "Serial fuart setup failed!\n");
	}
#endif
}

static void __init ixdp2x01_map_io(void)
{
	ixp2000_map_io();	

	iotable_init(&ixdp2x01_io_desc, 1);

	early_serial_setup(&ixdp2x01_serial_ports[0]);
	early_serial_setup(&ixdp2x01_serial_ports[1]);

#ifdef CONFIG_KGDB_8250
	kgdb8250_add_port(0, &ixdp2x01_serial_ports[0]);
	kgdb8250_add_port(1, &ixdp2x01_serial_ports[1]);
#endif
}

void __init serial_init(void)
{

#ifdef CONFIG_SERIAL_8250
    struct uart_port s;
    struct uart_port u1;

    memset(&s, 0, sizeof(s));
    s.type = PORT_16550;
    s.iobase = 0xFD201300; //virtual RIU_BASE = 0xFD000000
    s.membase = (unsigned char __iomem *) 0xFD201300;
    s.mapbase = 0xFD201300;
    s.irq = E_IRQ_UART0;

#ifdef CONFIG_MSTAR_EAGLE_BD_FPGA
    s.uartclk = 12000000; //FPGA
#else
    s.uartclk = 123000000; //real chip
#endif
    s.iotype = 0;
    s.regshift = 0;
    s.fifosize = 16 ; // use the 8 byte depth FIFO well
    s.line = 0;

    if (early_serial_setup(&s) != 0) {
        printk(KERN_ERR "Serial(0) setup failed!\n");
    }

    //UART1
    memset(&u1, 0, sizeof(u1));
    u1.type = PORT_16550;
    u1.iobase = 0xFD220c00; //virtual RIU_BASE = 0xFD000000
    u1.membase = (unsigned char __iomem *) 0xFD220c00;
    u1.mapbase = 0xFD220c00;
    u1.irq = E_IRQEXPL_UART1;

    u1.uartclk = 123000000; //real chip

    u1.iotype = 0;
    u1.regshift = 0;
    u1.fifosize = 16 ; // use the 8 byte depth FIFO well
    u1.line = 1;

    if (early_serial_setup(&u1) != 0) {
        printk(KERN_ERR "Serial(0) uart1 setup failed!\n");
    }
#endif

}

static void __init
luan_early_serial_map(void)
{
	struct uart_port port;

	/* Setup ioremapped serial port access */
	memset(&port, 0, sizeof(port));
	port.membase = ioremap64(PPC440SP_UART0_ADDR, 8);
	port.irq = UART0_INT;
	port.uartclk = clocks.uart0;
	port.regshift = 0;
	port.iotype = SERIAL_IO_MEM;
	port.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
	port.line = 0;

	if (early_serial_setup(&port) != 0) {
		printk("Early serial init of port 0 failed\n");
	}
#ifdef CONFIG_KGDB_8250
	kgdb8250_add_port(0, &port);
#endif

	port.membase = ioremap64(PPC440SP_UART1_ADDR, 8);
	port.irq = UART1_INT;
	port.uartclk = clocks.uart1;
	port.line = 1;

	if (early_serial_setup(&port) != 0) {
		printk("Early serial init of port 1 failed\n");
	}
#ifdef CONFIG_KGDB_8250
	kgdb8250_add_port(1, &port);
#endif

	/* Enable UART2 */
	SDR_WRITE(DCRN_SDR_PFC1, SDR_READ(DCRN_SDR_PFC1) | 0x01000000);

	port.membase = ioremap64(PPC440SP_UART2_ADDR, 8);
	port.irq = UART2_INT;
	port.uartclk = clocks.uart2;
	port.line = 2;

	if (early_serial_setup(&port) != 0) {
		printk("Early serial init of port 2 failed\n");
	}
#ifdef CONFIG_KGDB_8250
	kgdb8250_add_port(2, &port);
#endif
}

static int __init excite_init_console(void)
{
#if defined(CONFIG_SERIAL_8250)
	static __initdata char serr[] =
		KERN_ERR "Serial port #%u setup failed\n";
	struct uart_port up;

	/* Take the DUART out of reset */
	titan_writel(0x00ff1cff, CPRR);

#if defined(CONFIG_KGDB) || (CONFIG_SERIAL_8250_NR_UARTS > 1)
	/* Enable both ports */
	titan_writel(MASK_SER0 | MASK_SER1, UACFG);
#else
	/* Enable port #0 only */
	titan_writel(MASK_SER0, UACFG);
#endif	/* defined(CONFIG_KGDB) */

 	/*
	 * Set up serial port #0. Do not use autodetection; the result is
	 * not what we want.
 	 */
	memset(&up, 0, sizeof(up));
	up.membase	= (char *) titan_addr(REGBASE_SER0);
	up.irq		= TITAN_IRQ;
	up.uartclk	= TITAN_UART_CLK;
	up.regshift	= 0;
	up.iotype	= UPIO_RM9000;
	up.type		= PORT_RM9000;
	up.flags	= UPF_SHARE_IRQ;
	up.line		= 0;
	if (early_serial_setup(&up))
		printk(serr, up.line);

#if CONFIG_SERIAL_8250_NR_UARTS > 1
	/* And now for port #1. */
	up.membase	= (char *) titan_addr(REGBASE_SER1);
	up.line		= 1;
 	if (early_serial_setup(&up))
		printk(serr, up.line);
#endif /* CONFIG_SERIAL_8250_NR_UARTS > 1 */
#else
	/* Leave the DUART in reset */
	titan_writel(0x00ff3cff, CPRR);
#endif  /* defined(CONFIG_SERIAL_8250) */

	return 0;
}

static void
do_serial_add(serial_port *port)
{
        void *regs;
        uint irq;
        uint baud_base;
        uint reg_shift;
        struct serial_struct s;
        
        regs = port->regs;
        irq = port->irq;
        baud_base = port->baud_base;
        reg_shift = port->reg_shift;

        memset(&s, 0, sizeof(s));

        s.line = ser_line++;
        s.iomem_base = regs;
        s.irq = irq + 2;
        s.baud_base = baud_base / 16;
        s.flags = ASYNC_BOOT_AUTOCONF;
        s.io_type = SERIAL_IO_MEM;
        s.iomem_reg_shift = reg_shift;

        if (early_serial_setup(&s) != 0) {
                printk(KERN_ERR "Serial setup failed!\n");
        }
}

void __init bsp_serial_init(void)
{
	struct uart_port s;

	/* clear memory */
	memset(&s, 0, sizeof(s));

    /*
     * UART0
     */
	s.line = 0;
    s.type = PORT_16550A;
    s.irq = BSP_UART0_IRQ;
    s.iotype = UPIO_MEM;
    s.regshift = 2;
#if 1
	s.uartclk = BSP_SYS_CLK_RATE;
    s.fifosize = 16;
	s.flags = UPF_SKIP_TEST | UPF_LOW_LATENCY;
	s.mapbase = BSP_UART0_MAP_BASE;
	//s.membase = ioremap_nocache(s.mapbase, BSP_UART0_MAPSIZE);
	s.membase = ioremap_nocache(s.mapbase, 0x20);
#else
	s.uartclk = BSP_SYS_CLK_RATE - BSP_BAUDRATE * 24; //???
    s.fifosize = 1;                           //???
    s.flags = UPF_SKIP_TEST | UPF_LOW_LATENCY | UPF_SPD_CUST;
    s.membase = (unsigned char *)BSP_UART0_BASE;
    s.custom_divisor = BSP_SYS_CLK_RATE / (BSP_BAUDRATE * 16) - 1;
#endif

	if (early_serial_setup(&s) != 0) {
		panic("RTL8196B: bsp_serial_init failed!");
	}
}

/*
 * UART
 */
static void __init cns3420_early_serial_setup(void)
{
#ifdef CONFIG_SERIAL_8250_CONSOLE
	static struct uart_port cns3420_serial_port = {
		.membase        = (void __iomem *)CNS3XXX_UART0_BASE_VIRT,
		.mapbase        = CNS3XXX_UART0_BASE,
		.irq            = IRQ_CNS3XXX_UART0,
		.iotype         = UPIO_MEM,
		.flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
		.regshift       = 2,
		.uartclk        = 24000000,
		.line           = 0,
		.type           = PORT_16550A,
		.fifosize       = 16,
	};

	early_serial_setup(&cns3420_serial_port);
#endif
}

/*
 * Initialization
 */
static struct platform_device *cns3420_pdevs[] __initdata = {
	&cns3420_nor_pdev,
};

static void __init cns3420_init(void)
{
	platform_add_devices(cns3420_pdevs, ARRAY_SIZE(cns3420_pdevs));

	pm_power_off = cns3xxx_power_off;
}

/*
 * UART
 */
static void __init cns3420_early_serial_setup(void)
{
#ifdef CONFIG_SERIAL_8250_CONSOLE
	static struct uart_port cns3420_serial_port = {
		.membase        = (void __iomem *)CNS3XXX_UART0_BASE_VIRT,
		.mapbase        = CNS3XXX_UART0_BASE,
		.irq            = IRQ_CNS3XXX_UART0,
		.iotype         = UPIO_MEM,
		.flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
		.regshift       = 2,
		.uartclk        = 24000000,
		.line           = 0,
		.type           = PORT_16550A,
		.fifosize       = 16,
	};

	early_serial_setup(&cns3420_serial_port);
#endif
}

/*
 * USB
 */
static struct resource cns3xxx_usb_ehci_resources[] = {
	[0] = {
		.start = CNS3XXX_USB_BASE,
		.end   = CNS3XXX_USB_BASE + SZ_16M - 1,
		.flags = IORESOURCE_MEM,
	},

void __init ixp2000_map_io(void)
{
	extern unsigned int processor_id;

	/*
	 * On IXP2400 CPUs we need to use MT_IXP2000_DEVICE for
	 * tweaking the PMDs so XCB=101. On IXP2800s we use the normal
	 * PMD flags.
	 */
	if ((processor_id & 0xfffffff0) == 0x69054190) {
		int i;

		printk(KERN_INFO "Enabling IXP2400 erratum #66 workaround\n");

		for(i=0;i<ARRAY_SIZE(ixp2000_io_desc);i++)
			ixp2000_io_desc[i].type = MT_IXP2000_DEVICE;
	}

	iotable_init(ixp2000_io_desc, ARRAY_SIZE(ixp2000_io_desc));
	early_serial_setup(&ixp2000_serial_port);

#ifdef CONFIG_KGDB_8250
	kgdb8250_add_port(0, &ixp2000_serial_port);
#endif

	/* Set slowport to 8-bit mode.  */
	ixp2000_reg_write(IXP2000_SLOWPORT_FRM, 1);
}

void __init str9100_map_io(void)
{
	iotable_init(str9100_std_desc, ARRAY_SIZE(str9100_std_desc));
	str9100_register_map_desc(str9100_std_desc, ARRAY_SIZE(str9100_std_desc));
#ifdef EARLY_REGISTER_CONSOLE
	early_serial_setup(&str9100_serial_ports[0]);
#endif
}

static void __init
yosemite_early_serial_map(void)
{
	struct uart_port port;

	/* Setup ioremapped serial port access */
	memset(&port, 0, sizeof(port));
	port.mapbase = PPC440EP_UART0_ADDR;
	port.membase = ioremap64(PPC440EP_UART0_ADDR, 8);
	port.irq = 0;
	port.uartclk = clocks.uart0;
	port.regshift = 0;
	port.iotype = SERIAL_IO_MEM;
	port.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
	port.line = 0;

	if (early_serial_setup(&port) != 0) {
		printk("Early serial init of port 0 failed\n");
	}

#if defined(CONFIG_SERIAL_TEXT_DEBUG)
	/* Configure debug serial access */
	gen550_init(0, &port);
#endif
#ifdef CONFIG_KGDB_8250
	kgdb8250_add_port(0, &port);
#endif

	port.mapbase = PPC440EP_UART1_ADDR;
	port.membase = ioremap64(PPC440EP_UART1_ADDR, 8);
	port.irq = 1;
	port.uartclk = clocks.uart1;
	port.line = 1;

	if (early_serial_setup(&port) != 0) {
		printk("Early serial init of port 1 failed\n");
	}

#if defined(CONFIG_SERIAL_TEXT_DEBUG)
	/* Configure debug serial access */
	gen550_init(1, &port);
#endif
#ifdef CONFIG_KGDB_8250
	kgdb8250_add_port(1, &port);
#endif
}