本文整理汇总了C++中dma_wrreg函数的典型用法代码示例。如果您正苦于以下问题:C++ dma_wrreg函数的具体用法?C++ dma_wrreg怎么用?C++ dma_wrreg使用的例子?那么恭喜您, 这里精选的函数代码示例或许可以为您提供帮助。
在下文中一共展示了dma_wrreg函数的15个代码示例,这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞,您的评价将有助于系统推荐出更棒的C++代码示例。
示例1: s3c2410_dma_dostop
static int s3c2410_dma_dostop(s3c2410_dma_chan_t *chan)
{
unsigned long tmp;
unsigned long flags;
pr_debug("%s:\n", __FUNCTION__);
dbg_showchan(chan);
local_irq_save(flags);
s3c2410_dma_call_op(chan, S3C2410_DMAOP_STOP);
tmp = dma_rdreg(chan, S3C2410_DMA_DMASKTRIG);
tmp |= S3C2410_DMASKTRIG_STOP;
dma_wrreg(chan, S3C2410_DMA_DMASKTRIG, tmp);
#if 0
/* should also clear interrupts, according to WinCE BSP */
tmp = dma_rdreg(chan, S3C2410_DMA_DCON);
tmp |= S3C2410_DCON_NORELOAD;
dma_wrreg(chan, S3C2410_DMA_DCON, tmp);
#endif
chan->state = S3C2410_DMA_IDLE;
chan->load_state = S3C2410_DMALOAD_NONE;
local_irq_restore(flags);
return 0;
}
示例2: s3c2410_dma_dostop
static int s3c2410_dma_dostop(struct s3c2410_dma_chan *chan)
{
unsigned long flags;
unsigned long tmp;
pr_debug("%s:\n", __func__);
dbg_showchan(chan);
local_irq_save(flags);
s3c2410_dma_call_op(chan, S3C2410_DMAOP_STOP);
tmp = dma_rdreg(chan, S3C2410_DMA_DMASKTRIG);
tmp |= S3C2410_DMASKTRIG_STOP;
//tmp &= ~S3C2410_DMASKTRIG_ON;
dma_wrreg(chan, S3C2410_DMA_DMASKTRIG, tmp);
#if 0
/* should also clear interrupts, according to WinCE BSP */
tmp = dma_rdreg(chan, S3C2410_DMA_DCON);
tmp |= S3C2410_DCON_NORELOAD;
dma_wrreg(chan, S3C2410_DMA_DCON, tmp);
#endif
/* should stop do this, or should we wait for flush? */
chan->state = S3C2410_DMA_IDLE;
chan->load_state = S3C2410_DMALOAD_NONE;
local_irq_restore(flags);
return 0;
}
示例3: s3c_dma_loadbuffer
/* s3c_dma_loadbuffer
*
* load a buffer, and update the channel state
*/
static inline int s3c_dma_loadbuffer(struct s3c2410_dma_chan *chan,
struct s3c_dma_buf *buf)
{
unsigned long reload;
pr_debug("s3c_chan_loadbuffer: loading buffer %p (0x%08lx,0x%06x)\n",
buf, (unsigned long) buf->data, buf->size);
if (buf == NULL) {
dmawarn("buffer is NULL\n");
return -EINVAL;
}
/* check the state of the channel before we do anything */
if (chan->load_state == S3C_DMALOAD_1LOADED) {
dmawarn("load_state is S3C2410_DMALOAD_1LOADED\n");
reload = (buf->next == NULL) ? S3C2410_DCON_NORELOAD : 0;
}
if (chan->load_state == S3C_DMALOAD_1LOADED_1RUNNING) {
dmawarn("state is S3C2410_DMALOAD_1LOADED_1RUNNING\n");
reload = S3C2410_DCON_AUTORELOAD;
}
writel(buf->data, chan->addr_reg);
pr_debug("%s: DMA control0 - %08x\n", __FUNCTION__, chan->dcon);
pr_debug("%s: DMA control1 - %08x\n", __FUNCTION__, (buf->size / chan->xfer_unit));
dma_wrreg(chan, S3C_DMAC_CxCONTROL0, chan->dcon);
dma_wrreg(chan, S3C_DMAC_CxCONTROL1, (buf->size / chan->xfer_unit));
chan->next = buf->next;
/* update the state of the channel */
switch (chan->load_state) {
case S3C_DMALOAD_NONE:
chan->load_state = S3C_DMALOAD_1LOADED;
break;
case S3C_DMALOAD_1RUNNING:
chan->load_state = S3C_DMALOAD_1LOADED_1RUNNING;
break;
default:
dmawarn("dmaload: unknown state %d in loadbuffer\n", chan->load_state);
break;
}
return 0;
}
示例4: s3c_clear_interrupts
void s3c_clear_interrupts (int dcon_num, int channel)
{
unsigned long tmp;
s3c_dma_controller_t *dma_controller = &s3c_dma_cntlrs[dcon_num];
tmp = dma_rdreg(dma_controller, S3C_DMAC_INT_TCCLEAR);
tmp |= (1 << channel);
dma_wrreg(dma_controller, S3C_DMAC_INT_TCCLEAR, tmp);
tmp = dma_rdreg(dma_controller, S3C_DMAC_INT_ERRORCLEAR);
tmp |= (1 << channel);
dma_wrreg(dma_controller, S3C_DMAC_INT_ERRORCLEAR, tmp);
}
示例5: s3c_dma_dostop
static int s3c_dma_dostop(struct s3c2410_dma_chan *chan)
{
unsigned long tmp;
unsigned long flags;
pr_debug("%s: DMA Channel No : %d\n", __FUNCTION__, chan->number);
dbg_showchan(chan);
local_irq_save(flags);
s3c_dma_flush_fifo(chan);
s3c_dma_call_op(chan, S3C2410_DMAOP_STOP);
tmp = dma_rdreg(chan, S3C_DMAC_CxCONFIGURATION);
tmp &= ~S3C_DMACONFIG_CHANNEL_ENABLE;
dma_wrreg(chan, S3C_DMAC_CxCONFIGURATION, tmp);
pr_debug("%s: S3C_DMAC_CxCONFIGURATION : %08x\n", __FUNCTION__, tmp);
chan->state = S3C_DMA_IDLE;
chan->load_state = S3C_DMALOAD_NONE;
local_irq_restore(flags);
return 0;
}
示例6: s3c2410_dma_lastxfer
static inline void
s3c2410_dma_lastxfer(s3c2410_dma_chan_t *chan)
{
pr_debug("dma%d: s3c2410_dma_lastxfer: load_state %d\n",
chan->number, chan->load_state);
switch (chan->load_state) {
case S3C2410_DMALOAD_NONE:
break;
case S3C2410_DMALOAD_1LOADED:
if (s3c2410_dma_waitforload(chan, __LINE__) == 0) {
/* flag error? */
printk(KERN_ERR "dma%d: timeout waiting for load\n",
chan->number);
return;
}
break;
default:
pr_debug("dma%d: lastxfer: unhandled load_state %d with no next",
chan->number, chan->load_state);
return;
}
/* hopefully this'll shut the damned thing up after the transfer... */
dma_wrreg(chan, S3C2410_DMA_DCON, chan->dcon | S3C2410_DCON_NORELOAD);
}
示例7: s3c_dma_dostop
static int s3c_dma_dostop(struct s3c2410_dma_chan *chan)
{
unsigned long tmp;
unsigned long flags;
pr_debug("%s: DMA Channel No : %d\n", __FUNCTION__, chan->number);
dbg_showchan(chan);
local_irq_save(flags);
//Commenting out this function call(as its causing freeze) and even without this it adheres to
//ARM Primecell 080's disabling a DMA channel and losing data in the FIFO method
//s3c_dma_flush_fifo(chan);
s3c_dma_call_op(chan, S3C2410_DMAOP_STOP);
tmp = dma_rdreg(chan, S3C_DMAC_CxCONFIGURATION);
tmp &= ~S3C_DMACONFIG_CHANNEL_ENABLE;
dma_wrreg(chan, S3C_DMAC_CxCONFIGURATION, tmp);
pr_debug("%s: S3C_DMAC_CxCONFIGURATION : %08x\n", __FUNCTION__, tmp);
chan->state = S3C_DMA_IDLE;
chan->load_state = S3C_DMALOAD_NONE;
local_irq_restore(flags);
return 0;
}
示例8: s3c2410_dma_lastxfer
static inline void
s3c2410_dma_lastxfer(struct s3c2410_dma_chan *chan)
{
switch (chan->load_state) {
case S3C2410_DMALOAD_NONE:
break;
case S3C2410_DMALOAD_1LOADED:
if (s3c2410_dma_waitforload(chan, __LINE__) == 0) {
/* flag error? */
printk(KERN_ERR "dma%d: timeout waiting for load (%s)\n",
chan->number, __func__);
return;
}
break;
case S3C2410_DMALOAD_1LOADED_1RUNNING:
/* I belive in this case we do not have anything to do
* until the next buffer comes along, and we turn off the
* reload */
return;
default:
pr_debug("dma%d: lastxfer: unhandled load_state %d with no next\n",
chan->number, chan->load_state);
return;
}
/* hopefully this'll shut the damned thing up after the transfer... */
dma_wrreg(chan, S3C2410_DMA_DCON, chan->dcon | S3C2410_DCON_NORELOAD);
}
示例9: s3c_disable_dmac
void s3c_disable_dmac(unsigned int dcon_num)
{
unsigned long tmp;
s3c_dma_controller_t *dma_controller = &s3c_dma_cntlrs[dcon_num];
tmp = dma_rdreg(dma_controller, S3C_DMAC_CONFIGURATION);
tmp &= ~S3C_DMA_CONTROLLER_ENABLE;
dma_wrreg(dma_controller, S3C_DMAC_CONFIGURATION, tmp);
}
示例10: dma_test
void dma_test (int dcon_num, int channel)
{
int tmp;
s3c_dma_controller_t *dma_controller = &s3c_dma_cntlrs[dcon_num];
dma_wrreg(dma_controller, S3C_DMAC_CONFIGURATION, S3C_DMA_CONTROLLER_ENABLE);
tmp = dma_rdreg(dma_controller, S3C_DMAC_CONFIGURATION);
printk("reg val %d\n", tmp);
dma_wrreg(dma_controller, S3C_DMAC_CCONFIGURATION(channel), 0x01);
tmp = dma_rdreg(dma_controller, S3C_DMAC_CCONFIGURATION(channel));
printk("reg conf %x\n", tmp);
dma_wrreg(dma_controller, S3C_DMAC_CCONTROL0(channel), 0x8ff02064);
tmp = dma_rdreg(dma_controller, S3C_DMAC_CCONTROL0(channel));
printk("reg ctrl %x\n", tmp);
}
示例11: s3c2410_dma_flush
static int s3c2410_dma_flush(struct s3c2410_dma_chan *chan)
{
struct s3c2410_dma_buf *buf, *next;
unsigned long flags;
pr_debug("%s: chan %p (%d)\n", __func__, chan, chan->number);
dbg_showchan(chan);
local_irq_save(flags);
if (chan->state != S3C2410_DMA_IDLE) {
pr_debug("%s: stopping channel...\n", __func__ );
s3c2410_dma_ctrl(chan->number, S3C2410_DMAOP_STOP);
}
buf = chan->curr;
if (buf == NULL)
buf = chan->next;
chan->curr = chan->next = chan->end = NULL;
if (buf != NULL) {
for ( ; buf != NULL; buf = next) {
next = buf->next;
pr_debug("%s: free buffer %p, next %p\n",
__func__, buf, buf->next);
s3c2410_dma_buffdone(chan, buf, S3C2410_RES_ABORT);
s3c2410_dma_freebuf(buf);
}
}
dbg_showregs(chan);
s3c2410_dma_waitforstop(chan);
#if 0
/* should also clear interrupts, according to WinCE BSP */
{
unsigned long tmp;
tmp = dma_rdreg(chan, S3C2410_DMA_DCON);
tmp |= S3C2410_DCON_NORELOAD;
dma_wrreg(chan, S3C2410_DMA_DCON, tmp);
}
#endif
dbg_showregs(chan);
local_irq_restore(flags);
return 0;
}
示例12: s3c_dma_start
/* s3c_dma_start
*
* start a dma channel going
*/
static int s3c_dma_start(struct s3c2410_dma_chan *chan)
{
unsigned long flags;
pr_debug("s3c_start_dma: channel number=%d, index=%d\n", chan->number, chan->index);
local_irq_save(flags);
if (chan->state == S3C_DMA_RUNNING) {
pr_debug("s3c_start_dma: already running (%d)\n", chan->state);
local_irq_restore(flags);
return 0;
}
chan->state = S3C_DMA_RUNNING;
/* check wether there is anything to load, and if not, see
* if we can find anything to load
*/
if (chan->load_state == S3C_DMALOAD_NONE) {
if (chan->next == NULL) {
printk(KERN_ERR "dma%d: dcon_num has nothing loaded\n", chan->number);
chan->state = S3C_DMA_IDLE;
local_irq_restore(flags);
return -EINVAL;
}
s3c_dma_loadbuffer(chan, chan->next);
}
dbg_showchan(chan);
/* enable the channel */
if (!chan->irq_enabled) {
enable_irq(chan->irq);
chan->irq_enabled = 1;
}
/* Get the DMA channel started ...*/
dma_wrreg(chan, S3C_DMAC_CxCONFIGURATION, chan->config_flags);
pr_debug("%s:wrote %08lx to S3C_DMAC_CxCONFIGURATION.\n",__FUNCTION__, chan->config_flags);
/* Start the DMA operation on Peripheral */
s3c_dma_call_op(chan, S3C2410_DMAOP_START);
dbg_showchan(chan);
local_irq_restore(flags);
return 0;
}
示例13: s3c_dma_flush_fifo
/*actively polling for the A bit can block the cpu*/
void s3c_dma_flush_fifo(struct s3c2410_dma_chan *chan)
{
unsigned long tmp;
tmp = dma_rdreg(chan, S3C_DMAC_CxCONFIGURATION);
tmp |= S3C_DMACONFIG_HALT;
dma_wrreg(chan, S3C_DMAC_CxCONFIGURATION, tmp);
tmp = dma_rdreg(chan, S3C_DMAC_CxCONFIGURATION);
/*this while loop can be very dangerous..may be put the process to sleep rather than waiting till fifo is drained */
while (tmp & S3C_DMACONFIG_ACTIVE) {
tmp = dma_rdreg(chan, S3C_DMAC_CxCONFIGURATION);
}
}
示例14: s3c2410_dma_devconfig
int s3c2410_dma_devconfig(int channel,
enum s3c2410_dmasrc source,
int hwcfg,
unsigned long devaddr)
{
struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
if (chan == NULL)
return -EINVAL;
pr_debug("%s: source=%d, hwcfg=%08x, devaddr=%08lx\n",
__func__, (int)source, hwcfg, devaddr);
chan->source = source;
chan->dev_addr = devaddr;
chan->hw_cfg = hwcfg;
switch (source) {
case S3C2410_DMASRC_HW:
/* source is hardware */
pr_debug("%s: hw source, devaddr=%08lx, hwcfg=%d\n",
__func__, devaddr, hwcfg);
dma_wrreg(chan, S3C2410_DMA_DISRCC, hwcfg & 3);
dma_wrreg(chan, S3C2410_DMA_DISRC, devaddr);
dma_wrreg(chan, S3C2410_DMA_DIDSTC, (0<<1) | (0<<0));
chan->addr_reg = dma_regaddr(chan, S3C2410_DMA_DIDST);
break;
case S3C2410_DMASRC_MEM:
/* source is memory */
pr_debug("%s: mem source, devaddr=%08lx, hwcfg=%d\n",
__func__, devaddr, hwcfg);
dma_wrreg(chan, S3C2410_DMA_DISRCC, (0<<1) | (0<<0));
dma_wrreg(chan, S3C2410_DMA_DIDST, devaddr);
dma_wrreg(chan, S3C2410_DMA_DIDSTC, hwcfg & 3);
chan->addr_reg = dma_regaddr(chan, S3C2410_DMA_DISRC);
break;
default:
printk(KERN_ERR "dma%d: invalid source type (%d)\n",
channel, source);
return -EINVAL;
}
if (dma_sel.direction != NULL)
(dma_sel.direction)(chan, chan->map, source);
return 0;
}
示例15: s3c2410_dma_devconfig
int s3c2410_dma_devconfig(int channel,
s3c2410_dmasrc_t source,
int hwcfg,
unsigned long devaddr)
{
s3c2410_dma_chan_t *chan = &s3c2410_chans[channel];
check_channel(channel);
pr_debug("%s: source=%d, hwcfg=%08x, devaddr=%08lx\n",
__FUNCTION__, (int)source, hwcfg, devaddr);
chan->source = source;
chan->dev_addr = devaddr;
switch (source) {
case S3C2410_DMASRC_HW:
/* source is hardware */
pr_debug("%s: hw source, devaddr=%08lx, hwcfg=%d\n",
__FUNCTION__, devaddr, hwcfg);
dma_wrreg(chan, S3C2410_DMA_DISRCC, hwcfg & 3);
dma_wrreg(chan, S3C2410_DMA_DISRC, devaddr);
dma_wrreg(chan, S3C2410_DMA_DIDSTC, (0<<1) | (0<<0));
chan->addr_reg = dma_regaddr(chan, S3C2410_DMA_DIDST);
return 0;
case S3C2410_DMASRC_MEM:
/* source is memory */
pr_debug( "%s: mem source, devaddr=%08lx, hwcfg=%d\n",
__FUNCTION__, devaddr, hwcfg);
dma_wrreg(chan, S3C2410_DMA_DISRCC, (0<<1) | (0<<0));
dma_wrreg(chan, S3C2410_DMA_DIDST, devaddr);
dma_wrreg(chan, S3C2410_DMA_DIDSTC, hwcfg & 3);
chan->addr_reg = dma_regaddr(chan, S3C2410_DMA_DISRC);
return 0;
}
printk(KERN_ERR "dma%d: invalid source type (%d)\n", channel, source);
return -EINVAL;
}